JPS56111918A - Reference voltage source device - Google Patents

Reference voltage source device

Info

Publication number
JPS56111918A
JPS56111918A JP1451480A JP1451480A JPS56111918A JP S56111918 A JPS56111918 A JP S56111918A JP 1451480 A JP1451480 A JP 1451480A JP 1451480 A JP1451480 A JP 1451480A JP S56111918 A JPS56111918 A JP S56111918A
Authority
JP
Japan
Prior art keywords
threshold voltage
voltage
transistors
transistor
enhancement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1451480A
Other languages
Japanese (ja)
Inventor
Kunihiko Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1451480A priority Critical patent/JPS56111918A/en
Publication of JPS56111918A publication Critical patent/JPS56111918A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/245—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

PURPOSE:To improve the temperature characteristics, by connecting the two enhancement transistors having different threshold voltage levels in series to each others and thus realizing an equal current driving. CONSTITUTION:The gate/drain of the enhancement transistor 32 having the threshold voltage VT2.gm term beta2 is short-circuited between the gate and the drain of the n-channel enhancement MOS transistor 31 having the threshold voltage VT1.gm term beta1. Then the voltage is applied between the other end 37 and the source of the transistor 31. The both transistors are held at the region of saturation by giving a bias to secure VT1<V35<=2VT1-VT2 (V35: voltage of terminal 35). Thus the output point voltage VO becomes as shown by an equation, and VO=VT1-VT2 is obtained if beta1=beta2 is satisfied. In other words, the dependance is put only to the threshold voltage of both transistors.
JP1451480A 1980-02-08 1980-02-08 Reference voltage source device Pending JPS56111918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1451480A JPS56111918A (en) 1980-02-08 1980-02-08 Reference voltage source device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1451480A JPS56111918A (en) 1980-02-08 1980-02-08 Reference voltage source device

Publications (1)

Publication Number Publication Date
JPS56111918A true JPS56111918A (en) 1981-09-04

Family

ID=11863185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1451480A Pending JPS56111918A (en) 1980-02-08 1980-02-08 Reference voltage source device

Country Status (1)

Country Link
JP (1) JPS56111918A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178315U (en) * 1984-10-29 1986-05-26
JPS6299817A (en) * 1985-10-25 1987-05-09 Seiko Instr & Electronics Ltd Constant voltage circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178315U (en) * 1984-10-29 1986-05-26
JPS6299817A (en) * 1985-10-25 1987-05-09 Seiko Instr & Electronics Ltd Constant voltage circuit

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