JPS5610942A - Inspection of memory retaining capacity of semiconductor nonvolatile memory - Google Patents
Inspection of memory retaining capacity of semiconductor nonvolatile memoryInfo
- Publication number
- JPS5610942A JPS5610942A JP8544279A JP8544279A JPS5610942A JP S5610942 A JPS5610942 A JP S5610942A JP 8544279 A JP8544279 A JP 8544279A JP 8544279 A JP8544279 A JP 8544279A JP S5610942 A JPS5610942 A JP S5610942A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- retaining capacity
- terminal
- terminals
- control gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000007689 inspection Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 3
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 230000000717 retained effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Non-Volatile Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
PURPOSE:To esmimate the memory retaining capacity of a semiconductor nonvolatile memory by applying a voltage higher than that used under normally using conditions to the control gate terminal of a memory transistor to positively dissipate charges in the floating gate. CONSTITUTION:A memory transistor is formed as follows. The transistor is made by forming a reverse conducting type diffused regions 3, 4 on a semiconductor substrate 1, coating the peripheral edge of the substrate 1 with a field oxide film 14, forming a gate oxide film 13 buried with a floating gate 9 and a control gate 10 from the ends of the regions 3, 4 to therebetween, and mounting terminals 2, 7, 8, 12 on the respective regions. When the memory retaining capacity is to be decided, the source and substrate terminals 7 and 2 are grounded, a drain terminal 8 is opened, and a bias voltage higher than that used under normally using conditions is applied between the terminal 2 and the control gate terminal 12. After it is retained at 125 deg.C in this state, it is lowered to 25 deg.C, and the capacity is decided by the reversing operation between the terminals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8544279A JPS5610942A (en) | 1979-07-05 | 1979-07-05 | Inspection of memory retaining capacity of semiconductor nonvolatile memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8544279A JPS5610942A (en) | 1979-07-05 | 1979-07-05 | Inspection of memory retaining capacity of semiconductor nonvolatile memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5610942A true JPS5610942A (en) | 1981-02-03 |
Family
ID=13858973
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8544279A Pending JPS5610942A (en) | 1979-07-05 | 1979-07-05 | Inspection of memory retaining capacity of semiconductor nonvolatile memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5610942A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0395296A (en) * | 1990-03-26 | 1991-04-19 | Taiho Kogyo Co Ltd | Conductive slippery resin material |
JP2005191434A (en) * | 2003-12-26 | 2005-07-14 | Toyota Central Res & Dev Lab Inc | Transistor, method for defining characteristics change model equation therefor and method for determining quality thereof |
JP2015502000A (en) * | 2011-11-09 | 2015-01-19 | シリコン ストーリッジ テクノロージー インコーポレイテッドSilicon Storage Technology, Inc. | Method for testing data retention of non-volatile memory cells having floating gates |
-
1979
- 1979-07-05 JP JP8544279A patent/JPS5610942A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0395296A (en) * | 1990-03-26 | 1991-04-19 | Taiho Kogyo Co Ltd | Conductive slippery resin material |
JPH0438792B2 (en) * | 1990-03-26 | 1992-06-25 | ||
JP2005191434A (en) * | 2003-12-26 | 2005-07-14 | Toyota Central Res & Dev Lab Inc | Transistor, method for defining characteristics change model equation therefor and method for determining quality thereof |
JP4675043B2 (en) * | 2003-12-26 | 2011-04-20 | 株式会社豊田中央研究所 | Bipolar transistor, bipolar transistor characteristic variation model formula identification method, and bipolar transistor pass / fail judgment method |
JP2015502000A (en) * | 2011-11-09 | 2015-01-19 | シリコン ストーリッジ テクノロージー インコーポレイテッドSilicon Storage Technology, Inc. | Method for testing data retention of non-volatile memory cells having floating gates |
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