JPS56108273A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56108273A
JPS56108273A JP1075580A JP1075580A JPS56108273A JP S56108273 A JPS56108273 A JP S56108273A JP 1075580 A JP1075580 A JP 1075580A JP 1075580 A JP1075580 A JP 1075580A JP S56108273 A JPS56108273 A JP S56108273A
Authority
JP
Japan
Prior art keywords
layer
type
film
region
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1075580A
Other languages
Japanese (ja)
Inventor
Eiji Yamanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tohoku Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tohoku Metal Industries Ltd filed Critical Tohoku Metal Industries Ltd
Priority to JP1075580A priority Critical patent/JPS56108273A/en
Publication of JPS56108273A publication Critical patent/JPS56108273A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1066—Gate region of field-effect devices with PN junction gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To readily obtain a current saturation type SIT or current unsaturation type FET in which the high-speed property and the high-power property are compatible with each other, by employing a notch structure for the gate region constituting a semiconductor device. CONSTITUTION:On an N<+> type Si substrate 6, an N<-> type drain layer 7, an N type source layer 8 and an N<+> type source ohmic contact layer 9 are epitaxially grown being piled, and a bar- or mesh-shaped mask of SiO2 film 10 having given openings is provided on the layer 9. Then, the exposed regions of the layer 9 and the layer 8 thereunder are removed by etching, and a P<+> type region 11 to be a gate in formed by diffusion extending over from the side wall of the layers 9 and 8 remaining under the film 10 to the surface of the exposed layer 7. Then, the film 10 is replaced with a resist film 13, and only the upper portion of the side surface of the layers 9 and 8 in the region 11 is removed by etching. After the film 13 has been replaced with an SiO2 film 14 including said portion, windows are opened to attach an Al source electrode 15 to the layer 8 and a gate electrode 16 to the region 11. Moreover, a drain electrode 17 is provided to the lower surface of the substrate 6.
JP1075580A 1980-01-31 1980-01-31 Semiconductor device Pending JPS56108273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1075580A JPS56108273A (en) 1980-01-31 1980-01-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1075580A JPS56108273A (en) 1980-01-31 1980-01-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS56108273A true JPS56108273A (en) 1981-08-27

Family

ID=11759128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1075580A Pending JPS56108273A (en) 1980-01-31 1980-01-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56108273A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5219083A (en) * 1975-08-06 1977-01-14 Nippon Gakki Seizo Kk Field-effect tansistor
JPS5343483A (en) * 1976-10-01 1978-04-19 Handotai Kenkyu Shinkokai Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5219083A (en) * 1975-08-06 1977-01-14 Nippon Gakki Seizo Kk Field-effect tansistor
JPS5343483A (en) * 1976-10-01 1978-04-19 Handotai Kenkyu Shinkokai Semiconductor device

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