JPS56103463A - Semiconductor device of high withstand voltage planar type - Google Patents

Semiconductor device of high withstand voltage planar type

Info

Publication number
JPS56103463A
JPS56103463A JP590180A JP590180A JPS56103463A JP S56103463 A JPS56103463 A JP S56103463A JP 590180 A JP590180 A JP 590180A JP 590180 A JP590180 A JP 590180A JP S56103463 A JPS56103463 A JP S56103463A
Authority
JP
Japan
Prior art keywords
region
type
substrate
base region
withstand voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP590180A
Other languages
Japanese (ja)
Inventor
Masami Yamaoka
Kiyokazu Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP590180A priority Critical patent/JPS56103463A/en
Publication of JPS56103463A publication Critical patent/JPS56103463A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To make the device high withstand voltage by suppressing a leak current by a method wherein a base region and the first and second guard rings surrounding the base region are formed on a semiconductor substrate, as being surrounded by a channel stopper region, and a field plate leveled at the same as the substrate is formed omitted on the base region. CONSTITUTION:An N<+> type channel stopper region 5 is formed on the periphery of an N<-> type Si substrate, and a P<+> type base region 2 where an N<+> type emitter region 14 is formed later and a P<+> type first guard ring region 8 and second guard ring region 9 surrounding the P<+> type base region 2 are simultaneously diffusion- formed in the substrate 1 surrounded by the region 5. Then, an SiO2 film 3 is attached on the whole surface to form the Al field plate 13, and one end of the plate 13 is connected to the region 5 to be made the same potential as the substrate 1, while, at this time, the other end is stopped at the end of the region 8 on the region 9 side and left omitted on the region 2. Thus, the surface potential of the film 3 is fixed to exclude influences caused by external electric charges and ions and to control the leak current to be generated.
JP590180A 1980-01-21 1980-01-21 Semiconductor device of high withstand voltage planar type Pending JPS56103463A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP590180A JPS56103463A (en) 1980-01-21 1980-01-21 Semiconductor device of high withstand voltage planar type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP590180A JPS56103463A (en) 1980-01-21 1980-01-21 Semiconductor device of high withstand voltage planar type

Publications (1)

Publication Number Publication Date
JPS56103463A true JPS56103463A (en) 1981-08-18

Family

ID=11623790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP590180A Pending JPS56103463A (en) 1980-01-21 1980-01-21 Semiconductor device of high withstand voltage planar type

Country Status (1)

Country Link
JP (1) JPS56103463A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110164A (en) * 1982-12-03 1984-06-26 エヌ・ベ−・フイリップス・フル−イランペンファブリケン semiconductor equipment
JPH0697469A (en) * 1992-09-17 1994-04-08 Hitachi Ltd Semiconductor device having planar junction
WO1995004374A1 (en) * 1993-07-29 1995-02-09 Siemens Components, Inc. A reverse field plate, junction-terminating structure
EP0660416A1 (en) * 1993-12-22 1995-06-28 AT&T Corp. Semiconductor device with reduced high voltage termination area and high breakdown voltage
WO1997011495A1 (en) * 1995-09-22 1997-03-27 Siemens Aktiengesellschaft Device with a p-n junction and a means of reducing the risk of breakdown of the junction
EP0805499A3 (en) * 1992-08-17 1997-11-26 Fuji Electric Co., Ltd. High withstand voltage M I S field effect transistor and semiconductor integrated circuit
US5750414A (en) * 1993-09-29 1998-05-12 Siemens Components, Inc. Method of fabricating a semiconductor device
JP2003086815A (en) * 2001-09-12 2003-03-20 Fuji Electric Co Ltd Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110164A (en) * 1982-12-03 1984-06-26 エヌ・ベ−・フイリップス・フル−イランペンファブリケン semiconductor equipment
EP0805499A3 (en) * 1992-08-17 1997-11-26 Fuji Electric Co., Ltd. High withstand voltage M I S field effect transistor and semiconductor integrated circuit
JPH0697469A (en) * 1992-09-17 1994-04-08 Hitachi Ltd Semiconductor device having planar junction
WO1995004374A1 (en) * 1993-07-29 1995-02-09 Siemens Components, Inc. A reverse field plate, junction-terminating structure
US5750414A (en) * 1993-09-29 1998-05-12 Siemens Components, Inc. Method of fabricating a semiconductor device
EP0660416A1 (en) * 1993-12-22 1995-06-28 AT&T Corp. Semiconductor device with reduced high voltage termination area and high breakdown voltage
WO1997011495A1 (en) * 1995-09-22 1997-03-27 Siemens Aktiengesellschaft Device with a p-n junction and a means of reducing the risk of breakdown of the junction
US6064103A (en) * 1995-09-22 2000-05-16 Siemens Aktiengesellschaft Device with a P-N junction and a means of reducing the risk of breakdown of the junction
JP2003086815A (en) * 2001-09-12 2003-03-20 Fuji Electric Co Ltd Semiconductor device

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