JPS56100435A - Face-down bonder - Google Patents

Face-down bonder

Info

Publication number
JPS56100435A
JPS56100435A JP206680A JP206680A JPS56100435A JP S56100435 A JPS56100435 A JP S56100435A JP 206680 A JP206680 A JP 206680A JP 206680 A JP206680 A JP 206680A JP S56100435 A JPS56100435 A JP S56100435A
Authority
JP
Japan
Prior art keywords
pattern
chip
substrate
block
photopath
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP206680A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6239537B2 (enrdf_load_stackoverflow
Inventor
Osamu Tachibana
Tetsuo Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP206680A priority Critical patent/JPS56100435A/ja
Publication of JPS56100435A publication Critical patent/JPS56100435A/ja
Publication of JPS6239537B2 publication Critical patent/JPS6239537B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75753Means for optical alignment, e.g. sensors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP206680A 1980-01-14 1980-01-14 Face-down bonder Granted JPS56100435A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP206680A JPS56100435A (en) 1980-01-14 1980-01-14 Face-down bonder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP206680A JPS56100435A (en) 1980-01-14 1980-01-14 Face-down bonder

Publications (2)

Publication Number Publication Date
JPS56100435A true JPS56100435A (en) 1981-08-12
JPS6239537B2 JPS6239537B2 (enrdf_load_stackoverflow) 1987-08-24

Family

ID=11518962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP206680A Granted JPS56100435A (en) 1980-01-14 1980-01-14 Face-down bonder

Country Status (1)

Country Link
JP (1) JPS56100435A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01119031A (ja) * 1987-10-31 1989-05-11 Nec Corp ペレットボンディング装置
WO2024014077A1 (ja) * 2022-07-11 2024-01-18 パナソニックIpマネジメント株式会社 位置決め装置、実装装置、位置決め方法および実装方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01119031A (ja) * 1987-10-31 1989-05-11 Nec Corp ペレットボンディング装置
WO2024014077A1 (ja) * 2022-07-11 2024-01-18 パナソニックIpマネジメント株式会社 位置決め装置、実装装置、位置決め方法および実装方法

Also Published As

Publication number Publication date
JPS6239537B2 (enrdf_load_stackoverflow) 1987-08-24

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