JPS5583945A - Abnormal action preventing system for unit controlled by microcomputer - Google Patents

Abnormal action preventing system for unit controlled by microcomputer

Info

Publication number
JPS5583945A
JPS5583945A JP15776878A JP15776878A JPS5583945A JP S5583945 A JPS5583945 A JP S5583945A JP 15776878 A JP15776878 A JP 15776878A JP 15776878 A JP15776878 A JP 15776878A JP S5583945 A JPS5583945 A JP S5583945A
Authority
JP
Japan
Prior art keywords
microcomputer
gate
order code
address
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15776878A
Other languages
Japanese (ja)
Inventor
Masaaki Ogura
Mitsuhiro Nonaka
Nachio Seko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP15776878A priority Critical patent/JPS5583945A/en
Publication of JPS5583945A publication Critical patent/JPS5583945A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To prevent the fault caused by the malfunction of the microcomputer by securing the non-operation state automatically for both ROM and RAM as well as the generation of the prescribed order code in case the unused address is designated under operation of the unit with which the processing capacity of CPU covers even the unused address region.
CONSTITUTION: With malfunction of the microcomputer, the high level is secured for address lines A13WA15 which are never used originally for the control of the operation of the unit along with the output of the high-level signal to OR gate O1. This signal makes ROM inactive as well as RAM. And the signal is set to the low level via inverter I2 to be applied to OR gate O2. When the output of gate O2 is at the low level, gates T0WT7 of the tristate send the order code set by SW0WSW7 to the data bus. At CPU the jumping is given to the address containing the process routine of the abnormal addressing with reception of the order code.
COPYRIGHT: (C)1980,JPO&Japio
JP15776878A 1978-12-19 1978-12-19 Abnormal action preventing system for unit controlled by microcomputer Pending JPS5583945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15776878A JPS5583945A (en) 1978-12-19 1978-12-19 Abnormal action preventing system for unit controlled by microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15776878A JPS5583945A (en) 1978-12-19 1978-12-19 Abnormal action preventing system for unit controlled by microcomputer

Publications (1)

Publication Number Publication Date
JPS5583945A true JPS5583945A (en) 1980-06-24

Family

ID=15656878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15776878A Pending JPS5583945A (en) 1978-12-19 1978-12-19 Abnormal action preventing system for unit controlled by microcomputer

Country Status (1)

Country Link
JP (1) JPS5583945A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157360A (en) * 1981-03-25 1982-09-28 Toshiba Corp Mis-operation detecting system for data
JPS581245A (en) * 1981-06-26 1983-01-06 Fujitsu Ltd Branch address producing method
JPS5829052A (en) * 1981-08-12 1983-02-21 Hitachi Ltd Microcomputer device with malfunction preventing function
JPS5837759A (en) * 1981-08-28 1983-03-05 Toshiba Corp Electronic desk top calculator with melody
WO1983003888A1 (en) * 1982-05-04 1983-11-10 Matsushita Electric Industrial Co., Ltd. Cooking device
JPS6048545A (en) * 1983-08-26 1985-03-16 Nec Corp Microcomputer
JPS61118833A (en) * 1984-11-14 1986-06-06 Fujitsu Ltd Audio response unit

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157360A (en) * 1981-03-25 1982-09-28 Toshiba Corp Mis-operation detecting system for data
JPS581245A (en) * 1981-06-26 1983-01-06 Fujitsu Ltd Branch address producing method
JPH0323938B2 (en) * 1981-06-26 1991-04-02 Fujitsu Ltd
JPS5829052A (en) * 1981-08-12 1983-02-21 Hitachi Ltd Microcomputer device with malfunction preventing function
JPS5837759A (en) * 1981-08-28 1983-03-05 Toshiba Corp Electronic desk top calculator with melody
WO1983003888A1 (en) * 1982-05-04 1983-11-10 Matsushita Electric Industrial Co., Ltd. Cooking device
US4686356A (en) * 1982-05-04 1987-08-11 Matsushita Electric Industrial Co., Ltd. Heating appliance with internal non-volatile memory
JPS6048545A (en) * 1983-08-26 1985-03-16 Nec Corp Microcomputer
JPS61118833A (en) * 1984-11-14 1986-06-06 Fujitsu Ltd Audio response unit

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