JPS5578674A - Vertical deflecting output circuit - Google Patents

Vertical deflecting output circuit

Info

Publication number
JPS5578674A
JPS5578674A JP15166078A JP15166078A JPS5578674A JP S5578674 A JPS5578674 A JP S5578674A JP 15166078 A JP15166078 A JP 15166078A JP 15166078 A JP15166078 A JP 15166078A JP S5578674 A JPS5578674 A JP S5578674A
Authority
JP
Japan
Prior art keywords
collector
base
resistance
earthed
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15166078A
Other languages
Japanese (ja)
Inventor
Hisashi Katafuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15166078A priority Critical patent/JPS5578674A/en
Publication of JPS5578674A publication Critical patent/JPS5578674A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enhance the reliability and to obtain a low-cost IC circuit by forming the transistor circuit which omits the high dielectric strength PNP transistor and the clamper diode. CONSTITUTION:For driver-step transistor Q11, the emitter is earthed via resistance R11 and the collector is connected via base resistance R3 of Q1 respectively. The Q1 forms the differential amplifier along with Q2, and the emitters are connected to constant current source S1 via resistances R1 and R2. Furthermore, the base of Q2 is connected to output point A of the vertical output step, and the collector is connected to power source VCC via the collector-emitter path and resistance R5. The emitter/base of Q4 is connected between the base and the collector of Q3 with the collector earthed. The bases are connected to each other between Q3 and Q5, and the emitters are connected to VCC via resistance R5 with the collectors earthed via resistance R16 and also connected to the base of Q13. At the same time, Q3-Q5 form the current Miller circuit.
JP15166078A 1978-12-08 1978-12-08 Vertical deflecting output circuit Pending JPS5578674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15166078A JPS5578674A (en) 1978-12-08 1978-12-08 Vertical deflecting output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15166078A JPS5578674A (en) 1978-12-08 1978-12-08 Vertical deflecting output circuit

Publications (1)

Publication Number Publication Date
JPS5578674A true JPS5578674A (en) 1980-06-13

Family

ID=15523423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15166078A Pending JPS5578674A (en) 1978-12-08 1978-12-08 Vertical deflecting output circuit

Country Status (1)

Country Link
JP (1) JPS5578674A (en)

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