JPS5574175A - Preparing interpolation type mos semiconductor device - Google Patents

Preparing interpolation type mos semiconductor device

Info

Publication number
JPS5574175A
JPS5574175A JP14760578A JP14760578A JPS5574175A JP S5574175 A JPS5574175 A JP S5574175A JP 14760578 A JP14760578 A JP 14760578A JP 14760578 A JP14760578 A JP 14760578A JP S5574175 A JPS5574175 A JP S5574175A
Authority
JP
Japan
Prior art keywords
layers
openings
type
diffusion layers
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14760578A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0127589B2 (enrdf_load_stackoverflow
Inventor
Ikuo Kawamata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14760578A priority Critical patent/JPS5574175A/ja
Publication of JPS5574175A publication Critical patent/JPS5574175A/ja
Publication of JPH0127589B2 publication Critical patent/JPH0127589B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP14760578A 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device Granted JPS5574175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14760578A JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14760578A JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Publications (2)

Publication Number Publication Date
JPS5574175A true JPS5574175A (en) 1980-06-04
JPH0127589B2 JPH0127589B2 (enrdf_load_stackoverflow) 1989-05-30

Family

ID=15434100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14760578A Granted JPS5574175A (en) 1978-11-29 1978-11-29 Preparing interpolation type mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5574175A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785226A (en) * 1980-11-18 1982-05-27 Seiko Epson Corp Manufacture of semiconductor device
JPS5810856A (ja) * 1981-07-10 1983-01-21 Nec Corp 相補型半導体集積回路装置の製造方法
JPS5821858A (ja) * 1981-07-31 1983-02-08 Nec Corp 半導体装置の製造方法
JPS5885559A (ja) * 1981-11-18 1983-05-21 Nec Corp Ｃｍｏｓ型半導体集積回路装置
JPH04278579A (ja) * 1991-02-25 1992-10-05 Samsung Electron Co Ltd スタック形キャパシタを用いるダイナミック形メモリーセルの製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51116675A (en) * 1975-04-05 1976-10-14 Fujitsu Ltd Manufacturing method for a semiconductor device
JPS51134566A (en) * 1975-05-17 1976-11-22 Fujitsu Ltd Semiconductor unit manufacturing process
JPS51137384A (en) * 1975-05-23 1976-11-27 Nippon Telegr & Teleph Corp <Ntt> Semi conductor device manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51116675A (en) * 1975-04-05 1976-10-14 Fujitsu Ltd Manufacturing method for a semiconductor device
JPS51134566A (en) * 1975-05-17 1976-11-22 Fujitsu Ltd Semiconductor unit manufacturing process
JPS51137384A (en) * 1975-05-23 1976-11-27 Nippon Telegr & Teleph Corp <Ntt> Semi conductor device manufacturing method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5785226A (en) * 1980-11-18 1982-05-27 Seiko Epson Corp Manufacture of semiconductor device
JPS5810856A (ja) * 1981-07-10 1983-01-21 Nec Corp 相補型半導体集積回路装置の製造方法
JPS5821858A (ja) * 1981-07-31 1983-02-08 Nec Corp 半導体装置の製造方法
JPS5885559A (ja) * 1981-11-18 1983-05-21 Nec Corp Ｃｍｏｓ型半導体集積回路装置
JPH04278579A (ja) * 1991-02-25 1992-10-05 Samsung Electron Co Ltd スタック形キャパシタを用いるダイナミック形メモリーセルの製造方法

Also Published As

Publication number Publication date
JPH0127589B2 (enrdf_load_stackoverflow) 1989-05-30

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