JPS556649A - Data processor with control program processing supervising function - Google Patents

Data processor with control program processing supervising function

Info

Publication number
JPS556649A
JPS556649A JP7915778A JP7915778A JPS556649A JP S556649 A JPS556649 A JP S556649A JP 7915778 A JP7915778 A JP 7915778A JP 7915778 A JP7915778 A JP 7915778A JP S556649 A JPS556649 A JP S556649A
Authority
JP
Japan
Prior art keywords
control program
program processing
data processor
progress
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7915778A
Other languages
Japanese (ja)
Other versions
JPS5835289B2 (en
Inventor
Yukichi Ikuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53079157A priority Critical patent/JPS5835289B2/en
Publication of JPS556649A publication Critical patent/JPS556649A/en
Publication of JPS5835289B2 publication Critical patent/JPS5835289B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make an error indication by detecting a process lasting undesirably in a control program processing mode, only by adding a simple hardware constitution.
CONSTITUTION: The internal status information of CPU2 in the execution of a sequential data process is set to register 6and updated according to the progress of the process. Then, S and R indicate the stop and run modes of CPU respectively, and SUP the quality of a supervision. According to the progress of the process, instruction execution is controlled by program control word PSW. Mamely, the instructions are executed under the control of the program counter part, OS part indicating a supervisor mode or problem mode, and W part indicating whether CPU is in a run state or not. Once AND circuit 10 generates [1], it is counted up 8 and latched 9, so that an error indication will be made.
COPYRIGHT: (C)1980,JPO&Japio
JP53079157A 1978-06-29 1978-06-29 Data processing device with control program processing monitoring function Expired JPS5835289B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53079157A JPS5835289B2 (en) 1978-06-29 1978-06-29 Data processing device with control program processing monitoring function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53079157A JPS5835289B2 (en) 1978-06-29 1978-06-29 Data processing device with control program processing monitoring function

Publications (2)

Publication Number Publication Date
JPS556649A true JPS556649A (en) 1980-01-18
JPS5835289B2 JPS5835289B2 (en) 1983-08-02

Family

ID=13682117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53079157A Expired JPS5835289B2 (en) 1978-06-29 1978-06-29 Data processing device with control program processing monitoring function

Country Status (1)

Country Link
JP (1) JPS5835289B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179660U (en) * 1986-04-30 1987-11-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179660U (en) * 1986-04-30 1987-11-14

Also Published As

Publication number Publication date
JPS5835289B2 (en) 1983-08-02

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