JPS6468856A - Data processor - Google Patents

Data processor

Info

Publication number
JPS6468856A
JPS6468856A JP62226825A JP22682587A JPS6468856A JP S6468856 A JPS6468856 A JP S6468856A JP 62226825 A JP62226825 A JP 62226825A JP 22682587 A JP22682587 A JP 22682587A JP S6468856 A JPS6468856 A JP S6468856A
Authority
JP
Japan
Prior art keywords
instruction
execution
factors
data processor
suppressed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62226825A
Other languages
Japanese (ja)
Inventor
Masashi Deguchi
Tokuzo Kiyohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62226825A priority Critical patent/JPS6468856A/en
Publication of JPS6468856A publication Critical patent/JPS6468856A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To increase the processing speed and to reduce hardware of a saving means, by performing exception handling just before the start of a following instruction after the completion of an instruction as the object in case of detection of a kind of memory access error which cannot be detected unless the instruction is executed. CONSTITUTION:Factors of memory access error are divided to factors which can be predicted before instruction execution and factors which are detected as the result of instruction execution, and the start of execution of the instruction as the object is suppressed by former factors and the start of execution of a following instruction after the completion of execution of the instruction the object is suppressed by latter factors, thereby performing the exception handling. Therefore, in the exception, handling, it is unnecessary to have all internal states of a data processor being in course of instruction execution, and it is sufficient if only the first state at the time of starting the instruction execution is saved, and the quantity of saved data is reduced. Thus, the processing speed is increased and hardware of the saving means is reduced.
JP62226825A 1987-09-10 1987-09-10 Data processor Pending JPS6468856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62226825A JPS6468856A (en) 1987-09-10 1987-09-10 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62226825A JPS6468856A (en) 1987-09-10 1987-09-10 Data processor

Publications (1)

Publication Number Publication Date
JPS6468856A true JPS6468856A (en) 1989-03-14

Family

ID=16851178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62226825A Pending JPS6468856A (en) 1987-09-10 1987-09-10 Data processor

Country Status (1)

Country Link
JP (1) JPS6468856A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233288A (en) * 1992-02-19 1993-09-10 Nec Corp Information processor
JP2007018454A (en) * 2005-07-11 2007-01-25 Toshiba Corp Microprocessor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233288A (en) * 1992-02-19 1993-09-10 Nec Corp Information processor
JP2007018454A (en) * 2005-07-11 2007-01-25 Toshiba Corp Microprocessor

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