JPS5559757A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5559757A
JPS5559757A JP13338578A JP13338578A JPS5559757A JP S5559757 A JPS5559757 A JP S5559757A JP 13338578 A JP13338578 A JP 13338578A JP 13338578 A JP13338578 A JP 13338578A JP S5559757 A JPS5559757 A JP S5559757A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
carriers
region
injection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13338578A
Other languages
Japanese (ja)
Other versions
JPS5950224B2 (en
Inventor
Junichi Mogi
Kiyoshi Miyasaka
Seiji Emoto
Shigeki Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13338578A priority Critical patent/JPS5950224B2/en
Publication of JPS5559757A publication Critical patent/JPS5559757A/en
Publication of JPS5950224B2 publication Critical patent/JPS5950224B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0222—Charge pumping, substrate bias generation structures

Abstract

PURPOSE:To prevent adverse effects by a small number of carriers to other circuit portions on a semiconductor substrate, by inhibiting the injection of few carriers to the substrate by forming a region with high concentration to a junction region with the substrate of a substrate bias generating circuit. CONSTITUTION:A coefficient of injection of a small number of carriers is decreased by changing a semiconductor substrate portion 8 just nuder a region 4, in which junction with a substrate 1 of a substrate bias generating circuit is brought to a forward potential condition, into a P-type region with high concentration, the injection of few carriers to the semiconductor substrate 1 in the case when junction between the region 4 and the semiconductor substrate 1 is put to the forward potential condition is suppressed and the inflow of a small number of carriers to a memory element dynamically operating and a joint of high impedance is prevented. Regions 9, 10 in a conduction type opposite to the semiconductor substrate 1 are made up around transistors Q1, Q2 for the substrate bias generating circuit, and few carriers diffused into the semiconductor substrate 1 are absorbed by applying proper bias voltage to the regions 9, 10.
JP13338578A 1978-10-30 1978-10-30 semiconductor equipment Expired JPS5950224B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13338578A JPS5950224B2 (en) 1978-10-30 1978-10-30 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13338578A JPS5950224B2 (en) 1978-10-30 1978-10-30 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5559757A true JPS5559757A (en) 1980-05-06
JPS5950224B2 JPS5950224B2 (en) 1984-12-07

Family

ID=15103490

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13338578A Expired JPS5950224B2 (en) 1978-10-30 1978-10-30 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5950224B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062894A2 (en) * 1981-04-07 1982-10-20 Kabushiki Kaisha Toshiba Semiconductor device
JPS57193054A (en) * 1981-05-22 1982-11-27 Fujitsu Ltd Substrate bias generating circuit
JPS6149457A (en) * 1984-08-13 1986-03-11 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Charge pumping structure of substrate bias generatr

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6140834U (en) * 1984-08-20 1986-03-15 株式会社 神崎高級工機製作所 Reel mower device
KR101292857B1 (en) 2008-07-08 2013-08-07 닛본 세이고 가부시끼가이샤 Resin retainer for tapered roller bearing, and tapered roller bearing

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0062894A2 (en) * 1981-04-07 1982-10-20 Kabushiki Kaisha Toshiba Semiconductor device
US4559548A (en) * 1981-04-07 1985-12-17 Tokyo Shibaura Denki Kabushiki Kaisha CMOS Charge pump free of parasitic injection
JPS57193054A (en) * 1981-05-22 1982-11-27 Fujitsu Ltd Substrate bias generating circuit
JPH0423427B2 (en) * 1981-05-22 1992-04-22 Fujitsu Ltd
JPS6149457A (en) * 1984-08-13 1986-03-11 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Charge pumping structure of substrate bias generatr
JPH0347587B2 (en) * 1984-08-13 1991-07-19 Intaanashonaru Bijinesu Mashiinzu Corp

Also Published As

Publication number Publication date
JPS5950224B2 (en) 1984-12-07

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