JPS554915A - Semi-conductor manufacturing method - Google Patents

Semi-conductor manufacturing method

Info

Publication number
JPS554915A
JPS554915A JP7647078A JP7647078A JPS554915A JP S554915 A JPS554915 A JP S554915A JP 7647078 A JP7647078 A JP 7647078A JP 7647078 A JP7647078 A JP 7647078A JP S554915 A JPS554915 A JP S554915A
Authority
JP
Japan
Prior art keywords
base
thin film
opened
diffused
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7647078A
Other languages
Japanese (ja)
Inventor
Keizo Inaba
Yoshikazu Yanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7647078A priority Critical patent/JPS554915A/en
Publication of JPS554915A publication Critical patent/JPS554915A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]

Abstract

PURPOSE:To increase junction potential resistance by destributing impurities through a base in such a way that impurity density is much lower at the periphery than the center of the base. CONSTITUTION:An oxidizing film of a n-type Si substrate is opened for oxidation, and a thick film 4 and a thin film 4a are formed. The center of the thin film is opened and A ions are supplied and diffused to form a base layer 2 which has lower density at the periphery 2a. The thin film 4a is selectively opened and As are diffused for forming an emitter layer 3. Then electrodes are formed, thus obtaining a npn transistor. This consitution increases junction potential resistance because a depletion layer produced during junction of a collector and the base, expands greatly toward the base. This manufacturing method also does not deteriorate other electric performance characteristics.
JP7647078A 1978-06-26 1978-06-26 Semi-conductor manufacturing method Pending JPS554915A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7647078A JPS554915A (en) 1978-06-26 1978-06-26 Semi-conductor manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7647078A JPS554915A (en) 1978-06-26 1978-06-26 Semi-conductor manufacturing method

Publications (1)

Publication Number Publication Date
JPS554915A true JPS554915A (en) 1980-01-14

Family

ID=13606051

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7647078A Pending JPS554915A (en) 1978-06-26 1978-06-26 Semi-conductor manufacturing method

Country Status (1)

Country Link
JP (1) JPS554915A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149054A (en) * 1983-02-15 1984-08-25 Matsushita Electric Works Ltd Planar type transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149054A (en) * 1983-02-15 1984-08-25 Matsushita Electric Works Ltd Planar type transistor

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