JPS5548939A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5548939A
JPS5548939A JP10911879A JP10911879A JPS5548939A JP S5548939 A JPS5548939 A JP S5548939A JP 10911879 A JP10911879 A JP 10911879A JP 10911879 A JP10911879 A JP 10911879A JP S5548939 A JPS5548939 A JP S5548939A
Authority
JP
Japan
Prior art keywords
base
electrode
internal buffer
curvature
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10911879A
Other languages
Japanese (ja)
Inventor
Minoru Sakai
Junichi Takita
Katsumi Akabane
Koichi Wajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10911879A priority Critical patent/JPS5548939A/en
Publication of JPS5548939A publication Critical patent/JPS5548939A/en
Pending legal-status Critical Current

Links

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: To eliminate poor contact and secure close contact, by equalizing the radius of curvature of each component of a laminated body consisting of an internal buffer electrode and a copper cover placed on a semiconductor junction base constituting a planar type semiconductor device.
CONSTITUTION: Junction support 6 is mounted on a base having copper base 4 via solder layer 5. On top of this is mounted semiconductor junction base 8. Next, on top of this is placed a base having Cu cover 1 via internal buffer electrode 2 and they are assembled under pressure. They are then sealed with ceramic seal 7. In this way, a planar semiconductor device is constructed. At this time, however, internal buffer electrode 2 and copper cover 1 are processed in such a manner that their radii of curvature are the same as that of semiconductor junction base 8. By this, a soft curvature correction electrode normally required between electrode 2 and base 8 becomes unnecessary, and at the same time, close contact is secured.
COPYRIGHT: (C)1980,JPO&Japio
JP10911879A 1979-08-29 1979-08-29 Semiconductor device Pending JPS5548939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10911879A JPS5548939A (en) 1979-08-29 1979-08-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10911879A JPS5548939A (en) 1979-08-29 1979-08-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5548939A true JPS5548939A (en) 1980-04-08

Family

ID=14502003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10911879A Pending JPS5548939A (en) 1979-08-29 1979-08-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5548939A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50146272A (en) * 1974-05-13 1975-11-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50146272A (en) * 1974-05-13 1975-11-22

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