JPS5544684A - Duplicated bus circuit - Google Patents
Duplicated bus circuitInfo
- Publication number
- JPS5544684A JPS5544684A JP11890178A JP11890178A JPS5544684A JP S5544684 A JPS5544684 A JP S5544684A JP 11890178 A JP11890178 A JP 11890178A JP 11890178 A JP11890178 A JP 11890178A JP S5544684 A JPS5544684 A JP S5544684A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- bus circuit
- bus
- input terminals
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Hardware Redundancy (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
PURPOSE: To constitute the bus circuit based on the duplicated line formed through combination of the bus driver and the signal transmission line, thus enhancing the reliability.
CONSTITUTION: Exclusive logic sum circuits ER1WERn possess the double input terminals connected to the signals lines which function as a piece of line. In case some fault occurs, the output is caused at output terminals SV1WSVn of the logic circuit since the potential differs among the input terminals. Accordingly, the fault occurrence of the bus circuit can be detected just by connecting previously a simple state monitor circuit to the corresponding output terminal.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53118901A JPS589445B2 (en) | 1978-09-27 | 1978-09-27 | Duplex bus circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53118901A JPS589445B2 (en) | 1978-09-27 | 1978-09-27 | Duplex bus circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5544684A true JPS5544684A (en) | 1980-03-29 |
JPS589445B2 JPS589445B2 (en) | 1983-02-21 |
Family
ID=14747965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53118901A Expired JPS589445B2 (en) | 1978-09-27 | 1978-09-27 | Duplex bus circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS589445B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5745750A (en) * | 1980-09-01 | 1982-03-15 | Fanuc Ltd | Transmission switching device having open line detecting function and industrial robot using said device |
JPH04340154A (en) * | 1990-11-29 | 1992-11-26 | Nippon Telegr & Teleph Corp <Ntt> | Bus multiplex multiprocessor system |
JP2008046702A (en) * | 2006-08-11 | 2008-02-28 | Omron Corp | Plc device |
JP2008084276A (en) * | 2006-09-29 | 2008-04-10 | Omron Corp | Programmable logic controller device |
-
1978
- 1978-09-27 JP JP53118901A patent/JPS589445B2/en not_active Expired
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5745750A (en) * | 1980-09-01 | 1982-03-15 | Fanuc Ltd | Transmission switching device having open line detecting function and industrial robot using said device |
JPS6228904B2 (en) * | 1980-09-01 | 1987-06-23 | Fanuc Ltd | |
JPH04340154A (en) * | 1990-11-29 | 1992-11-26 | Nippon Telegr & Teleph Corp <Ntt> | Bus multiplex multiprocessor system |
JP2008046702A (en) * | 2006-08-11 | 2008-02-28 | Omron Corp | Plc device |
JP2008084276A (en) * | 2006-09-29 | 2008-04-10 | Omron Corp | Programmable logic controller device |
Also Published As
Publication number | Publication date |
---|---|
JPS589445B2 (en) | 1983-02-21 |
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