JPS5535572A - Storage exchange system - Google Patents

Storage exchange system

Info

Publication number
JPS5535572A
JPS5535572A JP10937978A JP10937978A JPS5535572A JP S5535572 A JPS5535572 A JP S5535572A JP 10937978 A JP10937978 A JP 10937978A JP 10937978 A JP10937978 A JP 10937978A JP S5535572 A JPS5535572 A JP S5535572A
Authority
JP
Japan
Prior art keywords
devices
transfer
information
exchange system
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10937978A
Other languages
Japanese (ja)
Other versions
JPS5816824B2 (en
Inventor
Kenichi Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53109379A priority Critical patent/JPS5816824B2/en
Publication of JPS5535572A publication Critical patent/JPS5535572A/en
Publication of JPS5816824B2 publication Critical patent/JPS5816824B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To increase the processing capacity for the storage exchange system by controlling each device via the CPU, selecting the transfer route, and switching the bus switch circuit to perform transfer of the information. CONSTITUTION:Input control devices 31-3n and output control devices 41-4n control input devices 11-1n and output devices 21-2n each of the facsimile terminals or the like, along with installation of the velocity switching buffer memory and the bus switching device. Then the information transfer is controlled via transfer control devices 3 and 4 for large-capacity memory device MEM1,2...k which store the information. Devices 3 and 4 are connected via buses 5 and 6 to devices 31-3n or devices 41-4n, and each device is controlled by the CPU. And the CPU selects the transfer routes and switches the bus switch circuit to perform the information transfer. As a result, the processing capacity can be increased for the storage exchange system.
JP53109379A 1978-09-06 1978-09-06 Store and forward method Expired JPS5816824B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53109379A JPS5816824B2 (en) 1978-09-06 1978-09-06 Store and forward method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53109379A JPS5816824B2 (en) 1978-09-06 1978-09-06 Store and forward method

Publications (2)

Publication Number Publication Date
JPS5535572A true JPS5535572A (en) 1980-03-12
JPS5816824B2 JPS5816824B2 (en) 1983-04-02

Family

ID=14508742

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53109379A Expired JPS5816824B2 (en) 1978-09-06 1978-09-06 Store and forward method

Country Status (1)

Country Link
JP (1) JPS5816824B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115958A (en) * 1981-12-29 1983-07-09 Fujitsu Ltd Exchange control system
JPS58151749A (en) * 1982-03-05 1983-09-09 Nec Corp Packet multiplying device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5393741A (en) * 1977-01-26 1978-08-17 Hokushin Electric Works Duplex data transfer system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5393741A (en) * 1977-01-26 1978-08-17 Hokushin Electric Works Duplex data transfer system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58115958A (en) * 1981-12-29 1983-07-09 Fujitsu Ltd Exchange control system
JPH0338785B2 (en) * 1981-12-29 1991-06-11 Fujitsu Ltd
JPS58151749A (en) * 1982-03-05 1983-09-09 Nec Corp Packet multiplying device

Also Published As

Publication number Publication date
JPS5816824B2 (en) 1983-04-02

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