JPS5529188A - Controlling method of shape of pattern - Google Patents

Controlling method of shape of pattern

Info

Publication number
JPS5529188A
JPS5529188A JP10352778A JP10352778A JPS5529188A JP S5529188 A JPS5529188 A JP S5529188A JP 10352778 A JP10352778 A JP 10352778A JP 10352778 A JP10352778 A JP 10352778A JP S5529188 A JPS5529188 A JP S5529188A
Authority
JP
Japan
Prior art keywords
pattern
baking
post
etching
shape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10352778A
Other languages
Japanese (ja)
Inventor
Hisanao Tsuge
Hiroshi Gokan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10352778A priority Critical patent/JPS5529188A/en
Publication of JPS5529188A publication Critical patent/JPS5529188A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase pattern-controlling properties by post-baking a resist pattern formed on a member to be processed, at such temperatures that the pattern width does not change, but the shape of section changes, and then by applying ion-etching.
CONSTITUTION: Two layers of Cr and Au are vapor-deposited on a substrate 1 to give a film to be processed 2, and a given shape of resist pattern 3 is formed on the layers. This member is then placed in a thermostat ic oven and subjected to post-baking at such temperatures that the pattern width does not change, but only the shape of the section changes. Then, after applying masking, it is subjected to ion-etching or reverse sputtering etching to selectively remove the film 2, and the side wall of the remaining film 2 beneath the pattern 3 is provided with a given angle θ. When the temperature of the post-baking is controlled to 130°C and the partial pressure of oxygen at the etching is controlled to 1.5×10-4 Torr, the angle can be adjusted to about 40°. When no post-baking is applied, the angle is 70 to 80°, and thus it can be seen that a better angle is obtainable. Furthermore, there is no formation of damage on the film 2.
COPYRIGHT: (C)1980,JPO&Japio
JP10352778A 1978-08-24 1978-08-24 Controlling method of shape of pattern Pending JPS5529188A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10352778A JPS5529188A (en) 1978-08-24 1978-08-24 Controlling method of shape of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10352778A JPS5529188A (en) 1978-08-24 1978-08-24 Controlling method of shape of pattern

Publications (1)

Publication Number Publication Date
JPS5529188A true JPS5529188A (en) 1980-03-01

Family

ID=14356369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10352778A Pending JPS5529188A (en) 1978-08-24 1978-08-24 Controlling method of shape of pattern

Country Status (1)

Country Link
JP (1) JPS5529188A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582029A (en) * 1981-06-26 1983-01-07 Seiko Epson Corp Etching method for insulating film on semiconductor substrate
JPS61168924A (en) * 1985-01-22 1986-07-30 Seiko Instr & Electronics Ltd Selective etching method of thin chromium film
US11796922B2 (en) * 2019-09-30 2023-10-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing semiconductor devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518788A (en) * 1974-07-11 1976-01-23 Nippon Musen Irigaku Kenkyusho Choonpabiimuno tobikoshitoshanyoru shindanhoshiki
JPS5192179A (en) * 1975-02-10 1976-08-12 Bisaipataanno keiseihoho

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518788A (en) * 1974-07-11 1976-01-23 Nippon Musen Irigaku Kenkyusho Choonpabiimuno tobikoshitoshanyoru shindanhoshiki
JPS5192179A (en) * 1975-02-10 1976-08-12 Bisaipataanno keiseihoho

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582029A (en) * 1981-06-26 1983-01-07 Seiko Epson Corp Etching method for insulating film on semiconductor substrate
JPS61168924A (en) * 1985-01-22 1986-07-30 Seiko Instr & Electronics Ltd Selective etching method of thin chromium film
US11796922B2 (en) * 2019-09-30 2023-10-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing semiconductor devices

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