JPS55157178A - Information processing unit - Google Patents
Information processing unitInfo
- Publication number
- JPS55157178A JPS55157178A JP6424979A JP6424979A JPS55157178A JP S55157178 A JPS55157178 A JP S55157178A JP 6424979 A JP6424979 A JP 6424979A JP 6424979 A JP6424979 A JP 6424979A JP S55157178 A JPS55157178 A JP S55157178A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- write
- control
- write access
- cash
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To perform the write access processing of the swap system without complication of control and increment of hardware in the unit equipped with a cash memory, by controlling the write to the cash memory and the main memory according to the storage stage dependent upon the flip-flop of a control flag.
CONSTITUTION: When store control flag storage FF6 of cash memory control unit 2 is set by microprocessor 5 and the control flag is stored, cash memory control circuit 4 generates a write control signal only for cash memory 3 for write request from processor 5, and the write to memory 3 is accessed, and the write access to main memory 1 is inhibited. Meanswhile, when the flag is not stored and the FF is reset, the write access of memory 1 is executed after write access of memory 3 through circuit 4, so that the write access dependent upon the swapping system whre the write access of the main memory is executed only at a required time can be performed without increment of hardware and complication of control.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6424979A JPS55157178A (en) | 1979-05-24 | 1979-05-24 | Information processing unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6424979A JPS55157178A (en) | 1979-05-24 | 1979-05-24 | Information processing unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55157178A true JPS55157178A (en) | 1980-12-06 |
Family
ID=13252686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6424979A Pending JPS55157178A (en) | 1979-05-24 | 1979-05-24 | Information processing unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55157178A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5892053A (en) * | 1981-11-28 | 1983-06-01 | Nec Corp | Disc cash device |
JPS63313252A (en) * | 1987-06-16 | 1988-12-21 | Nec Corp | Cache system |
-
1979
- 1979-05-24 JP JP6424979A patent/JPS55157178A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5892053A (en) * | 1981-11-28 | 1983-06-01 | Nec Corp | Disc cash device |
JPS6141020B2 (en) * | 1981-11-28 | 1986-09-12 | Nippon Electric Co | |
JPS63313252A (en) * | 1987-06-16 | 1988-12-21 | Nec Corp | Cache system |
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