JPS5515583A - Bit slice type arithmetic circuit - Google Patents
Bit slice type arithmetic circuitInfo
- Publication number
- JPS5515583A JPS5515583A JP8957778A JP8957778A JPS5515583A JP S5515583 A JPS5515583 A JP S5515583A JP 8957778 A JP8957778 A JP 8957778A JP 8957778 A JP8957778 A JP 8957778A JP S5515583 A JPS5515583 A JP S5515583A
- Authority
- JP
- Japan
- Prior art keywords
- carry
- output
- circuits
- arithmetic
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To reduce apparent look-ahead carry circuits in number by making it possible to generate a carry generation output and carry propagating output by building a carry look-ahead circuit with a carry control input in each arithmetic circuit.
CONSTITUTION: Input-stage logic circuits 51 to 54 generate outputs Xi and Yi (i=0W3) by two input data A=A0WA3 and B=B0WB3 and arithmetic control signals S0 to S4. In case of arithmetic of S4=1, internal carry generating circuits 55 to 58 carry digits from lower bits to upper bits and in case of logical operation of S4= 0, the content of output Yi is outputted, as it is, to arithmetic result Fi. Carry signal 50 supplied to circuits 55 to 58 is formed on the basis of a lower arithmetic circuit. When control input M is zero, the output of gate 66 is 1 while that of gate 68 is 0, so that carry generation output G and carry propagation output P will be determined only by input data A and B. In case of M=1, the output of gate 66 indicates that three lower arithmetic circuits are under the carry propagation conditon, thereby making it possible to reduce apparent look-ahead circuits.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8957778A JPS5515583A (en) | 1978-07-21 | 1978-07-21 | Bit slice type arithmetic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8957778A JPS5515583A (en) | 1978-07-21 | 1978-07-21 | Bit slice type arithmetic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5515583A true JPS5515583A (en) | 1980-02-02 |
JPS6129018B2 JPS6129018B2 (en) | 1986-07-03 |
Family
ID=13974646
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8957778A Granted JPS5515583A (en) | 1978-07-21 | 1978-07-21 | Bit slice type arithmetic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5515583A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5848142A (en) * | 1981-09-17 | 1983-03-22 | Toshiba Corp | High-speed adding circuit |
EP0242600A2 (en) * | 1986-03-20 | 1987-10-28 | Kabushiki Kaisha Toshiba | Carry look-ahead calculating method and circuits therefor |
-
1978
- 1978-07-21 JP JP8957778A patent/JPS5515583A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5848142A (en) * | 1981-09-17 | 1983-03-22 | Toshiba Corp | High-speed adding circuit |
EP0242600A2 (en) * | 1986-03-20 | 1987-10-28 | Kabushiki Kaisha Toshiba | Carry look-ahead calculating method and circuits therefor |
Also Published As
Publication number | Publication date |
---|---|
JPS6129018B2 (en) | 1986-07-03 |
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