JPS55147972A - Method and circuit for protecting overcurrent of gate turn-off thyristor - Google Patents
Method and circuit for protecting overcurrent of gate turn-off thyristorInfo
- Publication number
- JPS55147972A JPS55147972A JP5600479A JP5600479A JPS55147972A JP S55147972 A JPS55147972 A JP S55147972A JP 5600479 A JP5600479 A JP 5600479A JP 5600479 A JP5600479 A JP 5600479A JP S55147972 A JPS55147972 A JP S55147972A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- signal
- gto
- circuit
- thyristor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Abstract
PURPOSE:To improve the utility rate of a GTO by discriminating the on and off state of the GTO when abnormal overcurrent occurs at the GTO to effectively maintain an on-off setting signal when the abnormal overcurrent occurs during the output period. CONSTITUTION:A gate turn-off thyristor (GTO) is controlled on or off by a gate on signal C or a gate off signal D generated on the basis of a clock signal A. An inverter 54 is provided at the final stage of a gate off circuit. An abnormal overcurrent signal B is applied through an inverter 56 to the first logic circuit consisting of a NAND gate 58 for outputting a stop signal to a gate on circuit and the second logic circuit consisting of a NAND gate 60 for outputting a stop signal to a gate off circuit. When an abnormal overcurrent occurs, the on or off state of the GTO is discriminated by the NAND gate 58, 60 to conduct the control operation in response to the respective states.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5600479A JPS55147972A (en) | 1979-05-08 | 1979-05-08 | Method and circuit for protecting overcurrent of gate turn-off thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5600479A JPS55147972A (en) | 1979-05-08 | 1979-05-08 | Method and circuit for protecting overcurrent of gate turn-off thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55147972A true JPS55147972A (en) | 1980-11-18 |
Family
ID=13014907
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5600479A Pending JPS55147972A (en) | 1979-05-08 | 1979-05-08 | Method and circuit for protecting overcurrent of gate turn-off thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55147972A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6130969A (en) * | 1984-07-23 | 1986-02-13 | Hitachi Ltd | Inverter device |
-
1979
- 1979-05-08 JP JP5600479A patent/JPS55147972A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6130969A (en) * | 1984-07-23 | 1986-02-13 | Hitachi Ltd | Inverter device |
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