JPS5513952A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device

Info

Publication number
JPS5513952A
JPS5513952A JP8729278A JP8729278A JPS5513952A JP S5513952 A JPS5513952 A JP S5513952A JP 8729278 A JP8729278 A JP 8729278A JP 8729278 A JP8729278 A JP 8729278A JP S5513952 A JPS5513952 A JP S5513952A
Authority
JP
Japan
Prior art keywords
film
substrate
sio
oxidizing
admixture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8729278A
Other languages
Japanese (ja)
Inventor
Shinichi Inoue
Masaru Shiraki
Nobuo Toyokura
Hajime Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8729278A priority Critical patent/JPS5513952A/en
Publication of JPS5513952A publication Critical patent/JPS5513952A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To obtain a MOS type semiconductor device that has a high withstand voltage by treating the surface of a substrate with an admixture of phosphoric acid and fluoric acid, prior to covering a gate oxidizing film over an area of the semiconductor substrate being surrounded by a field oxidizing film.
CONSTITUTION: A laminate consisting of a SiO2 film 22 and a Si3N4 film 23, both of which have required shapes, is provided on the center section of a Si substrate 21. Then it is heat treated in an oxidizing atmosphere, thus forming a thick filed SiO2 film 24 around the laminate. After that, the film 22 and 23 are removed so that the surface of the substrate 21 is exposed, to where a thin gate SiO2 film 25 is formed. But prior to this operation, the surface of the substrate 21 is pretreated by an admixture of phosphoric acid and fluoric acid, then heat treated in an oxidizing atmosphere to make the film 25 grow. Then the conventional processes follow: forming a gate electrode 26 on the film 25; providing source-drain regions 27 and 28 at the both ends of the film 25 in the substrate; covering the entire surface with a SiO2 film 29; and making openings to where electrodes 30 and 31 are installed. With this constitution, a withstant voltage of 9 to 10 MV/cm can be obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP8729278A 1978-07-18 1978-07-18 Manufacturing method of semiconductor device Pending JPS5513952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8729278A JPS5513952A (en) 1978-07-18 1978-07-18 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8729278A JPS5513952A (en) 1978-07-18 1978-07-18 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5513952A true JPS5513952A (en) 1980-01-31

Family

ID=13910724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8729278A Pending JPS5513952A (en) 1978-07-18 1978-07-18 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5513952A (en)

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