JPS55138229A - Manufacture of dielectric material for insulation- separation substrate - Google Patents

Manufacture of dielectric material for insulation- separation substrate

Info

Publication number
JPS55138229A
JPS55138229A JP4436579A JP4436579A JPS55138229A JP S55138229 A JPS55138229 A JP S55138229A JP 4436579 A JP4436579 A JP 4436579A JP 4436579 A JP4436579 A JP 4436579A JP S55138229 A JPS55138229 A JP S55138229A
Authority
JP
Japan
Prior art keywords
layers
polycrystalline
layer
substrate
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4436579A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6152572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Junichiro Horiuchi
Hideyuki Yagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4436579A priority Critical patent/JPS55138229A/ja
Priority to US06/138,992 priority patent/US4310965A/en
Priority to DE8080301166T priority patent/DE3066128D1/de
Priority to EP80301166A priority patent/EP0018178B1/en
Publication of JPS55138229A publication Critical patent/JPS55138229A/ja
Publication of JPS6152572B2 publication Critical patent/JPS6152572B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
JP4436579A 1979-04-13 1979-04-13 Manufacture of dielectric material for insulation- separation substrate Granted JPS55138229A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP4436579A JPS55138229A (en) 1979-04-13 1979-04-13 Manufacture of dielectric material for insulation- separation substrate
US06/138,992 US4310965A (en) 1979-04-13 1980-04-10 Process for producing a dielectric insulator separated substrate
DE8080301166T DE3066128D1 (en) 1979-04-13 1980-04-11 Process for producing a composite body for a semiconductor integrated circuit
EP80301166A EP0018178B1 (en) 1979-04-13 1980-04-11 Process for producing a composite body for a semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4436579A JPS55138229A (en) 1979-04-13 1979-04-13 Manufacture of dielectric material for insulation- separation substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP20652785A Division JPS61166039A (ja) 1985-09-20 1985-09-20 誘電体絶縁分離基板

Publications (2)

Publication Number Publication Date
JPS55138229A true JPS55138229A (en) 1980-10-28
JPS6152572B2 JPS6152572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-13

Family

ID=12689474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4436579A Granted JPS55138229A (en) 1979-04-13 1979-04-13 Manufacture of dielectric material for insulation- separation substrate

Country Status (4)

Country Link
US (1) US4310965A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0018178B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS55138229A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3066128D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4631804A (en) * 1984-12-10 1986-12-30 At&T Bell Laboratories Technique for reducing substrate warpage springback using a polysilicon subsurface strained layer
US4742020A (en) * 1985-02-01 1988-05-03 American Telephone And Telegraph Company, At&T Bell Laboratories Multilayering process for stress accommodation in deposited polysilicon
US4606936A (en) * 1985-04-12 1986-08-19 Harris Corporation Stress free dielectric isolation technology
US4859629A (en) * 1986-04-18 1989-08-22 M/A-Com, Inc. Method of fabricating a semiconductor beam lead device
GB9014491D0 (en) * 1990-06-29 1990-08-22 Digital Equipment Int Mounting silicon chips
US6310385B1 (en) * 1997-01-16 2001-10-30 International Rectifier Corp. High band gap layer to isolate wells in high voltage power integrated circuits
DE10246949B4 (de) * 2002-10-08 2012-06-28 X-Fab Semiconductor Foundries Ag Verbesserte Trench-Isolation und Herstellungsverfahren

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3574007A (en) * 1967-07-19 1971-04-06 Frances Hugle Method of manufacturing improved mis transistor arrays
FR1597033A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1968-06-19 1970-06-22
US3624463A (en) * 1969-10-17 1971-11-30 Motorola Inc Method of and apparatus for indicating semiconductor island thickness and for increasing isolation and decreasing capacity between islands
JPS5120267B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1972-05-13 1976-06-23
JPS5222516B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-02-07 1977-06-17
US3862852A (en) * 1973-06-01 1975-01-28 Fairchild Camera Instr Co Method of obtaining high-quality thick films of polycrystalline silicone from dielectric isolation
GB1436434A (en) * 1973-10-04 1976-05-19 Gec Semiconductors Ltd Methods of fabricating integrated circuits
JPS5329551B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-08-19 1978-08-22
JPS5718341B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-12-11 1982-04-16
JPS51131280A (en) * 1975-05-12 1976-11-15 Hitachi Ltd Dielectric insulation separation base manufacturing process
US4173674A (en) * 1975-05-12 1979-11-06 Hitachi, Ltd. Dielectric insulator separated substrate for semiconductor integrated circuits

Also Published As

Publication number Publication date
EP0018178A1 (en) 1980-10-29
EP0018178B1 (en) 1984-01-18
DE3066128D1 (en) 1984-02-23
US4310965A (en) 1982-01-19
JPS6152572B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-13

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