JPS55129914A - Digital recording and reproducing system - Google Patents
Digital recording and reproducing systemInfo
- Publication number
- JPS55129914A JPS55129914A JP3750579A JP3750579A JPS55129914A JP S55129914 A JPS55129914 A JP S55129914A JP 3750579 A JP3750579 A JP 3750579A JP 3750579 A JP3750579 A JP 3750579A JP S55129914 A JPS55129914 A JP S55129914A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- block
- synchronizing
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10527—Audio or video recording; Data buffering arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE:To make it possible simplify a control system and record and reproduce stably signals effectively, by forming and using a simple synchronizing signal. CONSTITUTION:The first block is formed with a data signal of plural word, a one- word parity signal, a one-word error check signal, and one-word information consisting of a synchronizing signal and a control signal, and plural first blocks are collected to form the second block. The output of multiplexer 11 multiplexed in time division is converted to a digital data signal at a prescribed sampling period by A/D converter 12, and a parity signal is added to this data sighal by parity adding circuit 13, and these signals are written in memory 14 and are subjected to the interleave processing. Adder 18 inserts output signals of control signal generating circuit 15 and check signal generating circuit 16 to the data region. Meanwhile, synchronizing signal generating circuits 21 and 22 generate the first and the second synchronizing signals of signal patterns different from each other, and switch circuit 23 selects the signal of circuit 21 and the synchronizing signal of circuit 22 during the first block signal formation and the rest period respectively. Adder 24 inserts selectively the control signal to the beginning of the first block of the sequence added by adder 20.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3750579A JPS55129914A (en) | 1979-03-29 | 1979-03-29 | Digital recording and reproducing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3750579A JPS55129914A (en) | 1979-03-29 | 1979-03-29 | Digital recording and reproducing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55129914A true JPS55129914A (en) | 1980-10-08 |
Family
ID=12499378
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3750579A Pending JPS55129914A (en) | 1979-03-29 | 1979-03-29 | Digital recording and reproducing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55129914A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5894254A (en) * | 1981-11-30 | 1983-06-04 | Sony Corp | Digital signal transmitter |
JPS58147257A (en) * | 1982-02-26 | 1983-09-02 | Sony Corp | Digital data transmitting method |
JPS58161111A (en) * | 1982-03-19 | 1983-09-24 | Hitachi Ltd | Data recording and reproducing device |
JPS58168346A (en) * | 1982-03-30 | 1983-10-04 | Sony Corp | Encoding method of error correction |
JPS60236531A (en) * | 1984-04-17 | 1985-11-25 | Fujitsu Ltd | Signal protection system against transmission error |
JPH05205402A (en) * | 1992-06-29 | 1993-08-13 | Hitachi Ltd | Recording and reproducing method |
-
1979
- 1979-03-29 JP JP3750579A patent/JPS55129914A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5894254A (en) * | 1981-11-30 | 1983-06-04 | Sony Corp | Digital signal transmitter |
JPH0416868B2 (en) * | 1981-11-30 | 1992-03-25 | Sony Corp | |
JPS58147257A (en) * | 1982-02-26 | 1983-09-02 | Sony Corp | Digital data transmitting method |
JPS58161111A (en) * | 1982-03-19 | 1983-09-24 | Hitachi Ltd | Data recording and reproducing device |
JPS58168346A (en) * | 1982-03-30 | 1983-10-04 | Sony Corp | Encoding method of error correction |
JPS60236531A (en) * | 1984-04-17 | 1985-11-25 | Fujitsu Ltd | Signal protection system against transmission error |
JPH05205402A (en) * | 1992-06-29 | 1993-08-13 | Hitachi Ltd | Recording and reproducing method |
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