JPS55125595A - Nonsynchronous switching system for dynamic random access memory - Google Patents

Nonsynchronous switching system for dynamic random access memory

Info

Publication number
JPS55125595A
JPS55125595A JP3351779A JP3351779A JPS55125595A JP S55125595 A JPS55125595 A JP S55125595A JP 3351779 A JP3351779 A JP 3351779A JP 3351779 A JP3351779 A JP 3351779A JP S55125595 A JPS55125595 A JP S55125595A
Authority
JP
Japan
Prior art keywords
delay
memory
gate
switching
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3351779A
Other languages
Japanese (ja)
Inventor
Kan Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3351779A priority Critical patent/JPS55125595A/en
Publication of JPS55125595A publication Critical patent/JPS55125595A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To ensure the smooth switching with no disturbance given to the memory, by giving the delay to plural units of new clocks which operate nonsynchronously to each other and are switched as the clock switching time along with the driving given to the memory by the minimum cycle time of the memory. CONSTITUTION:Clock(B), address(B), read/write(B), data(B) and others are connected to the line corresponding to unit(A) 1 from unit(B) 2 via gate 6 as well as delay circuits 51-54 each. Then the interruption signal is delayed through delay circuit 55 featuring the same delay time, and gate 6 is turned on by the delayed signal. At the same time, two signals of before and after the delay perform the switching with gate 7 turned off and through the OR circuit and the inverter. Thus gate 7 is turned off to give assurance to the precharge due to the final clock of before switching. As a result, the data breakdown or the like can be prevented within the memory.
JP3351779A 1979-03-22 1979-03-22 Nonsynchronous switching system for dynamic random access memory Pending JPS55125595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3351779A JPS55125595A (en) 1979-03-22 1979-03-22 Nonsynchronous switching system for dynamic random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3351779A JPS55125595A (en) 1979-03-22 1979-03-22 Nonsynchronous switching system for dynamic random access memory

Publications (1)

Publication Number Publication Date
JPS55125595A true JPS55125595A (en) 1980-09-27

Family

ID=12388730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3351779A Pending JPS55125595A (en) 1979-03-22 1979-03-22 Nonsynchronous switching system for dynamic random access memory

Country Status (1)

Country Link
JP (1) JPS55125595A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744063A (en) * 1983-05-31 1988-05-10 Kabushiki Kaisha Toshiba Static memory utilizing transition detectors to reduce power consumption

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744063A (en) * 1983-05-31 1988-05-10 Kabushiki Kaisha Toshiba Static memory utilizing transition detectors to reduce power consumption

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