JPS5685130A - Rom access circuit - Google Patents
Rom access circuitInfo
- Publication number
- JPS5685130A JPS5685130A JP16302579A JP16302579A JPS5685130A JP S5685130 A JPS5685130 A JP S5685130A JP 16302579 A JP16302579 A JP 16302579A JP 16302579 A JP16302579 A JP 16302579A JP S5685130 A JPS5685130 A JP S5685130A
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- counter
- rom
- latched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE: To eliminate the waiting time of microprocessor even with use of the ROM having a long access time, by giving an access to other memory data after dividing the memory data read out of the ROM into 5n units for processing.
CONSTITUTION: The address delivered from the microprocessor 4 is preset to the preset counter 2, and the contents of the counter are given to the memory device 1 to send the memory data by one word (32 bits) for latching at the latch memory 14. The 8-bit data of the first division part among the latched data is selected by the multiplexer 16 to be sent to the data bus 6. After this, the count-up signal CU is applied to the counter 2 with the second address given to the device 1 to read out the memory data. Then the data of the second, third and fourth division parts of the memory 14 are sent to the bus 6. After this, the second data is latched.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16302579A JPS5685130A (en) | 1979-12-12 | 1979-12-12 | Rom access circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16302579A JPS5685130A (en) | 1979-12-12 | 1979-12-12 | Rom access circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5685130A true JPS5685130A (en) | 1981-07-11 |
Family
ID=15765749
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16302579A Pending JPS5685130A (en) | 1979-12-12 | 1979-12-12 | Rom access circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5685130A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58102392A (en) * | 1981-12-14 | 1983-06-17 | Matsushita Electric Ind Co Ltd | Read-only memory control circuit |
JPS59226923A (en) * | 1983-05-27 | 1984-12-20 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Bus interface apparatus |
JPS61286942A (en) * | 1985-06-13 | 1986-12-17 | Victor Co Of Japan Ltd | Memory element access controller |
JPS63118966A (en) * | 1986-11-07 | 1988-05-23 | Nec Corp | Data transfer controller |
JPS6460894A (en) * | 1987-08-31 | 1989-03-07 | Fujitsu Ltd | Non-volatile semiconductor memory device |
JPH0512894A (en) * | 1991-07-05 | 1993-01-22 | Mitsubishi Electric Corp | Microcomputer and its rom reading method |
-
1979
- 1979-12-12 JP JP16302579A patent/JPS5685130A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58102392A (en) * | 1981-12-14 | 1983-06-17 | Matsushita Electric Ind Co Ltd | Read-only memory control circuit |
JPS59226923A (en) * | 1983-05-27 | 1984-12-20 | インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン | Bus interface apparatus |
JPS61286942A (en) * | 1985-06-13 | 1986-12-17 | Victor Co Of Japan Ltd | Memory element access controller |
JPS63118966A (en) * | 1986-11-07 | 1988-05-23 | Nec Corp | Data transfer controller |
JPS6460894A (en) * | 1987-08-31 | 1989-03-07 | Fujitsu Ltd | Non-volatile semiconductor memory device |
JPH0512894A (en) * | 1991-07-05 | 1993-01-22 | Mitsubishi Electric Corp | Microcomputer and its rom reading method |
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