JPS55110079A - Field-effect transistor - Google Patents

Field-effect transistor

Info

Publication number
JPS55110079A
JPS55110079A JP1649479A JP1649479A JPS55110079A JP S55110079 A JPS55110079 A JP S55110079A JP 1649479 A JP1649479 A JP 1649479A JP 1649479 A JP1649479 A JP 1649479A JP S55110079 A JPS55110079 A JP S55110079A
Authority
JP
Japan
Prior art keywords
layer
gate
region
substrate
channel region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1649479A
Other languages
Japanese (ja)
Inventor
Yoshito Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1649479A priority Critical patent/JPS55110079A/en
Publication of JPS55110079A publication Critical patent/JPS55110079A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To obtain a low input impedance JFET by adding heavy metal in the neighborhood of the pn junction constituting a channel region.
CONSTITUTION: N-layer 4 is provided on p-type Si substrate 3. p-Type gate layer 5 is formed, and layer 5 and substrate 11 are connected by region 7. Lower part 6 of layer 5 is a channel region. Next, n+-type source region 8 and drain region 9 are formed and Al terminals 10, 11 are connected to them. Finally, Au is diffused over the entire back surface of substrate 3. By operating heat treatment, Au is added to the neighborhood of the junction of layer 5 forming channel region 6. The proper concentration of Au is 1×1013∼1017cm-3. By this structure, it is possible to make the input impedance sufficiently small regardless of the polarity of the gate bias voltage, so that it is possible to fix the DC-like gate potential without inserting an ecternal resistor or a diode between gate and source as practiced at the conventional devices.
COPYRIGHT: (C)1980,JPO&Japio
JP1649479A 1979-02-15 1979-02-15 Field-effect transistor Pending JPS55110079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1649479A JPS55110079A (en) 1979-02-15 1979-02-15 Field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1649479A JPS55110079A (en) 1979-02-15 1979-02-15 Field-effect transistor

Publications (1)

Publication Number Publication Date
JPS55110079A true JPS55110079A (en) 1980-08-25

Family

ID=11917832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1649479A Pending JPS55110079A (en) 1979-02-15 1979-02-15 Field-effect transistor

Country Status (1)

Country Link
JP (1) JPS55110079A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4964590A (en) * 1981-11-11 1990-10-23 Shimano Industrial Company Limited Fishing reel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4964590A (en) * 1981-11-11 1990-10-23 Shimano Industrial Company Limited Fishing reel
US5139212A (en) * 1981-11-11 1992-08-18 Shimano Corporation Fishing reel

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