JPS5444483A - Mos type semiconductor device and its manufacture - Google Patents

Mos type semiconductor device and its manufacture

Info

Publication number
JPS5444483A
JPS5444483A JP11072577A JP11072577A JPS5444483A JP S5444483 A JPS5444483 A JP S5444483A JP 11072577 A JP11072577 A JP 11072577A JP 11072577 A JP11072577 A JP 11072577A JP S5444483 A JPS5444483 A JP S5444483A
Authority
JP
Japan
Prior art keywords
gate
film
layers
oxide film
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11072577A
Other languages
Japanese (ja)
Other versions
JPS6110996B2 (en
Inventor
Takeya Ezaki
Onori Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11072577A priority Critical patent/JPS5444483A/en
Publication of JPS5444483A publication Critical patent/JPS5444483A/en
Publication of JPS6110996B2 publication Critical patent/JPS6110996B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To remarkably make short the channel length, by forming doped oxide with self-alignment along the gate side surface.
CONSTITUTION: The field oxide film, gate oxide film, and ploly-crystal Si gate 4 are provided on the p type Si 1, and the n layer 23 is made by injecting B ions selectively. Succeedingly, the CVD oxide film 24 filled with phosphours is uniformly deposited, etching gas is veritically flown and it is stopped when the film 24 on the gate upper side 4a is removed, the film 24' is left on the side surface 4b. Next, when the n+ layers 25 and 26 are made with phosphorus diffusion, the n diffusion layers 27 and 28 are caused from the film 24', and the p layer 23' is caused beneath the gate 4. The junction depth of the layers 25 and 26 is selected so that it does not reach the region beneath the gate. After that, the insulation film 9 is deposited and electrodes 33 to 35 are made by opening window. With this constitution, the junction depth can accruately be controlled with low concentration of the layers 27 and 28, the performance is uniform even with shorter effective channel Le, and the dielectric strength can not be lowered for the gate film.
COPYRIGHT: (C)1979,JPO&Japio
JP11072577A 1977-09-14 1977-09-14 Mos type semiconductor device and its manufacture Granted JPS5444483A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11072577A JPS5444483A (en) 1977-09-14 1977-09-14 Mos type semiconductor device and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11072577A JPS5444483A (en) 1977-09-14 1977-09-14 Mos type semiconductor device and its manufacture

Publications (2)

Publication Number Publication Date
JPS5444483A true JPS5444483A (en) 1979-04-07
JPS6110996B2 JPS6110996B2 (en) 1986-04-01

Family

ID=14542899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11072577A Granted JPS5444483A (en) 1977-09-14 1977-09-14 Mos type semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS5444483A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5562733A (en) * 1978-11-03 1980-05-12 Ibm Method of forming narrow region on silicon substrate
JPS5694777A (en) * 1979-12-20 1981-07-31 Ibm Method of manufacturing semiconductor
JPS57184249A (en) * 1978-11-03 1982-11-12 Ibm Method of forming double dispersion type fet device
JPS59167067A (en) * 1982-12-28 1984-09-20 マステク,コ−パレイシヤン Method of producing field effect transistor
JPS61159768A (en) * 1978-11-03 1986-07-19 インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン Manufacture of field effect transistor

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63223397A (en) * 1987-03-12 1988-09-16 Tsurumi Mfg Co Ltd Impeller for motor centrifugal pump

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5562733A (en) * 1978-11-03 1980-05-12 Ibm Method of forming narrow region on silicon substrate
JPS57184249A (en) * 1978-11-03 1982-11-12 Ibm Method of forming double dispersion type fet device
JPS5928983B2 (en) * 1978-11-03 1984-07-17 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of forming buried insulation isolation region
JPS61159768A (en) * 1978-11-03 1986-07-19 インタ−ナシヨナル ビジネス マシ−ンズ コ−ポレ−シヨン Manufacture of field effect transistor
JPH0347577B2 (en) * 1978-11-03 1991-07-19 Intaanashonaru Bijinesu Mashiinzu Corp
JPH0358173B2 (en) * 1978-11-03 1991-09-04 Intaanashonaru Bijinesu Mashiinzu Corp
JPS5694777A (en) * 1979-12-20 1981-07-31 Ibm Method of manufacturing semiconductor
JPH0123954B2 (en) * 1979-12-20 1989-05-09 Intaanashonaru Bijinesu Mashiinzu Corp
JPS59167067A (en) * 1982-12-28 1984-09-20 マステク,コ−パレイシヤン Method of producing field effect transistor

Also Published As

Publication number Publication date
JPS6110996B2 (en) 1986-04-01

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