JPS54145476A - Package for semiconductor - Google Patents

Package for semiconductor

Info

Publication number
JPS54145476A
JPS54145476A JP5330078A JP5330078A JPS54145476A JP S54145476 A JPS54145476 A JP S54145476A JP 5330078 A JP5330078 A JP 5330078A JP 5330078 A JP5330078 A JP 5330078A JP S54145476 A JPS54145476 A JP S54145476A
Authority
JP
Japan
Prior art keywords
chip
package
layer
eutectic reaction
mount part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5330078A
Other languages
Japanese (ja)
Inventor
Akira Ogawa
Yoshii Naruse
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5330078A priority Critical patent/JPS54145476A/en
Publication of JPS54145476A publication Critical patent/JPS54145476A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: To mount a Si chip through Au-Si eutectic reaction by making the chip mount part of a package into a tow-layer structure of Ni-Co and Au.
CONSTITUTION: When a Ni-Co layer is provided under the Au layer of a chip mount part, the substantial junction area between the package and chip never increases while many cavities basing on a difference in the diffusion speed between Ni and Si are produced in the compound in the Ni-Si metal layer. Therefore, there is no elapse variation in thermal resistance and highly-reliable mounting is possible by making use of Au-Si eutectic reaction.
COPYRIGHT: (C)1979,JPO&Japio
JP5330078A 1978-05-06 1978-05-06 Package for semiconductor Pending JPS54145476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5330078A JPS54145476A (en) 1978-05-06 1978-05-06 Package for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5330078A JPS54145476A (en) 1978-05-06 1978-05-06 Package for semiconductor

Publications (1)

Publication Number Publication Date
JPS54145476A true JPS54145476A (en) 1979-11-13

Family

ID=12938866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5330078A Pending JPS54145476A (en) 1978-05-06 1978-05-06 Package for semiconductor

Country Status (1)

Country Link
JP (1) JPS54145476A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61222143A (en) * 1986-01-25 1986-10-02 Ngk Spark Plug Co Ltd Electronic part plated with gold and manufacture thereof
US4937653A (en) * 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
JPH0391936A (en) * 1989-09-04 1991-04-17 Shinko Electric Ind Co Ltd Ceramic package

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61222143A (en) * 1986-01-25 1986-10-02 Ngk Spark Plug Co Ltd Electronic part plated with gold and manufacture thereof
JPS633036B2 (en) * 1986-01-25 1988-01-21 Ngk Spark Plug Co
US4937653A (en) * 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
USRE35119E (en) * 1988-07-21 1995-12-12 At&T Corp. Textured metallic compression bonding
JPH0391936A (en) * 1989-09-04 1991-04-17 Shinko Electric Ind Co Ltd Ceramic package
JP2781017B2 (en) * 1989-09-04 1998-07-30 新光電気工業株式会社 Ceramic package

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