JPS54131873A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54131873A
JPS54131873A JP3989878A JP3989878A JPS54131873A JP S54131873 A JPS54131873 A JP S54131873A JP 3989878 A JP3989878 A JP 3989878A JP 3989878 A JP3989878 A JP 3989878A JP S54131873 A JPS54131873 A JP S54131873A
Authority
JP
Japan
Prior art keywords
protective film
substrate
oxide film
glass powder
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3989878A
Other languages
Japanese (ja)
Inventor
Kazumi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3989878A priority Critical patent/JPS54131873A/en
Publication of JPS54131873A publication Critical patent/JPS54131873A/en
Pending legal-status Critical Current

Links

Landscapes

  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)

Abstract

PURPOSE: To obtain a glass protective film featuring a uniform thickness by burning the glass powder to the plane of the main surface of the semiconductor substrate which is coarse more than the substrate lapped with the lapping agent of No.1000.
CONSTITUTION: The semiconductor substrate, featureing surface 10 which is coarse more than that lapped with the lapping agent of No.1000, is used to remove the surface oxide film of substrate 100a containing mesa groove 6. The glass powder is coated on the surface of the substrate, and thus the uniform glass powder remains properly on the surface due to the unevenness of the surface. With burning of the glass under the prescribed conditions, protective film 7a is formed with uniform thickness. Then a selective etching is given to form opening 9, and electrodes 11W 13 are formed to be divided with the mesa groove. With this method, the surface protective film can be formed in an assured way. Furthermore, the oxide film is removed over the entire surface before formation of the protective film, and thus the photoetching is omitted for the oxide film when the electrode window is formed. As a result, the manufacturing process can be reduced.
COPYRIGHT: (C)1979,JPO&Japio
JP3989878A 1978-04-04 1978-04-04 Manufacture of semiconductor device Pending JPS54131873A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3989878A JPS54131873A (en) 1978-04-04 1978-04-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3989878A JPS54131873A (en) 1978-04-04 1978-04-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54131873A true JPS54131873A (en) 1979-10-13

Family

ID=12565772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3989878A Pending JPS54131873A (en) 1978-04-04 1978-04-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54131873A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6355973B1 (en) * 1991-02-20 2002-03-12 Texas Instruments Incorporated Integrated circuit having a sealed edge

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6355973B1 (en) * 1991-02-20 2002-03-12 Texas Instruments Incorporated Integrated circuit having a sealed edge

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