JPS54131835A - Information process system - Google Patents
Information process systemInfo
- Publication number
- JPS54131835A JPS54131835A JP3987278A JP3987278A JPS54131835A JP S54131835 A JPS54131835 A JP S54131835A JP 3987278 A JP3987278 A JP 3987278A JP 3987278 A JP3987278 A JP 3987278A JP S54131835 A JPS54131835 A JP S54131835A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- unit
- request
- signal
- transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Multi Processors (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE: To increase the number of the controlable processor by tiering the bus bar to be connected with plural units of processors as well as to avoid the fault, if occurred at one tier bus, from affecting buses of other tiers.
CONSTITUTION: The system includes 1st bus control unit 1, 2nd bus control units 21W23, processors 311W342 plus buses 4 and 51W53. The request sounding is given to unit 311, 312 ... in which unit 21 is connected to bus 51. In response to the request sounding, transfer requrest signal 5b and address 5e are sent out together from unit 311. Thus, whether the transfer request belongs to the unit connected to the bus of other tier is decided by address 5e at unit 21. And in case the request is of the upper-rank tier (such as bus 4), transfer request signal 4b is transmitted to upper bus control unit 1 in response to request sounding signal 4a of bus 4. In case the request signal is accepted at unit 1, unit 21 informs so to bus 5 by transmitting request acceptance signal 5c. At the same time, the connection is secured between data bus 4e and 5e as well as between address bus 4f and 5f so as to ensure execution of the transfer action.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3987278A JPS54131835A (en) | 1978-04-04 | 1978-04-04 | Information process system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3987278A JPS54131835A (en) | 1978-04-04 | 1978-04-04 | Information process system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54131835A true JPS54131835A (en) | 1979-10-13 |
Family
ID=12565062
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3987278A Pending JPS54131835A (en) | 1978-04-04 | 1978-04-04 | Information process system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54131835A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62219826A (en) * | 1986-03-20 | 1987-09-28 | Mitsubishi Electric Corp | Gateway of load control system |
JPH01183757A (en) * | 1988-01-18 | 1989-07-21 | Nippon Signal Co Ltd:The | Bus extending device for computer system |
-
1978
- 1978-04-04 JP JP3987278A patent/JPS54131835A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62219826A (en) * | 1986-03-20 | 1987-09-28 | Mitsubishi Electric Corp | Gateway of load control system |
JPH01183757A (en) * | 1988-01-18 | 1989-07-21 | Nippon Signal Co Ltd:The | Bus extending device for computer system |
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