JPS54128670A - Manufacture for semiconductor device - Google Patents

Manufacture for semiconductor device

Info

Publication number
JPS54128670A
JPS54128670A JP3731378A JP3731378A JPS54128670A JP S54128670 A JPS54128670 A JP S54128670A JP 3731378 A JP3731378 A JP 3731378A JP 3731378 A JP3731378 A JP 3731378A JP S54128670 A JPS54128670 A JP S54128670A
Authority
JP
Japan
Prior art keywords
film
layer
circumference
plating
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3731378A
Other languages
Japanese (ja)
Other versions
JPS5827651B2 (en
Inventor
Kuniyoshi Fukuda
Seiji Tachibana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP53037313A priority Critical patent/JPS5827651B2/en
Publication of JPS54128670A publication Critical patent/JPS54128670A/en
Publication of JPS5827651B2 publication Critical patent/JPS5827651B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Abstract

PURPOSE: To block the formation of projection electrode at the circumference by leaving the insulation layer at the circumference of the semiconductor wafer.
CONSTITUTION: P type diffusion layer is formed on the N type substrate and the resist mask 8 is formed, and the oxide thin film is removed caused at the formation of P type layer. On the exposed layer 2, the gold evaporated film 4 is provided and the AuSb alloy evaporation film 5 and the Ag plating film 6 are laminated on the entire surface of the substrate 1. When silver plating is made by taking the film 6 with the negative electrode plating solution as the positive, the silver projecting electrode 7 is formed on the film 4 and no electrode is formed on the P type layer 2 at the circumference with the resist mask 8. Thus, the yield rate is increased and the plating time can be reduced.
COPYRIGHT: (C)1979,JPO&Japio
JP53037313A 1978-03-29 1978-03-29 Manufacturing method of semiconductor device Expired JPS5827651B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53037313A JPS5827651B2 (en) 1978-03-29 1978-03-29 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53037313A JPS5827651B2 (en) 1978-03-29 1978-03-29 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS54128670A true JPS54128670A (en) 1979-10-05
JPS5827651B2 JPS5827651B2 (en) 1983-06-10

Family

ID=12494190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53037313A Expired JPS5827651B2 (en) 1978-03-29 1978-03-29 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5827651B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051269A (en) * 1973-09-07 1975-05-08
JPS52146560A (en) * 1976-05-31 1977-12-06 Nec Home Electronics Ltd Electrode plating apparatus for semiconductor devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051269A (en) * 1973-09-07 1975-05-08
JPS52146560A (en) * 1976-05-31 1977-12-06 Nec Home Electronics Ltd Electrode plating apparatus for semiconductor devices

Also Published As

Publication number Publication date
JPS5827651B2 (en) 1983-06-10

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