JPS54124677A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54124677A
JPS54124677A JP3269778A JP3269778A JPS54124677A JP S54124677 A JPS54124677 A JP S54124677A JP 3269778 A JP3269778 A JP 3269778A JP 3269778 A JP3269778 A JP 3269778A JP S54124677 A JPS54124677 A JP S54124677A
Authority
JP
Japan
Prior art keywords
lead wire
constitution
connection part
open defects
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3269778A
Other languages
Japanese (ja)
Inventor
Toshio Kasuga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3269778A priority Critical patent/JPS54124677A/en
Publication of JPS54124677A publication Critical patent/JPS54124677A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To eliminate open defects by making a lead wire width wide in the connection part between an element and an electrode.
CONSTITUTION: Connection part 14 of lead wire 13 of a lead frame or a tape carrier is formed wide specially. By this constitution, lead wire 13 can cover electrode 12 sufficiently even in case of lead wire slippage. As a result, open defects can be eliminated without deteriorating connection strength.
COPYRIGHT: (C)1979,JPO&Japio
JP3269778A 1978-03-20 1978-03-20 Semiconductor device Pending JPS54124677A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3269778A JPS54124677A (en) 1978-03-20 1978-03-20 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3269778A JPS54124677A (en) 1978-03-20 1978-03-20 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54124677A true JPS54124677A (en) 1979-09-27

Family

ID=12366034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3269778A Pending JPS54124677A (en) 1978-03-20 1978-03-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54124677A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5026143A (en) * 1985-02-06 1991-06-25 Sharp Kabushiki Kaisha Active type liquid crystal matrix display having signal electrodes with expanded sections at group exposure boundaries
US5040293A (en) * 1989-05-15 1991-08-20 Kabushiki Kaisha Shinkawa Bonding method
US5103330A (en) * 1988-02-16 1992-04-07 Sharp Kabushiki Kaisha Matrix-type liquid-crystal display panel having redundant conductor structures
US5117275A (en) * 1990-10-24 1992-05-26 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
US5229328A (en) * 1990-10-24 1993-07-20 International Business Machines Corporation Method for bonding dielectric mounted conductors to semiconductor chip contact pads
US5233221A (en) * 1990-10-24 1993-08-03 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5026143A (en) * 1985-02-06 1991-06-25 Sharp Kabushiki Kaisha Active type liquid crystal matrix display having signal electrodes with expanded sections at group exposure boundaries
US5103330A (en) * 1988-02-16 1992-04-07 Sharp Kabushiki Kaisha Matrix-type liquid-crystal display panel having redundant conductor structures
US5040293A (en) * 1989-05-15 1991-08-20 Kabushiki Kaisha Shinkawa Bonding method
US5117275A (en) * 1990-10-24 1992-05-26 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology
US5229328A (en) * 1990-10-24 1993-07-20 International Business Machines Corporation Method for bonding dielectric mounted conductors to semiconductor chip contact pads
US5233221A (en) * 1990-10-24 1993-08-03 International Business Machines Corporation Electronic substrate multiple location conductor attachment technology

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