JPS5358766A - Packaging method of semiconductor element - Google Patents

Packaging method of semiconductor element

Info

Publication number
JPS5358766A
JPS5358766A JP13374876A JP13374876A JPS5358766A JP S5358766 A JPS5358766 A JP S5358766A JP 13374876 A JP13374876 A JP 13374876A JP 13374876 A JP13374876 A JP 13374876A JP S5358766 A JPS5358766 A JP S5358766A
Authority
JP
Japan
Prior art keywords
semiconductor element
packaging method
lead
facilitated
handling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13374876A
Other languages
Japanese (ja)
Inventor
Ikuo Tomita
Yoshiyuki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13374876A priority Critical patent/JPS5358766A/en
Publication of JPS5358766A publication Critical patent/JPS5358766A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: Handling is facilitated and crossover connection is made possible by holding each lead pattern, lead with a polymide film.
COPYRIGHT: (C)1978,JPO&Japio
JP13374876A 1976-11-09 1976-11-09 Packaging method of semiconductor element Pending JPS5358766A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13374876A JPS5358766A (en) 1976-11-09 1976-11-09 Packaging method of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13374876A JPS5358766A (en) 1976-11-09 1976-11-09 Packaging method of semiconductor element

Publications (1)

Publication Number Publication Date
JPS5358766A true JPS5358766A (en) 1978-05-26

Family

ID=15111998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13374876A Pending JPS5358766A (en) 1976-11-09 1976-11-09 Packaging method of semiconductor element

Country Status (1)

Country Link
JP (1) JPS5358766A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02229442A (en) * 1989-03-01 1990-09-12 Nitto Denko Corp Mounting structure of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02229442A (en) * 1989-03-01 1990-09-12 Nitto Denko Corp Mounting structure of semiconductor device

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