JPS5338978A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5338978A
JPS5338978A JP11305276A JP11305276A JPS5338978A JP S5338978 A JPS5338978 A JP S5338978A JP 11305276 A JP11305276 A JP 11305276A JP 11305276 A JP11305276 A JP 11305276A JP S5338978 A JPS5338978 A JP S5338978A
Authority
JP
Japan
Prior art keywords
manufacture
semiconductor device
electrode material
soldering
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11305276A
Other languages
Japanese (ja)
Inventor
Kensuke Suzuki
Isao Kojima
Tatsuo Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11305276A priority Critical patent/JPS5338978A/en
Publication of JPS5338978A publication Critical patent/JPS5338978A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE: To ensure a perfect glass attachment onto the pellet surface by having a solder material attachment previously to the electrode material to performing a soldering on the whole electrode material after etching the material chemically as a mask.
COPYRIGHT: (C)1978,JPO&Japio
JP11305276A 1976-09-22 1976-09-22 Manufacture of semiconductor device Pending JPS5338978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11305276A JPS5338978A (en) 1976-09-22 1976-09-22 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11305276A JPS5338978A (en) 1976-09-22 1976-09-22 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5338978A true JPS5338978A (en) 1978-04-10

Family

ID=14602268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11305276A Pending JPS5338978A (en) 1976-09-22 1976-09-22 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5338978A (en)

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