JPS53125778A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS53125778A
JPS53125778A JP4052977A JP4052977A JPS53125778A JP S53125778 A JPS53125778 A JP S53125778A JP 4052977 A JP4052977 A JP 4052977A JP 4052977 A JP4052977 A JP 4052977A JP S53125778 A JPS53125778 A JP S53125778A
Authority
JP
Japan
Prior art keywords
semiconductor device
source
drain layer
drain
boundary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4052977A
Other languages
Japanese (ja)
Inventor
Nobuhiro Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4052977A priority Critical patent/JPS53125778A/en
Publication of JPS53125778A publication Critical patent/JPS53125778A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To remarkably increase the drain dielectric strength, by deeply digging down the Si surface under a gate insulator than a source and drain layer and by separating the source and drain layer by taking the part as the boundary.
COPYRIGHT: (C)1978,JPO&Japio
JP4052977A 1977-04-08 1977-04-08 Semiconductor device Pending JPS53125778A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4052977A JPS53125778A (en) 1977-04-08 1977-04-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4052977A JPS53125778A (en) 1977-04-08 1977-04-08 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS53125778A true JPS53125778A (en) 1978-11-02

Family

ID=12582991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4052977A Pending JPS53125778A (en) 1977-04-08 1977-04-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS53125778A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0016968A1 (en) * 1979-04-09 1980-10-15 International Business Machines Corporation Method for fabricating self-aligned high resolution non planar devices employing low resolution registration
US4763177A (en) * 1985-02-19 1988-08-09 Texas Instruments Incorporated Read only memory with improved channel length isolation and method of forming
US4835584A (en) * 1986-11-27 1989-05-30 American Telephone And Telegraph Company, At&T Bell Laboratories Trench transistor
US4874715A (en) * 1987-05-20 1989-10-17 Texas Instruments Incorporated Read only memory with improved channel length control and method of forming

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0016968A1 (en) * 1979-04-09 1980-10-15 International Business Machines Corporation Method for fabricating self-aligned high resolution non planar devices employing low resolution registration
US4763177A (en) * 1985-02-19 1988-08-09 Texas Instruments Incorporated Read only memory with improved channel length isolation and method of forming
US4835584A (en) * 1986-11-27 1989-05-30 American Telephone And Telegraph Company, At&T Bell Laboratories Trench transistor
US4874715A (en) * 1987-05-20 1989-10-17 Texas Instruments Incorporated Read only memory with improved channel length control and method of forming

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