JPS53110368A - Bonding pad for semiconductor device - Google Patents

Bonding pad for semiconductor device

Info

Publication number
JPS53110368A
JPS53110368A JP2477177A JP2477177A JPS53110368A JP S53110368 A JPS53110368 A JP S53110368A JP 2477177 A JP2477177 A JP 2477177A JP 2477177 A JP2477177 A JP 2477177A JP S53110368 A JPS53110368 A JP S53110368A
Authority
JP
Japan
Prior art keywords
semiconductor device
bonding pad
film
dependability
lsi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2477177A
Other languages
Japanese (ja)
Inventor
Mitsuaki Horiuchi
Hiroshi Kato
Tatsuo Itagaki
Masamichi Kobayashi
Masami Kiyono
Shinji Onishi
Takehisa Nitta
Kensuke Nakada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2477177A priority Critical patent/JPS53110368A/en
Publication of JPS53110368A publication Critical patent/JPS53110368A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To increase the dependability of the wirings such as IC, LSI and others, by providing an easy-to-bond film only on the surface of the bonding area of the sputter evaporation film and the alloy film, etc.
COPYRIGHT: (C)1978,JPO&Japio
JP2477177A 1977-03-09 1977-03-09 Bonding pad for semiconductor device Pending JPS53110368A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2477177A JPS53110368A (en) 1977-03-09 1977-03-09 Bonding pad for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2477177A JPS53110368A (en) 1977-03-09 1977-03-09 Bonding pad for semiconductor device

Publications (1)

Publication Number Publication Date
JPS53110368A true JPS53110368A (en) 1978-09-27

Family

ID=12147418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2477177A Pending JPS53110368A (en) 1977-03-09 1977-03-09 Bonding pad for semiconductor device

Country Status (1)

Country Link
JP (1) JPS53110368A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205746A (en) * 1983-05-09 1984-11-21 Nec Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205746A (en) * 1983-05-09 1984-11-21 Nec Corp Semiconductor device

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