JPS5240980A - Process for production of semiconductor device - Google Patents

Process for production of semiconductor device

Info

Publication number
JPS5240980A
JPS5240980A JP11705875A JP11705875A JPS5240980A JP S5240980 A JPS5240980 A JP S5240980A JP 11705875 A JP11705875 A JP 11705875A JP 11705875 A JP11705875 A JP 11705875A JP S5240980 A JPS5240980 A JP S5240980A
Authority
JP
Japan
Prior art keywords
production
semiconductor device
epitaxial layer
interpose
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11705875A
Other languages
Japanese (ja)
Inventor
Masao Tsuruoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11705875A priority Critical patent/JPS5240980A/en
Publication of JPS5240980A publication Critical patent/JPS5240980A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/8611Planar PN junction diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To interpose an insulating layer between the epitaxial layer deposited on a semiconductor substrate and the end of an annular polycrystalline diffusion layer formed on the epitaxial layer, thereby obtaining a diode of good reverse characteris tics and low forward voltage drop.
JP11705875A 1975-09-27 1975-09-27 Process for production of semiconductor device Pending JPS5240980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11705875A JPS5240980A (en) 1975-09-27 1975-09-27 Process for production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11705875A JPS5240980A (en) 1975-09-27 1975-09-27 Process for production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5240980A true JPS5240980A (en) 1977-03-30

Family

ID=14702375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11705875A Pending JPS5240980A (en) 1975-09-27 1975-09-27 Process for production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5240980A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4883772A (en) * 1986-09-11 1989-11-28 National Semiconductor Corporation Process for making a self-aligned silicide shunt
JPH04114044U (en) * 1991-03-25 1992-10-07 株式会社学習研究社 hand-held projector

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998585A (en) * 1973-01-22 1974-09-18
JPS49115668A (en) * 1973-03-06 1974-11-05

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998585A (en) * 1973-01-22 1974-09-18
JPS49115668A (en) * 1973-03-06 1974-11-05

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4883772A (en) * 1986-09-11 1989-11-28 National Semiconductor Corporation Process for making a self-aligned silicide shunt
JPH04114044U (en) * 1991-03-25 1992-10-07 株式会社学習研究社 hand-held projector

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