JPS52102672A - Electronic device - Google Patents

Electronic device

Info

Publication number
JPS52102672A
JPS52102672A JP1966576A JP1966576A JPS52102672A JP S52102672 A JPS52102672 A JP S52102672A JP 1966576 A JP1966576 A JP 1966576A JP 1966576 A JP1966576 A JP 1966576A JP S52102672 A JPS52102672 A JP S52102672A
Authority
JP
Japan
Prior art keywords
electronic devices
tips
electronic device
manufacturing
printboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1966576A
Other languages
Japanese (ja)
Inventor
Mitsuo Matsunami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1966576A priority Critical patent/JPS52102672A/en
Publication of JPS52102672A publication Critical patent/JPS52102672A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92142Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To produce large numbers of electronic devices at the hole time in labor saving way, wherein the step of manufacturing wiring pattern which is necessary for printboard circuit and electronic devices, the step of manufacturing connecting means of beam lead for semiconductor tips such as display element and IC or flip tips, and the step of bonding are conducted at the same time.
COPYRIGHT: (C)1977,JPO&Japio
JP1966576A 1976-02-24 1976-02-24 Electronic device Pending JPS52102672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1966576A JPS52102672A (en) 1976-02-24 1976-02-24 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1966576A JPS52102672A (en) 1976-02-24 1976-02-24 Electronic device

Publications (1)

Publication Number Publication Date
JPS52102672A true JPS52102672A (en) 1977-08-29

Family

ID=12005524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1966576A Pending JPS52102672A (en) 1976-02-24 1976-02-24 Electronic device

Country Status (1)

Country Link
JP (1) JPS52102672A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9248999B2 (en) 2009-09-25 2016-02-02 Harry Xydias Level wind arm for a winch assembly

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519587A (en) * 1974-07-12 1976-01-26 Sharp Kk Handotaisochino seizoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519587A (en) * 1974-07-12 1976-01-26 Sharp Kk Handotaisochino seizoho

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9248999B2 (en) 2009-09-25 2016-02-02 Harry Xydias Level wind arm for a winch assembly

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