JPS519587A - Handotaisochino seizoho - Google Patents

Handotaisochino seizoho

Info

Publication number
JPS519587A
JPS519587A JP49080431A JP8043174A JPS519587A JP S519587 A JPS519587 A JP S519587A JP 49080431 A JP49080431 A JP 49080431A JP 8043174 A JP8043174 A JP 8043174A JP S519587 A JPS519587 A JP S519587A
Authority
JP
Japan
Prior art keywords
handotaisochino
seizoho
handotaisochino seizoho
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP49080431A
Other languages
Japanese (ja)
Other versions
JPS576260B2 (en
Inventor
Mitsuo Matsunami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP49080431A priority Critical patent/JPS519587A/en
Publication of JPS519587A publication Critical patent/JPS519587A/en
Publication of JPS576260B2 publication Critical patent/JPS576260B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18162Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
JP49080431A 1974-07-12 1974-07-12 Handotaisochino seizoho Granted JPS519587A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49080431A JPS519587A (en) 1974-07-12 1974-07-12 Handotaisochino seizoho

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49080431A JPS519587A (en) 1974-07-12 1974-07-12 Handotaisochino seizoho

Publications (2)

Publication Number Publication Date
JPS519587A true JPS519587A (en) 1976-01-26
JPS576260B2 JPS576260B2 (en) 1982-02-04

Family

ID=13718069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49080431A Granted JPS519587A (en) 1974-07-12 1974-07-12 Handotaisochino seizoho

Country Status (1)

Country Link
JP (1) JPS519587A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5249783A (en) * 1975-10-17 1977-04-21 Matsushita Electric Ind Co Ltd Semiconductor device and process for production of same
JPS52102674A (en) * 1976-02-24 1977-08-29 Sharp Corp Semiconductor device
JPS52102672A (en) * 1976-02-24 1977-08-29 Sharp Corp Electronic device
JPS52113768U (en) * 1976-02-24 1977-08-29
JPS52102673A (en) * 1976-02-24 1977-08-29 Sharp Corp Assembling of semiconductor device
JPS52113677A (en) * 1976-03-19 1977-09-22 Matsushita Electric Ind Co Ltd Production of semiconductor device
JPS52141566A (en) * 1976-05-20 1977-11-25 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacture
JPS5392663A (en) * 1977-01-25 1978-08-14 Matsushita Electric Ind Co Ltd Semiconductor device
JPS53110370A (en) * 1977-03-08 1978-09-27 Matsushita Electric Ind Co Ltd Semiconductor device
JPS60208859A (en) * 1984-04-02 1985-10-21 Toshiba Corp Hybrid function circuit
KR20180099531A (en) 2017-02-27 2018-09-05 신에쓰 가가꾸 고교 가부시끼가이샤 Method for manufacturing semiconductor device

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5249783A (en) * 1975-10-17 1977-04-21 Matsushita Electric Ind Co Ltd Semiconductor device and process for production of same
JPS5736746B2 (en) * 1975-10-17 1982-08-05
JPS52102673A (en) * 1976-02-24 1977-08-29 Sharp Corp Assembling of semiconductor device
JPS52102674A (en) * 1976-02-24 1977-08-29 Sharp Corp Semiconductor device
JPS52102672A (en) * 1976-02-24 1977-08-29 Sharp Corp Electronic device
JPS6025909Y2 (en) * 1976-02-24 1985-08-03 シャープ株式会社 semiconductor equipment
JPS52113768U (en) * 1976-02-24 1977-08-29
JPS5724657B2 (en) * 1976-02-24 1982-05-25
JPS5724658B2 (en) * 1976-02-24 1982-05-25
JPS52113677A (en) * 1976-03-19 1977-09-22 Matsushita Electric Ind Co Ltd Production of semiconductor device
JPS5732909B2 (en) * 1976-05-20 1982-07-14
JPS52141566A (en) * 1976-05-20 1977-11-25 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacture
JPS5392663A (en) * 1977-01-25 1978-08-14 Matsushita Electric Ind Co Ltd Semiconductor device
JPS5823947B2 (en) * 1977-01-25 1983-05-18 松下電器産業株式会社 semiconductor equipment
JPS53110370A (en) * 1977-03-08 1978-09-27 Matsushita Electric Ind Co Ltd Semiconductor device
JPS5826667B2 (en) * 1977-03-08 1983-06-04 松下電器産業株式会社 semiconductor equipment
JPS60208859A (en) * 1984-04-02 1985-10-21 Toshiba Corp Hybrid function circuit
KR20180099531A (en) 2017-02-27 2018-09-05 신에쓰 가가꾸 고교 가부시끼가이샤 Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPS576260B2 (en) 1982-02-04

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