JPS519587A - Handotaisochino seizoho - Google Patents
Handotaisochino seizohoInfo
- Publication number
- JPS519587A JPS519587A JP49080431A JP8043174A JPS519587A JP S519587 A JPS519587 A JP S519587A JP 49080431 A JP49080431 A JP 49080431A JP 8043174 A JP8043174 A JP 8043174A JP S519587 A JPS519587 A JP S519587A
- Authority
- JP
- Japan
- Prior art keywords
- handotaisochino
- seizoho
- handotaisochino seizoho
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/25—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP49080431A JPS519587A (en) | 1974-07-12 | 1974-07-12 | Handotaisochino seizoho |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP49080431A JPS519587A (en) | 1974-07-12 | 1974-07-12 | Handotaisochino seizoho |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS519587A true JPS519587A (en) | 1976-01-26 |
JPS576260B2 JPS576260B2 (en) | 1982-02-04 |
Family
ID=13718069
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP49080431A Granted JPS519587A (en) | 1974-07-12 | 1974-07-12 | Handotaisochino seizoho |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS519587A (en) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5249783A (en) * | 1975-10-17 | 1977-04-21 | Matsushita Electric Ind Co Ltd | Semiconductor device and process for production of same |
JPS52102674A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Semiconductor device |
JPS52102672A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Electronic device |
JPS52113768U (en) * | 1976-02-24 | 1977-08-29 | ||
JPS52102673A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Assembling of semiconductor device |
JPS52113677A (en) * | 1976-03-19 | 1977-09-22 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
JPS52141566A (en) * | 1976-05-20 | 1977-11-25 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
JPS5392663A (en) * | 1977-01-25 | 1978-08-14 | Matsushita Electric Ind Co Ltd | Semiconductor device |
JPS53110370A (en) * | 1977-03-08 | 1978-09-27 | Matsushita Electric Ind Co Ltd | Semiconductor device |
JPS60208859A (en) * | 1984-04-02 | 1985-10-21 | Toshiba Corp | Hybrid function circuit |
KR20180099531A (en) | 2017-02-27 | 2018-09-05 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Method for manufacturing semiconductor device |
-
1974
- 1974-07-12 JP JP49080431A patent/JPS519587A/en active Granted
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5249783A (en) * | 1975-10-17 | 1977-04-21 | Matsushita Electric Ind Co Ltd | Semiconductor device and process for production of same |
JPS5736746B2 (en) * | 1975-10-17 | 1982-08-05 | ||
JPS52102673A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Assembling of semiconductor device |
JPS52102674A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Semiconductor device |
JPS52102672A (en) * | 1976-02-24 | 1977-08-29 | Sharp Corp | Electronic device |
JPS6025909Y2 (en) * | 1976-02-24 | 1985-08-03 | シャープ株式会社 | semiconductor equipment |
JPS52113768U (en) * | 1976-02-24 | 1977-08-29 | ||
JPS5724657B2 (en) * | 1976-02-24 | 1982-05-25 | ||
JPS5724658B2 (en) * | 1976-02-24 | 1982-05-25 | ||
JPS52113677A (en) * | 1976-03-19 | 1977-09-22 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
JPS5732909B2 (en) * | 1976-05-20 | 1982-07-14 | ||
JPS52141566A (en) * | 1976-05-20 | 1977-11-25 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
JPS5392663A (en) * | 1977-01-25 | 1978-08-14 | Matsushita Electric Ind Co Ltd | Semiconductor device |
JPS5823947B2 (en) * | 1977-01-25 | 1983-05-18 | 松下電器産業株式会社 | semiconductor equipment |
JPS53110370A (en) * | 1977-03-08 | 1978-09-27 | Matsushita Electric Ind Co Ltd | Semiconductor device |
JPS5826667B2 (en) * | 1977-03-08 | 1983-06-04 | 松下電器産業株式会社 | semiconductor equipment |
JPS60208859A (en) * | 1984-04-02 | 1985-10-21 | Toshiba Corp | Hybrid function circuit |
KR20180099531A (en) | 2017-02-27 | 2018-09-05 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Method for manufacturing semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS576260B2 (en) | 1982-02-04 |
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