JPH1197608A - Lead frame for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a lead frame which is capable of forming the depresses of a die pad easily and accurately, without being affected by restricting conditions within a semiconductor device. SOLUTION: In a lead frame 1 for a semiconductor device comprising a die pad 11 on which a semiconductor chip has been mounted, inner leads 13 that are electrically connected to electrodes of the semiconductor chip, and depressed portions 2 for allowing the pad 11 and the leads 13 to stand on different levels, the portions 2 are provided outside a region 17 for forming encapsulating resin that encapsulates the semiconductor chip.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device lead frame used for a semiconductor device.

[0002]

2. Description of the Related Art In general, there are various types of lead frames for semiconductor devices in terms of materials, shapes, and the like. One of them is known, for example, as shown in FIG.

The lead frame 10 shown in FIG. 1 is formed by stamping or etching a metal plate made of, for example, a copper-based alloy material. The die pad 11 is formed in a substantially rectangular flat plate shape. , A tie bar 14 for supporting the inner leads 13, and a tie bar 14 for supporting the inner leads 13. And an outer lead 15 provided so as to be connected.

In the lead frame 10, depressed portions 16 (two places) are provided on the suspension leads 12. The depressed portion 16 is formed by bending using a die or the like, and is for positioning the die pad 11 below the inner lead 13 with the die pad 11 and the inner lead 13 being stepped.

[0005] The lead frame 10 thus formed
Is used for a resin-sealed semiconductor device 20 as shown in FIG. That is, the semiconductor chip 2 made of a silicon-based material or the like is placed on the die pad 11 of the lead frame 10.
1 is mounted via an adhesive, and the electrodes of the semiconductor chip 21 are electrically connected (wire-bonded) to the inner leads 13 by bonding wires 22. These components are sealed by a sealing resin 23 such as an epoxy resin, and the outer leads 15 protrude from the sealing resin 23 in a state where exterior plating, molding, and the like are applied.

As described above, the semiconductor device 20 using the above-described lead frame 10 is configured. However, in this semiconductor device 20, since the depressed portion 16 is provided on the lead frame 10, the die pad 11
When the semiconductor chip 21 is mounted thereon, the upper surface of the semiconductor chip 21 and the inner leads 13 are located on substantially the same plane. Therefore, if the lead frame 10 having the depressed portion 16 is used, even if the semiconductor device 20 is adapted to miniaturization and multi-pins,
Wire bonding can be performed easily and reliably.

In the lead frame 10 described above, the depressed portion 16 is formed in a region 17 where the sealing resin 23 is formed.
It is provided inside. This is for simplifying the shape of a mold used when forming the sealing resin 23.

[0008]

In the conventional lead frame 10 described above, the depressed portion 16 is attached to the suspension lead 12 in order to make wire bonding easy and reliable.
However, since the depressed portion 16 is provided inside the formation region 17 of the sealing resin 23, the depressed portion 16
May be difficult to form.

More specifically, for example, the following conditions are satisfied: the size of the entire semiconductor device 20 is small, the amount of depressing by the depressing section 16 is large, the size of the die pad 11 is large, and the thickness of the lead frame 10 is small. If some of them overlap each other, the depressed portion 16 must be formed in a very small area. Therefore, in this case, the processing becomes difficult, for example, the bending angle of the depressed portion 16 becomes very steep. Furthermore,
Since processing is difficult, there is a possibility that the dimensional accuracy required for the lead frame 10 cannot be obtained.

Accordingly, the present invention provides a lead frame for a semiconductor device in which a depressed portion of a die pad can be easily and accurately formed without being affected by constraints in the semiconductor device, for example, the above-mentioned conditions. The purpose is to provide.

[0011]

SUMMARY OF THE INVENTION The present invention has been devised to achieve the above object, and comprises a die pad on which a semiconductor chip is mounted, and an electrode which is arranged around the die pad and has the semiconductor chip. In a semiconductor device lead frame including an inner lead that is electrically connected, and a depressed portion for disposing the die pad and the inner lead at different levels, the depressed portion seals the semiconductor chip. It is provided outside the region where the sealing resin is formed.

According to the lead frame for a semiconductor device having the above-described structure, the depressed portion for changing the level of the die pad and the inner lead is located outside the region where the sealing resin for sealing the semiconductor chip on the die pad is formed. Since it is provided, it is not necessary to process the depressed portion in a narrow area even if there is a restriction (for example, an effect due to the downsizing of the semiconductor device) when configuring the semiconductor device. Accordingly, the processing of the depressed portion becomes easier than before, and the required dimensional accuracy can be obtained accordingly.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A lead frame for a semiconductor device according to the present invention will be described below with reference to the drawings. FIG.
1 is a schematic view showing an example of a semiconductor device lead frame 1 according to the present invention. However, the same components as those of the conventional device (see FIG. 3) described above are denoted by the same reference numerals, and description thereof will be omitted.

The lead frame 1 of the present embodiment has a die pad 11 and
, An inner lead 13, a tie bar 14, and an outer lead 15, which are used to configure the semiconductor device 20 described above.

However, in this lead frame 1, unlike the conventional one, the die pad 11 and the inner lead 1
3, the tie bar 14 and the outer lead 1 are provided instead of the suspension lead 12.
5. More specifically, the depressed portions 2 are provided near both ends of the tie bar 14 that supports the inner leads 13 (portion A in the drawing) and near the outer ends of the outer leads 15 (portion B in the drawing). ing.

That is, in the lead frame 1, the depressed portion 2 is provided outside the region where the sealing resin 23 is formed. Then, outside the region where the sealing resin 23 is formed, by bending the depressed portion 2 so as to lift the inner lead 13 upward, the die pad 11 and the inner lead 13 are stepped, and the die pad 11 is It is located below the lead 13.

Therefore, in this lead frame 1,
Semiconductor device 20 configured using this lead frame 1
In the case where the formation region of the sealing resin 23 of the semiconductor device 20 is minimized due to the restrictions described in the above, the depressed portion 2 can be formed using a wider region than before. This is, for example, "this lead frame 1
The size of the semiconductor device 20 configured using the semiconductor device is small. "
“Depress amount by depress section 2 is large”, “size of die pad 11 is large”, “Lead frame 1
The same applies to the case where conditions such as “the thickness of the sheet is thin” overlap.

Therefore, in this lead frame 1,
Even if there are restrictions on the semiconductor device 20, it is not necessary to form the depressed portion 2 in a very narrow area as in the conventional case, so that the bending angle of the depressed portion 2 is prevented from becoming steep. As a result, the depressed portion 2 can be formed more easily than before. In addition, as the processing of the depressed portion 2 is facilitated, the processing can be performed with high precision, so that the dimensional accuracy required for the lead frame 1 can be reliably obtained.

When the semiconductor device 20 is constructed using the lead frame 1 of the present embodiment, the sealing resin 2
Although it is necessary to make the shape of the mold for forming the mold 3 slightly more complicated than in the past, this is not a serious problem in view of the fact that the depressed portion 2 can be formed easily and accurately.

Next, another embodiment of the lead frame for a semiconductor device according to the present invention will be described. FIG.
Semiconductor device lead frame 1 according to another embodiment
It is the schematic which shows a.

As shown in the figure, in the lead frame 1a of the present embodiment, the depressed portion 2
Near both ends of the tie bar 14 for supporting the
The tie bar 15a that supports the outer lead 15 is provided near both ends (portion C in the figure). Then, the depressed part 2 is lifted so that
By performing the bending process, the die pad 11 and the inner lead 13 are stepped, and the die pad 11 is positioned below the inner lead 13. That is, also in the lead frame 1a, the depressed portion 2 is provided outside the region where the sealing resin 23 is formed.

Therefore, in this lead frame 1a, as in the case described above, the depressed portion 2 can be formed more easily than in the prior art regardless of the restrictions on the semiconductor device 20, and the lead frame 1a can be formed.
The required dimensional accuracy as a can be reliably obtained.

In each of the above-described embodiments, the depressed portion 2 includes the tie bar 14 and the outer lead 1.
5 or the tie bar 15a has been described as an example, but the present invention is not limited to this, and the depressed portion 2 is provided outside the formation region of the sealing resin 23. As long as they are provided, for example, those provided near both ends of the suspension lead 12 can also be implemented.

Further, in each of the above-described embodiments, the case where the die pad 11 is located below the inner lead 13 by the depress portion 2 has been described as an example, but the present invention is not limited to this. Not something
As long as the die pad 11 and the inner lead 13 are stepped by the depressed portion 2, the present invention is applicable even when the die pad 11 is located above the inner lead 13.

[0025]

As described above, in the lead frame for a semiconductor device according to the present invention, the depressed portion for making the die pad and the inner lead different from each other is provided outside the formation region of the sealing resin. . For this reason, in this lead frame, for example, even when the formation region of the sealing resin of the semiconductor device is minimized due to a constraint condition in the semiconductor device formed using the lead frame,
The depressed portion can be formed using a wider area than before. Therefore, in this leadframe,
Even if there are constraints in the semiconductor device, it is not necessary to form the depressed portion in a very narrow area as in the conventional case, so that the depressed portion can be formed more easily than in the past, The dimensional accuracy required for the lead frame 1 can be reliably obtained.

[Brief description of the drawings]

FIG. 1 is a schematic view showing an example of an embodiment of a semiconductor device lead frame according to the present invention.

FIG. 2 is a schematic view showing another embodiment of a lead frame for a semiconductor device according to the present invention.

FIG. 3 is a schematic view showing an example of a conventional semiconductor device lead frame.

FIG. 4 is a schematic diagram illustrating a configuration of a semiconductor device configured using a semiconductor device lead frame.

[Explanation of symbols]

1, 1a: Lead frame for semiconductor device, 2: Depressed part, 11: Die pad, 13: Inner lead, 14
... Tie bar, 15 ... Outer lead, 15a ... Tie bar, 17 ... Formation area, 21 ... Semiconductor chip, 23 ... Seal resin

Claims (1)

[Claims] 1. A die pad on which a semiconductor chip is mounted, an inner lead disposed around the die pad and electrically connected to an electrode of the semiconductor chip, and the die pad and the inner lead are arranged stepwise. A lead frame for a semiconductor device, comprising: a depressed portion for the semiconductor device, wherein the depressed portion is provided outside a region where a sealing resin for sealing the semiconductor chip is formed. Lead frame.