JPH07249729A - Electronic device - Google Patents
Electronic deviceInfo
- Publication number
- JPH07249729A JPH07249729A JP6760394A JP6760394A JPH07249729A JP H07249729 A JPH07249729 A JP H07249729A JP 6760394 A JP6760394 A JP 6760394A JP 6760394 A JP6760394 A JP 6760394A JP H07249729 A JPH07249729 A JP H07249729A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- substrate
- board
- electronic device
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Moulds For Moulding Plastics Or The Like (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Pressure Sensors (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、モールド成形された電
子装置に関する。FIELD OF THE INVENTION The present invention relates to a molded electronic device.
【０００２】[0002]
【従来技術】従来、例えば、加速度センサ等のように機
械的な変位を受ける素子を搭載したハイブリッド電子装
置では、加速度センサの周囲を気密中空とする必要があ
る。このため、この電子装置のパッケージングは金属ケ
ースによる気密封止がとられている。しかし、この金属
ケースによる気密封止は、金属ケースという部品が余分
に必要となり、又、気密封止工程が余分に必要となる。2. Description of the Related Art Conventionally, in a hybrid electronic device having an element such as an acceleration sensor that receives a mechanical displacement, it is necessary to make an airtight hollow around the acceleration sensor. Therefore, the packaging of this electronic device is hermetically sealed by a metal case. However, the airtight sealing with the metal case requires an extra part called a metal case and an extra airtight sealing step.
【０００３】[0003]
【発明が解決しようとする課題】よって、フルモールド
成形により上記素子を製造できれば、気密封止用の金属
ケースも不必要であり、製造も容易である。しかし、フ
ルモールド成形の場合には、加速度センサのダイヤフラ
ムが樹脂で固定されないように、加速度センサを金属キ
ャップで覆った後に、モールド成形する必要がある。よ
って、金属キャップという余分な部品が必要となる。Therefore, if the above-mentioned element can be manufactured by full molding, a metal case for hermetically sealing is unnecessary and the manufacturing is easy. However, in the case of full molding, it is necessary to mold the acceleration sensor after covering it with a metal cap so that the diaphragm of the acceleration sensor is not fixed with resin. Therefore, an extra part called a metal cap is required.
【０００４】本発明は上記の課題を解決するために成さ
れたものであり、その目的はモールド成形電子装置にお
いて、気密封止用の特別な部品を用いることなく、モー
ルド樹脂中に気密中空状態を形成することにより、電子
装置の製造を容易且つ安価にすることである。The present invention has been made to solve the above problems, and an object thereof is to provide an airtight hollow state in a molding resin without using a special part for hermetic sealing in a molding electronic device. Is to make the manufacturing of the electronic device easy and inexpensive.
【０００５】[0005]
【課題を解決するための手段】上記課題を解決するため
の発明の構成は、表面に回路配線が形成され電子素子を
搭載した基板と、この基板を設置するリードフレーム
と、基板及びリードフレームをモールド成形した電子装
置において、リードフレームのアイランド部を平坦な周
辺部と、この周辺部の内側を凸状に突出した突出部とに
形成し、基板の裏面とアイランド部の周辺部とを接合
し、基板の裏面とアイランド部の突出部とで形成される
中空部に第１電子素子を配設し、第１電子素子と基板の
表面の回路配線とを接続する配線を形成し、基板の表面
の回路配線とリードフレームの足のボンディングランド
とをワイヤーで接続した後、基板、基板の表面上に配設
された電子素子、及び、リードフレームをモールド成形
したことを特徴とする。SUMMARY OF THE INVENTION The structure of the invention for solving the above-mentioned problems is to provide a substrate on which circuit elements are formed and on which electronic elements are mounted, a lead frame on which this substrate is installed, a substrate and a lead frame. In a molded electronic device, the island portion of the lead frame is formed into a flat peripheral portion and a protrusion protruding inside the peripheral portion in a convex shape, and the back surface of the substrate is bonded to the peripheral portion of the island portion. A first electronic element is disposed in a hollow portion formed by the back surface of the substrate and the protruding portion of the island portion, and wiring for connecting the first electronic element and the circuit wiring on the front surface of the substrate is formed; After connecting the circuit wiring and the bonding land of the lead frame foot with a wire, the substrate, the electronic element arranged on the surface of the substrate, and the lead frame are molded.
【０００６】上記第１電子素子は、加速度センサ等の気
密中空部に納めることが必要な素子である。勿論、中空
部には、加速度センサ等の気密中空部に納めることが必
要な素子の他、他の中空部に納める必要のない素子が配
設されていても良い。The first electronic element is an element that needs to be housed in an airtight hollow portion such as an acceleration sensor. Of course, in the hollow portion, an element such as an acceleration sensor that needs to be housed in the airtight hollow portion, or an element that does not need to be housed in another hollow portion may be provided.
【０００７】[0007]
【作用】リードフレームのアイランド部を平坦な周辺部
と凸状に突出した突出部とで形成する。そして、基板の
裏面をアイランド部に配設する時、基板の裏面と突出部
とで中空部が形成される。加速度センサ等の第１電子素
子がこの中空部に納まるように基板の裏面に配設され
る。この加速度センサは基板表面に形成された回路配線
と基板を貫くスルーホール等により接続される。そし
て、基板表面の回路配線とリードフレームの足のボンデ
ィングランドとがワイヤーで接続されて、基板、リード
フレーム、基板上の電子素子等の全体が樹脂によりモー
ルド成形される。Operation: The island portion of the lead frame is formed by the flat peripheral portion and the protruding portion protruding in a convex shape. Then, when the back surface of the substrate is arranged in the island portion, a hollow portion is formed by the back surface of the substrate and the protruding portion. The first electronic element such as the acceleration sensor is arranged on the back surface of the substrate so as to be housed in the hollow portion. This acceleration sensor is connected to the circuit wiring formed on the surface of the substrate by a through hole penetrating the substrate. Then, the circuit wiring on the surface of the substrate and the bonding lands of the legs of the lead frame are connected by wires, and the entire substrate, lead frame, electronic elements on the substrate, etc. are molded with resin.
【０００８】[0008]
【発明の効果】リードフレームのアイランド部を凸状に
加工する工程を設けるだけで、基板とリードフレームの
アイランド部とで中空部が形成される。この中空部に加
速度センサ等の第１電子素子が存在するように、基板の
裏面に第１素子を配設するれば良い。よって、第１電子
素子を封止するための金属ケースが不要であり、モール
ド形成電子素子を安価且つ容易に製造することができ
る。The hollow portion is formed between the substrate and the island portion of the lead frame only by providing the step of processing the island portion of the lead frame into a convex shape. The first element may be arranged on the back surface of the substrate so that the first electronic element such as the acceleration sensor exists in the hollow portion. Therefore, a metal case for sealing the first electronic element is not required, and the mold-formed electronic element can be manufactured at low cost and easily.
【０００９】[0009]
【実施例】以下、本発明を具体的な実施例に基づいて説
明する。図１において、電子素子を搭載する基板として
のセラミック基板５の表面５ａには回路配線５０が形成
されており、電子素子である制御用ＭＩＣ６、チップコ
ンデンサ８及び厚膜抵抗７とがセラミック基板５の表面
５ａに配設されている。制御用ＭＩＣ６とチップコンデ
ンサ８は接着剤１１でセラミック基板５の表面５ａに固
定されている。また、制御用ＭＩＣ６は金線１４による
ワイヤボンディングにより回路配線５０に電気的に接続
されている。EXAMPLES The present invention will be described below based on specific examples. In FIG. 1, a circuit wiring 50 is formed on a surface 5a of a ceramic substrate 5 as a substrate on which an electronic element is mounted, and a control MIC 6, a chip capacitor 8 and a thick film resistor 7, which are electronic elements, are connected to the ceramic substrate 5. Is arranged on the surface 5a. The control MIC 6 and the chip capacitor 8 are fixed to the surface 5 a of the ceramic substrate 5 with an adhesive 11. The control MIC 6 is electrically connected to the circuit wiring 50 by wire bonding with the gold wire 14.
【００１０】又、セラミック基板５の裏面５ｂには、第
１電子素子である加速度センサ１２が接着剤１１で固定
されており、この加速度センサ１２は金線１４によるワ
イヤボンディングによりセラミック基板５の裏面５ｂ上
に形成された回路配線５３と接続されている。そして、
裏面５ｂの回路配線５３と表面５ａの回路配線５０と
は、スルーホール５１、５２により電気的に接続されて
いる。尚、このスルーホールは気密性を確保するため
に、ハンダ等によりセラミック基板両面を封止してお
く。An acceleration sensor 12, which is a first electronic element, is fixed to the back surface 5b of the ceramic substrate 5 with an adhesive 11. The acceleration sensor 12 is attached to the back surface of the ceramic substrate 5 by wire bonding with a gold wire 14. It is connected to the circuit wiring 53 formed on 5b. And
The circuit wiring 53 on the back surface 5b and the circuit wiring 50 on the front surface 5a are electrically connected by through holes 51 and 52. The through holes are sealed on both sides of the ceramic substrate with solder or the like in order to ensure airtightness.
【００１１】一方、リードフレーム２のアイランド部３
は、平坦な周辺部３１と、その内側に凸状に突出した突
出部３２とで形成されている。このリードフレーム２
は、図３に示すプレス加工により加工される。即ち、凹
部３６を有したダイ３５にリードフレーム２が配設さ
れ、アイランド部３はパンチ３７の押圧操作により、凹
部３６の形状に沿って加工される。On the other hand, the island portion 3 of the lead frame 2
Is formed of a flat peripheral portion 31 and a protruding portion 32 that protrudes inwardly. This lead frame 2
Is processed by the press working shown in FIG. That is, the lead frame 2 is arranged in the die 35 having the recess 36, and the island portion 3 is processed along the shape of the recess 36 by the pressing operation of the punch 37.
【００１２】このように加工されたリードフレーム２の
アイランド部３の周辺部３１とセラミック基板５の裏面
５ｂとが接着剤１１により接着される。そして、アイラ
ンド部３の突出部３２とセラミック基板５の裏面５ｂと
で密閉された中空部４が形成される。セラミック基板５
の裏面５ｂに配設された加速度センサ１２は、この中空
部４に収納される。即ち、加速度センサ１２の上側はリ
ードフレーム２のアイランド部３により完全に覆われ
る。The peripheral portion 31 of the island portion 3 of the lead frame 2 thus processed and the back surface 5b of the ceramic substrate 5 are bonded by the adhesive 11. Then, the hollow portion 4 sealed by the projecting portion 32 of the island portion 3 and the back surface 5b of the ceramic substrate 5 is formed. Ceramic substrate 5
The acceleration sensor 12 disposed on the back surface 5b of the is housed in the hollow portion 4. That is, the upper side of the acceleration sensor 12 is completely covered by the island portion 3 of the lead frame 2.
【００１３】次に、セラミック基板５の表面５ａ上の回
路配線５０とリードフレーム２の足２０のボンディング
ランド２１とが金線９によりワイヤボンディングされ
る。そして、この構成の電子装置１はモールド成形され
る。このモールド成形時に、加速度センサ１２はリード
フレーム２のアイランド部３で完全に覆われているの
で、中空部４は樹脂で充填されない。Next, the circuit wiring 50 on the surface 5a of the ceramic substrate 5 and the bonding land 21 of the foot 20 of the lead frame 2 are wire-bonded by the gold wire 9. Then, the electronic device 1 having this configuration is molded. At the time of this molding, the acceleration sensor 12 is completely covered with the island portion 3 of the lead frame 2, so that the hollow portion 4 is not filled with resin.
【００１４】このように、上記実施例では、加速度セン
サ１２はセラミック基板５の裏面５ｂに配設され、上部
空間がリードフレーム２のアイランド部３で完全に覆わ
れているので、モールド成形後も、加速度センサ１２の
ダイヤフラムの変位も支障なく行われる。尚、上記の金
線１４，９はAl線でも良い。As described above, in the above embodiment, the acceleration sensor 12 is disposed on the back surface 5b of the ceramic substrate 5 and the upper space is completely covered with the island portion 3 of the lead frame 2, so that the molding is performed even after molding. The displacement of the diaphragm of the acceleration sensor 12 can be performed without any trouble. The gold wires 14 and 9 may be Al wires.
【００１５】図２は他の実施例を示した電子装置１の構
成図である。この電子装置１では制御ＭＩＣ６、加速度
センサ１２がフリップチップであり、セラミック基板５
のハンダバンプにハンダ５４により直接接合されてい
る。FIG. 2 is a block diagram of an electronic device 1 showing another embodiment. In this electronic device 1, the control MIC 6 and the acceleration sensor 12 are flip chips, and the ceramic substrate 5
Are directly joined to the solder bumps of No. 1 by solder 54.
【００１６】尚、上記の実施例では、中空部４に収納さ
れる第１電子素子を加速度センサ１２としたが、空間部
で密封を必要とするような素子であれば、他の素子でも
良い。又、この中空部には加速度センサ等の第１電子素
子の他、他の電子素子、例えば振動子等の樹脂を直接ポ
ッティングできない素子、を共に配設するようにしても
良い。Although the first electronic element housed in the hollow portion 4 is the acceleration sensor 12 in the above embodiment, other elements may be used as long as they need to be sealed in the space. . In addition to the first electronic element such as an acceleration sensor, another electronic element, for example, an element such as a vibrator that cannot be directly potted with resin may be provided together in the hollow portion.
【図１】本発明の具体的な実施例に係る電子装置の構成
を示した構成図。FIG. 1 is a configuration diagram showing a configuration of an electronic device according to a specific embodiment of the invention.
【図２】本発明の具体的な他の実施例に係る電子装置の
構成を示した構成図。FIG. 2 is a configuration diagram showing a configuration of an electronic device according to another specific example of the present invention.
【図３】リードフレムのアイランド部の加工方法を説明
した説明図。FIG. 3 is an explanatory diagram illustrating a method for processing an island portion of a lead frame.
１…電子装置 ２…リードフレーム ３…アイランド部 ４…中空部 ５…セラミック基板 ６…制御用ＭＩＣ（電子素子） ８…チップコンデンサ（電子素子） １２…加速度センサ（第１電子素子） ２０…足 ２１…ボンディングランド ３１…周辺部 ３２…突出部 DESCRIPTION OF SYMBOLS 1 ... Electronic device 2 ... Lead frame 3 ... Island part 4 ... Hollow part 5 ... Ceramic substrate 6 ... Control MIC (electronic element) 8 ... Chip capacitor (electronic element) 12 ... Acceleration sensor (first electronic element) 20 ... Feet 21 ... Bonding land 31 ... Peripheral part 32 ... Projection part
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/28 Ａ 8617−4Ｍ Ｚ 8617−4Ｍ 29/84 Ａ 8932−4Ｍ // Ｂ２９Ｌ 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical display location H01L 23/28 A 8617-4M Z 8617-4M 29/84 A 8932-4M // B29L 31:34
Claims (2)
載した基板と、該基板を設置するリードフレームと、前
記基板及び前記リードフレームをモールド成形した電子
装置において、 前記リードフレームのアイランド部を平坦な周辺部と、
該周辺部の内側を凸状に突出した突出部とに形成し、 前記基板の裏面と前記アイランド部の前記周辺部とを接
合し、 前記基板の裏面と前記アイランド部の前記突出部とで形
成される中空部に第１電子素子を配設し、 前記第１電子素子と前記基板の表面の回路配線とを接続
する配線を形成し、 前記基板の表面の回路配線と前記リードフレームの足の
ボンディングランドとをワイヤーで接続した後、前記基
板、前記基板の表面上に配設された前記電子素子、及
び、前記リードフレームをモールド成形したことを特徴
とする電子装置。1. A substrate on which circuit wiring is formed, on which electronic elements are mounted, a lead frame on which the substrate is installed, an electronic device in which the substrate and the lead frame are molded, wherein an island portion of the lead frame is formed. A flat periphery,
The inner side of the peripheral portion is formed into a protruding portion that protrudes in a convex shape, the back surface of the substrate is joined to the peripheral portion of the island portion, and the back surface of the substrate and the protruding portion of the island portion are formed. A first electronic element is disposed in the hollow portion, and wiring for connecting the first electronic element and the circuit wiring on the surface of the substrate is formed, and the circuit wiring on the surface of the substrate and the foot of the lead frame are formed. An electronic device characterized in that the substrate, the electronic element disposed on the surface of the substrate, and the lead frame are molded after connecting to a bonding land with a wire.
ることを特徴とする請求項１に記載の電子装置。2. The electronic device according to claim 1, wherein the first electronic element is an acceleration sensor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6760394A JP3317010B2 (en) | 1994-03-11 | 1994-03-11 | Electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6760394A JP3317010B2 (en) | 1994-03-11 | 1994-03-11 | Electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07249729A true JPH07249729A (en) | 1995-09-26 |
| JP3317010B2 JP3317010B2 (en) | 2002-08-19 |
Family
ID=13349674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6760394A Expired - Fee Related JP3317010B2 (en) | 1994-03-11 | 1994-03-11 | Electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3317010B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5859759A (en) * | 1996-10-02 | 1999-01-12 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor pressure sensor module |
| US7230320B2 (en) | 2003-02-18 | 2007-06-12 | Hitachi, Ltd. | Electronic circuit device with reduced breaking and cracking |
| JP2008084978A (en) * | 2006-09-26 | 2008-04-10 | Denso Corp | Electronic controller |
| JP2010114346A (en) * | 2008-11-10 | 2010-05-20 | Asmo Co Ltd | Resin sealed semiconductor device and method of producing resin sealed semiconductor device |
-
1994
- 1994-03-11 JP JP6760394A patent/JP3317010B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5859759A (en) * | 1996-10-02 | 1999-01-12 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor pressure sensor module |
| US7230320B2 (en) | 2003-02-18 | 2007-06-12 | Hitachi, Ltd. | Electronic circuit device with reduced breaking and cracking |
| JP2008084978A (en) * | 2006-09-26 | 2008-04-10 | Denso Corp | Electronic controller |
| JP2010114346A (en) * | 2008-11-10 | 2010-05-20 | Asmo Co Ltd | Resin sealed semiconductor device and method of producing resin sealed semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3317010B2 (en) | 2002-08-19 |
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