JPH118532A - 発振回路 - Google Patents

発振回路

Info

Publication number
JPH118532A
JPH118532A JP9247104A JP24710497A JPH118532A JP H118532 A JPH118532 A JP H118532A JP 9247104 A JP9247104 A JP 9247104A JP 24710497 A JP24710497 A JP 24710497A JP H118532 A JPH118532 A JP H118532A
Authority
JP
Japan
Prior art keywords
circuit
delay
inverting
signal
oscillation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9247104A
Other languages
English (en)
Japanese (ja)
Other versions
JPH118532A5 (enExample
Inventor
Sadahiro Komatsu
禎浩 小松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9247104A priority Critical patent/JPH118532A/ja
Priority to TW087106090A priority patent/TW454385B/zh
Priority to US09/064,754 priority patent/US6028490A/en
Priority to KR1019980014690A priority patent/KR19980081702A/ko
Publication of JPH118532A publication Critical patent/JPH118532A/ja
Publication of JPH118532A5 publication Critical patent/JPH118532A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
    • H03K3/0231—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
JP9247104A 1997-04-25 1997-09-11 発振回路 Pending JPH118532A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9247104A JPH118532A (ja) 1997-04-25 1997-09-11 発振回路
TW087106090A TW454385B (en) 1997-04-25 1998-04-21 Oscillator circuit
US09/064,754 US6028490A (en) 1997-04-25 1998-04-23 Ring oscillators having inverting and delay elements
KR1019980014690A KR19980081702A (ko) 1997-04-25 1998-04-24 발진회로

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP9-109345 1997-04-25
JP10934597 1997-04-25
JP9247104A JPH118532A (ja) 1997-04-25 1997-09-11 発振回路

Publications (2)

Publication Number Publication Date
JPH118532A true JPH118532A (ja) 1999-01-12
JPH118532A5 JPH118532A5 (enExample) 2004-11-25

Family

ID=26449115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9247104A Pending JPH118532A (ja) 1997-04-25 1997-09-11 発振回路

Country Status (4)

Country Link
US (1) US6028490A (enExample)
JP (1) JPH118532A (enExample)
KR (1) KR19980081702A (enExample)
TW (1) TW454385B (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008203112A (ja) * 2007-02-21 2008-09-04 Matsushita Electric Ind Co Ltd 超音波流速計
JP2008203111A (ja) * 2007-02-21 2008-09-04 Matsushita Electric Ind Co Ltd 超音波流速計
JP2010268223A (ja) * 2009-05-14 2010-11-25 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路
JP2010288255A (ja) * 2009-05-14 2010-12-24 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930534B1 (en) * 2003-05-16 2005-08-16 Transmeta Corporation Temperature compensated integrated circuits
KR100555530B1 (ko) * 2003-11-24 2006-03-03 삼성전자주식회사 안정적인 동기 동작을 수행할 수 있는 지연 동기 루프 및 지연 동기 루프의 위상 검출부
US7142018B2 (en) 2004-06-08 2006-11-28 Transmeta Corporation Circuits and methods for detecting and assisting wire transitions
US7173455B2 (en) 2004-06-08 2007-02-06 Transmeta Corporation Repeater circuit having different operating and reset voltage ranges, and methods thereof
US7336103B1 (en) * 2004-06-08 2008-02-26 Transmeta Corporation Stacked inverter delay chain
US7635992B1 (en) 2004-06-08 2009-12-22 Robert Paul Masleid Configurable tapered delay chain with multiple sizes of delay elements
US7304503B2 (en) 2004-06-08 2007-12-04 Transmeta Corporation Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
US7405597B1 (en) * 2005-06-30 2008-07-29 Transmeta Corporation Advanced repeater with duty cycle adjustment
US7656212B1 (en) 2004-06-08 2010-02-02 Robert Paul Masleid Configurable delay chain with switching control for tail delay elements
US7498846B1 (en) 2004-06-08 2009-03-03 Transmeta Corporation Power efficient multiplexer
US7071747B1 (en) 2004-06-15 2006-07-04 Transmeta Corporation Inverting zipper repeater circuit
US7330080B1 (en) 2004-11-04 2008-02-12 Transmeta Corporation Ring based impedance control of an output driver
US7592842B2 (en) * 2004-12-23 2009-09-22 Robert Paul Masleid Configurable delay chain with stacked inverter delay elements
US20070013425A1 (en) * 2005-06-30 2007-01-18 Burr James B Lower minimum retention voltage storage elements
US7663408B2 (en) * 2005-06-30 2010-02-16 Robert Paul Masleid Scannable dynamic circuit latch
US7394681B1 (en) 2005-11-14 2008-07-01 Transmeta Corporation Column select multiplexer circuit for a domino random access memory array
US7642866B1 (en) 2005-12-30 2010-01-05 Robert Masleid Circuits, systems and methods relating to a dynamic dual domino ring oscillator
US7414485B1 (en) * 2005-12-30 2008-08-19 Transmeta Corporation Circuits, systems and methods relating to dynamic ring oscillators
US7710153B1 (en) 2006-06-30 2010-05-04 Masleid Robert P Cross point switch
US7495466B1 (en) * 2006-06-30 2009-02-24 Transmeta Corporation Triple latch flip flop system and method
US7859354B1 (en) 2007-12-19 2010-12-28 Altera Corporation Ring oscillators

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4656369A (en) * 1984-09-17 1987-04-07 Texas Instruments Incorporated Ring oscillator substrate bias generator with precharge voltage feedback control

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008203112A (ja) * 2007-02-21 2008-09-04 Matsushita Electric Ind Co Ltd 超音波流速計
JP2008203111A (ja) * 2007-02-21 2008-09-04 Matsushita Electric Ind Co Ltd 超音波流速計
JP2010268223A (ja) * 2009-05-14 2010-11-25 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路
JP2010288255A (ja) * 2009-05-14 2010-12-24 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路
JP2010288257A (ja) * 2009-05-14 2010-12-24 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路
JP2010288256A (ja) * 2009-05-14 2010-12-24 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路
JP2013034267A (ja) * 2009-05-14 2013-02-14 Nippon Telegr & Teleph Corp <Ntt> クロックデータ再生回路

Also Published As

Publication number Publication date
TW454385B (en) 2001-09-11
US6028490A (en) 2000-02-22
KR19980081702A (ko) 1998-11-25

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