JPH1141624A5 - - Google Patents
Info
- Publication number
- JPH1141624A5 JPH1141624A5 JP1997197013A JP19701397A JPH1141624A5 JP H1141624 A5 JPH1141624 A5 JP H1141624A5 JP 1997197013 A JP1997197013 A JP 1997197013A JP 19701397 A JP19701397 A JP 19701397A JP H1141624 A5 JPH1141624 A5 JP H1141624A5
- Authority
- JP
- Japan
- Prior art keywords
- clock
- signal
- signal processing
- generating
- processing device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19701397A JP3847908B2 (ja) | 1997-07-23 | 1997-07-23 | 信号処理装置及びクロック発生装置 |
| US09/114,513 US6453109B1 (en) | 1997-07-23 | 1998-07-14 | Video-signal processing apparatus providing a first clock signal and second clock signal which is based on the phase of the input signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19701397A JP3847908B2 (ja) | 1997-07-23 | 1997-07-23 | 信号処理装置及びクロック発生装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH1141624A JPH1141624A (ja) | 1999-02-12 |
| JPH1141624A5 true JPH1141624A5 (enExample) | 2005-05-19 |
| JP3847908B2 JP3847908B2 (ja) | 2006-11-22 |
Family
ID=16367339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19701397A Expired - Fee Related JP3847908B2 (ja) | 1997-07-23 | 1997-07-23 | 信号処理装置及びクロック発生装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6453109B1 (enExample) |
| JP (1) | JP3847908B2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19924987C2 (de) * | 1999-05-31 | 2002-02-14 | Siemens Ag | Vorrichtung zur Unterdrückung von Jittern in Taktregenerierungseinrichtungen |
| US6744917B1 (en) * | 2000-03-08 | 2004-06-01 | Microsoft Corporation | Apparatus and method for recognizing color space of a digital video input |
| JP4452136B2 (ja) * | 2004-03-30 | 2010-04-21 | 株式会社日立製作所 | データ同期再生装置及び端末装置 |
| JP2005322977A (ja) * | 2004-05-06 | 2005-11-17 | Canon Inc | カメラ一体型記録再生装置 |
| US20080062311A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices to Use Two Different Clocks in a Television Digital Encoder |
| US20080062312A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices of Using a 26 MHz Clock to Encode Videos |
| GB2460417B (en) * | 2008-05-28 | 2011-04-06 | Mirics Semiconductor Ltd | Broadcast receiver system |
| GB2460416B (en) * | 2008-05-28 | 2010-07-07 | Mirics Semiconductor Ltd | Broadcast receiver system |
| GB2460418B (en) * | 2008-05-28 | 2010-04-14 | Mirics Semiconductor Ltd | Broadcast receiver system |
| US8312346B2 (en) * | 2009-05-01 | 2012-11-13 | Mirics Semiconductor Limited | Systems and methods for communications |
| JP5616922B2 (ja) * | 2012-04-16 | 2014-10-29 | 株式会社ソニー・コンピュータエンタテインメント | 同期信号調整装置、同期信号調整方法、映像表示装置、および同期信号発生装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR890015245A (ko) * | 1988-03-30 | 1989-10-28 | 무라가미 류우이찌 | 비디오신호의 휘도 및 색성분으로부터 분리클록신호를 획득하는 자기 기록재생 장치 |
| US5745314A (en) * | 1989-09-27 | 1998-04-28 | Canon Kabushiki Kaisha | Clock generating circuit by using the phase difference between a burst signal and the oscillation signal |
| US6002536A (en) * | 1990-07-06 | 1999-12-14 | Hitachi Ltd. | Digital transmission signal processing system and recording/reproducing system |
| JPH066825A (ja) * | 1992-06-18 | 1994-01-14 | Canon Inc | 画像処理装置 |
| US5596554A (en) * | 1993-06-04 | 1997-01-21 | Hagadorn; Hubert W. | Set operation in a timepiece having an electrooptical display |
| US6115265A (en) * | 1994-02-22 | 2000-09-05 | Alliedsignal Inc. | Constant output current load driver |
| US5744991A (en) * | 1995-10-16 | 1998-04-28 | Altera Corporation | System for distributing clocks using a delay lock loop in a programmable logic circuit |
| US5982574A (en) * | 1997-10-17 | 1999-11-09 | Vtc Inc. | Automatic tracking frequency servo demodulation technique for DVCR applications |
-
1997
- 1997-07-23 JP JP19701397A patent/JP3847908B2/ja not_active Expired - Fee Related
-
1998
- 1998-07-14 US US09/114,513 patent/US6453109B1/en not_active Expired - Fee Related
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