JPH11289096A - Thin film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To arrange the growing directions of crystals in one direction at the time of growing the crystals by hot annealing. SOLUTION: A thin film transistor has a base film on a substrate, a semiconductor film on the base film, and a gate insulating film on the semiconductor film. The transistor also has source and drain areas formed in the semiconductor film, a channel forming area formed between the source and drain areas, and a gate electrode formed on the gate insulating film. In the channel forming area, acicular or columnar crystals are grown in parallel with the surface of the substrate and the crossing rate of carriers is controlled by the angle between the line connecting the source area to the drain area and the growing direction of the crystals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate such as glass, and a method for manufacturing the same.

[0002]

2. Description of the Related Art As a semiconductor device having TFTs on an insulating substrate such as glass, active type liquid crystal display devices and image sensors using these TFTs for driving pixels are known.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. Note that, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

As a method for obtaining a silicon semiconductor in the form of a thin film having crystallinity, (1) a film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy. Is known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or higher, so that the method is inexpensive. There was also a cost problem that a glass substrate could not be used. Also, (2)
Taking the excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low, and the entire surface of the large-area substrate is uniformly processed. The stability of the laser is not enough, and it seems to be a next-generation technology. (3)
The method (1) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more, and uses an inexpensive glass substrate. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen size is increasing, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage and distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, in the case of 7059 glass, which is currently most commonly used, the strain point is 593 ° C., and the conventional heating crystallization method causes large deformation. In addition to the problem of the temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.

[0005]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Of course, a crystalline silicon semiconductor manufactured using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technology, and can be used for the active layer region of the TFT. It goes without saying that there is something.

Background of the Invention The present inventors form an amorphous silicon semiconductor film by a CVD method or a sputtering method and crystallize the film by heating as described in the section of the prior art. Regarding the method, the following experiments and considerations were made.

First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallizing the film by heating is examined. The crystal growth starts from the interface between the glass substrate and the amorphous silicon. When the film thickness exceeded a certain level, it was recognized that the film proceeded in a columnar shape perpendicular to the substrate surface.

In the above phenomenon, a crystal nucleus serving as a base for crystal growth (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be due to going. Such a crystal nucleus
Considered to be trace amounts of impurity metal elements present on the substrate surface and crystalline components on the glass surface (like glass crystallized glass, it is considered that there is a crystalline component of silicon oxide on the glass substrate surface) Can be

Therefore, it was considered that the crystallization temperature could be lowered by more actively introducing crystal nuclei, and in order to confirm the effect, a small amount of another metal was deposited on the substrate. An experiment was conducted in which a thin film made of amorphous silicon was formed thereon and then heated and crystallized. As a result, when some metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was expected that crystal growth using foreign matter as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals whose temperature could be reduced was investigated in more detail.

[0010] Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of point-like fine crystals at a constant temperature. The case was also shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism is not clear at present, but is presumed to have some catalytic effect.

In any case, due to the above two effects, it has not been possible to consider a case where a thin film made of amorphous silicon is formed after a certain kind of metal is formed in a very small amount and then heated and crystallized. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less for about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and a material selected by us is nickel. The metal elements having a catalytic action on the crystallization include Fe,
Co, Pd, and Pt can be mentioned.

One example of the effect of nickel is as follows. On a substrate on which no treatment is performed, that is, on a substrate on which a very small amount of nickel thin film is not formed (Corning 70
When a thin film made of amorphous silicon formed on a (59 glass) by plasma CVD is crystallized by heating in a nitrogen atmosphere, when the heating temperature is set to 600 ° C.,
Although a heating time of 10 hours or more was required, when a thin film made of amorphous silicon was used on a substrate on which a very small amount of nickel film was formed, similar crystallization was performed by heating for about 4 hours. I got the status. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.

[0013]

As can be seen from the above description,
When a thin film made of amorphous silicon is formed after forming a thin film of nickel, a lower crystallization temperature and a shorter time required for crystallization can be achieved. Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT. As will be described in detail later, the nickel thin film is formed not only on the substrate but also on the amorphous silicon, and has the same effect. In the following, a series of these processes will be referred to as "addition of trace amount of nickel".

First, a method for adding a trace amount of nickel will be described. The addition of a small amount of nickel is also possible by forming a small amount of nickel thin film on a substrate and then forming amorphous silicon.
The method of first forming an amorphous silicon film and then forming a minute amount of a nickel thin film thereon has the same effect of lowering the temperature, and the film forming method can be either a sputtering method, a vapor deposition method, or a spin coating method. It has been found that either a coating method or a coating method is possible, and a film forming method is not limited. However, when a very small amount of nickel thin film is formed on a substrate, a silicon oxide thin film is formed on the same substrate and a very small amount of nickel thin film is formed thereon rather than directly on a 7059 glass substrate. The effect is more remarkable when a thin nickel thin film is formed. One possible reason for this is that direct contact between silicon and nickel is important for the low-temperature crystallization in this case, and in the case of 7059 glass, components other than silicon inhibit the contact or reaction between the two. It may be that.

As a method of adding a small amount, almost the same effect was confirmed by adding nickel by ion implantation, in addition to forming a thin film in contact with above or below amorphous silicon. Regarding the amount of nickel, 1 × 10 ^{15 at}
It has been confirmed that the temperature is lowered at the addition of an amount of at least ms / cm ³ , but at an addition amount of at least 10 ²¹ atoms / cm ³ atoms / cm ³ , the peak shape of the Raman spectroscopic spectrum is different from that of silicon alone. Because they are clearly different, only 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 can be actually used.
It seems to be in the range of × 10 ¹⁹ atoms / cm ³ .
If the concentration of nickel is 1 × 10 ¹⁵ atoms / cm ³ or less, the nickel element is localized and the function as a catalyst is reduced. Further, the concentration of nickel is 5 × 10 ¹⁹ atoms /
If it is more than cm ³ , it becomes a compound of NiSi and semiconductor characteristics are lost. In the crystallized state, the lower the concentration of nickel, the more it can be used as a semiconductor. From the above considerations, as a semiconductor,
Considering that it is used for an active layer of a TFT or the like, this amount is 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ¹⁹ atoms.
/ Cm ³ .

Next, a description will be given of a crystal form in the case where a trace amount of nickel is added. As described above, when nickel is not added, nuclei are randomly generated from crystal nuclei at a substrate interface or the like, and crystal growth from the nuclei is also random up to a certain film thickness, and is generally performed for thicker thin films. It is known that columnar crystal growth in which the (110) direction is arranged in the direction perpendicular to the substrate is performed. Naturally, almost uniform crystal growth is observed over the entire thin film. On the other hand, in the case of the addition of a very small amount of nickel, the crystal growth was different between the region where nickel was added and the vicinity thereof. That is, in the region where nickel is added, the added nickel or its compound with silicon becomes a crystal nucleus, and the columnar crystal grows almost perpendicular to the substrate similarly to the case where nickel is not added. It became clear from the micrograph. Crystallization at low temperature was confirmed even in the vicinity of the region where a small amount of nickel was not added. In that portion, the direction perpendicular to the substrate was arranged at (111), and needle-like or columnar crystals were parallel to the substrate. An unusual crystal growth of growth was observed. It is observed that the crystal growth in the horizontal direction parallel to this substrate grows as large as several hundred μm from the region where a small amount of nickel is added, and the growth amount increases in proportion to the increase of time and temperature. I knew I would do it. As an example, a growth of about 40 μm was observed at 550 ° C. for 4 hours. Moreover, according to the transmission electron beam micrograph, it has been found that all of the large lateral crystals are single crystal-like. The nickel concentration of the nickel-added portion, the laterally grown portion in the vicinity thereof, and the amorphous portion further away (the low-temperature crystallization is not performed in the portion far away and the amorphous portion remains) are set to S.
Inspection by IMS (Secondary Ion Mass Spectroscopy) revealed that the lateral growth portion was detected to be about one digit smaller than the nickel trace addition portion, and diffusion in amorphous silicon was observed.
Further, the amount of the amorphous portion was further reduced by about one digit.
The relationship between this and the crystal morphology is not clear at present, but in any case, it is possible to form a silicon thin film having crystallinity of a desired crystal morphology in a desired portion by controlling the amount of nickel added and its position. is there.

Next, the electrical characteristics of the nickel-added portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the nickel-added portion are substantially the same as those of a film to which nickel is not substantially added, that is, a film which has been crystallized at about 600 ° C. for several tens of hours. When the activation energy was determined from the properties, the amount of nickel added was 10 ¹⁷ atoms / cm ³ to 10 ¹⁸ a
In the case of about toms / cm ^3, no behavior that could be attributed to the nickel level was observed. That is, if the concentration of nickel in the crystalline silicon semiconductor film is 10 ¹⁸ atoms / cm ³ or less, it is inconvenient to manufacture a semiconductor device, for example, a TFT using this film. It turns out that there is no.

On the other hand, the laterally grown portion has an electric conductivity one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is considered to be due to the fact that the current path direction coincided with the lateral growth direction of the crystal, so that few or no grain boundaries existed during the passage of electrons between the electrodes.
It is consistent with the result of the transmission electron micrograph.

However, when the laterally grown portion of the crystal is observed in detail by a transmission electron microscope photograph, it can be seen that even if the crystal direction of the needle-like or columnar crystal is in a direction parallel to the substrate surface, it can be seen from above the substrate. When viewed, a portion growing in a branch shape was observed. That is, on average, needle-like or columnar crystals grew in the same direction, but it was observed that some crystals grew branching obliquely.

As a result of considering the above observation results, the present inventors came to the following conclusion. The crystal component of the substrate material and the crystal component in the semiconductor film existing in the substrate and in the vicinity of the interface between the substrate and the semiconductor film can serve as nuclei for crystal growth. This hinders crystal growth in various directions and promotes random crystal growth.

Therefore, according to the present invention, the interface between the substrate in the region where crystal growth is to take place and the amorphous silicon semiconductor film (a crystal component exists as a matter of degree even if amorphous) and the crystal in the vicinity thereof Ingredients are removed as much as possible by ion implantation of an inert element to completely amorphize. Then, in a state where there is no component to be a crystal nucleus, by performing crystal growth in a lateral direction (a direction parallel to the substrate surface),
The gist of the present invention is to perform needle-like or column-like crystal growth in which the crystal growth directions are aligned as a whole. In particular, by implanting inert ions in the center of the substrate, it is possible to perform the ion implantation near the substrate surface (when a base film is formed on the substrate surface, the base film surface is regarded as the substrate surface). It is characterized in that the interface with the semiconductor film, and further, the semiconductor film itself is completely amorphized, and components having crystallinity that can be nuclei during crystallization are removed as much as possible.

In this way, a crystalline silicon film can be obtained by selectively performing crystallization. However, if the characteristics of such a crystalline silicon film are further improved,
After the crystallization step, a laser or a strong light equivalent thereto may be irradiated to crystallize the insufficiently crystallized components remaining at the grain boundaries and the like. In this step, the remaining amorphous component grows with the crystal formed in the previous heating step as a nucleus, and the grain boundaries disappear, so that higher characteristics can be obtained.

[0023]

Embodiments of the present invention will be described below, and the present invention will be described in more detail.

[0024]

[Embodiment 1] In this embodiment, a circuit is formed in which a P-channel TFT (referred to as PTFT) and an N-channel TFT (referred to as NTFT) using crystalline silicon are complementarily combined on a glass substrate. Here is an example. The configuration of this embodiment can be used for a peripheral driver circuit or an image sensor of an active liquid crystal display device.

FIG. 1 is a sectional view showing a manufacturing process of this embodiment. First, a 2000-nm-thick silicon oxide base film 102 is formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a silicon oxide film 103 serving as a mask is provided. The silicon oxide film 103 exposes the base film 102 in a slit shape and needs to have a thickness of 1000 ° or more. It is also useful to add a material having a gettering effect to the mask 103, for example, phosphorus or chlorine. When this state is viewed from above, the base film 102 is exposed in a slit shape, and the other portions are masked.

After the silicon oxide film 103 is provided, the thickness is 5 to 200 °, for example, 20 ° by a sputtering method.
Nickel silicide film (chemical formula NiSi _x in, 0.4 ≦ x ≦
2.5, for example, x = 2.0) 98 is selectively formed in a region of 100. That is, a small amount of nickel is selectively added to a region indicated by 100. (Fig. 1 (A))

Next, the silicon oxide film 103 serving as a mask is removed, and a thickness of 500 to 1
An intrinsic (I-type) amorphous silicon film 104 of 500 °, for example, 1000 ° is formed. This amorphous silicon film 104 may be a film having crystallinity. That is, any non-single-crystal silicon film may be used. Further, a silicon oxide film 99 serving as a protective film is
A film is formed to a thickness of 0 to 1000 °. This silicon oxide film is
This is provided in order to prevent the surface of the silicon film 104 from being damaged during the subsequent ion implantation.

Then, silicon ions, which are inert elements, are implanted into the entire surface of the silicon film 104. Since the silicon ions are implanted in a subsequent thermal annealing step so that crystal growth in a uniform direction is performed, a pre-existing substrate (here, the substrate including the base film 102 is considered here) and an amorphous silicon semiconductor This is for removing a crystal component (a silicon oxide crystal component in the substrate or a crystal component in the amorphous semiconductor film) at the interface with the film.

Conditions for this implantation of silicon ions are set so that the implantation is performed at a dose amount as shown in FIG. In FIG. 5, a portion indicated by a dotted line is an interface portion between the base film 102 and the amorphous silicon film 104. The maximum value of the dose was 5 × 10 ¹⁴ cm ⁻² on the substrate side.
At the time of this implantation of silicon ions, the amorphous silicon film 1 is centered on the interface between the underlying film 102 (here, the underlying film 102 constitutes the substrate surface) and the amorphous silicon film 104.
04 itself, the interface between the amorphous silicon film 104 and the silicon oxide film 99 and the vicinity thereof are amorphized. The dose of silicon ions is preferably 1 × 10 ^{14 to} 9 × 10 ¹⁶ cm ⁻² .

In the step of implanting silicon ions, since the surface of the amorphous silicon film is covered with the silicon oxide film 99,
Damage from accelerated ions can be reduced. In order to prevent silicon ions from being implanted into the 100 regions where a trace amount of nickel has been added, it is also useful to form a mask on this region. This is to prevent unnecessary diffusion of the nickel element during ion implantation.

Then, the silicon oxide silicon film 99 is removed,
Under a hydrogen reducing atmosphere (preferably, the partial pressure of hydrogen is 0.1 to
1 atmosphere) or a nitrogen atmosphere (atmospheric pressure).
The amorphous silicon film 104 is crystallized by annealing at 0 ° C. for 4 hours. At this time, in the region 100 where the nickel silicide film is selectively formed, crystallization of the silicon film 104 occurs in a direction perpendicular to the substrate 101. And the area 100
In other areas, as shown by an arrow 105, the area 100
From the lateral direction (the direction parallel to the substrate). The crystallization temperature can be in the range of 450 ° C. to 700 ° C., but if it is high, the problem of heat resistance of the glass substrate occurs as in the conventional case.

In the region where the lateral crystal growth is performed, the interface between the base film 102 and the silicon film 104 and its vicinity, and furthermore, the amorphous silicon film itself is thoroughly amorphized. During the crystallization indicated by the arrow 105, there is no crystal component that causes the crystallization direction to be disturbed,
Uniform lateral growth can be achieved.

As a result of the above steps, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. Thereafter, isolation between elements is performed by patterning, and a silicon oxide film 10 having a thickness of 1000
6 is formed as a gate insulating film. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example, 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less. did. Subsequently, a thickness of 6000 to 800
0%, for example, 6000% of aluminum (0.1-2%
(Including silicon). Note that it is preferable that the step of forming the silicon oxide film 106 and the aluminum film be performed continuously.

Then, the silicon film is patterned,
Gate electrodes 107 and 109 are formed. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layers 108 and 110 is 2000
Å. Since the oxides 108 and 110 have a thickness for forming an offset gate region in a later ion doping process, the length of the offset gate region can be determined in the anodic oxidation process.

Then, impurities (phosphorus and boron) are implanted into the region of the crystalline silicon film by ion doping using the gate electrode 107 and the surrounding oxide layer 108 and the gate electrode 109 and the surrounding oxide layer 110 as masks. I do. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and in the latter case, it is 40 kV.
-80 kV, for example, 65 kV. Dose amount is 1 × 1
0 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 2 × 10 ¹⁵ cm of phosphorus
^-2 , boron was set to 5 × 10 ¹⁵ . When doping, by covering one area with photoresist,
Each element was selectively doped. As a result,
N-type impurity regions 114 and 116, P-type impurity region 1
11 and 113 are formed, and a P-channel type TFT (PTF
A region T) and a region of an N-channel TFT (NTFT) were formed.

Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots was irradiated. It is useful to heat the substrate to about 200 to 450 ° C. at the time of this laser light irradiation. In this laser annealing step, nickel is diffused in the previously crystallized region, so that the laser light irradiation facilitates recrystallization, and the impurity doped with an impurity imparting a P-type. Area 1
11 and 113, and further, the impurity regions 114 and 116 doped with an impurity for imparting N could be easily activated.

Subsequently, a silicon oxide film 11 having a thickness of 6000.degree.
8 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a metal material, for example, TF is formed by a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 120, and 119 were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm. The semiconductor circuit was completed by the above steps. (Fig. 1 (D))

The above-described circuit has a CMOS structure in which PTFT and NTFT are provided in a complementary manner. In the above-described process, two TFTs are formed at the same time and cut at the center, whereby two independent TFTs are formed at the same time. It is also possible to produce.

FIG. 2 shows an outline of FIG. 1D viewed from above. The Ni-added region in FIG. 2 corresponds to the region 100 shown in FIG. The lateral crystallization is performed in a state where the crystallization is substantially uniform from the Ni-added region in a direction parallel to the substrate as indicated by an arrow. Since the crystal grows in the shape of needles or columns in the moving direction of the carrier moving between the source and the drain, the carrier does not easily cross the grain boundary when moving, so that a high mobility TFT can be obtained. it can.

For example, when crystallization is performed without implanting silicon ions in the step of FIG. 1B, the mobility of the TFT is 50 to 60 cm ² / Vs for the PTFT. In the PTFT fabricated in the example, 90
A high mobility of about 120 cm ² / Vs could be obtained.
Also, in the case of NTFT, when silicon ion implantation is not performed, the mobility is 80 to 100 cm ² / Vs, but in the present embodiment, the mobility is 150 to 180 cm ² / Vs.
² / Vs was obtained.

In this embodiment, as a method for introducing Ni, Ni is selectively thinned on the base film 102 under the amorphous silicon film 104 (it is difficult to observe Ni as a thin film). And a method of growing crystals from this portion was adopted.
After the formation of 04, a method of selectively forming a nickel silicide film may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. Alternatively, a method in which amorphous silicon is formed in advance and nickel ions are selectively implanted into the amorphous silicon film 104 using an ion doping method may be employed. This case has a feature that the concentration of the nickel element can be controlled. Further, it is also possible to add a small amount of nickel by plasma treatment. When introducing nickel element by this plasma treatment,
A base (for example, base silicon oxide film 10) of a semiconductor film (for example, amorphous silicon film 104) for which a trace amount of nickel is to be added.
2) It may be performed on the upper surface or the upper surface of the semiconductor film. In addition, even when Fe, Co, Pd, and Pt are used as a catalyst material for crystallization in addition to nickel, a similar process can be used.
A TFT can be manufactured.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided as a switching element in each pixel in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure.

FIG. 3 shows an outline of the manufacturing process of this embodiment.
In this embodiment, the substrate 201 is Corning 70
A 59 glass substrate was used. First, a base film 202 (silicon oxide) is formed over a glass substrate 201 by a sputtering method. Then, a silicon oxide film 203 having a thickness of 1000 な る serving as a mask is formed. This silicon oxide film is formed in the region
2 functions as a mask for exposing. Thereafter, a nickel silicide film is formed. This nickel silicide film is formed to a thickness of 5 to 200 °, for example, 20 ° by a sputtering method. This nickel silicide film has the chemical formula NiS
_{i x, 0.4 ≦ x ≦ 2.5} , for example, represented by x = 2.0.

Thereafter, after removing the silicon oxide film 203 serving as a mask, an amorphous silicon film 205 (thickness: 300 to 1500 °) is formed by LPCVD or plasma CVD, and a silicon oxide protective film 200 is formed. It is formed to a thickness of 500 mm. (FIG. 3 (B))

Then, through the same silicon ion implantation process as in Example 1, crystallization was performed by heat annealing.
This annealing step is performed under a hydrogen reducing atmosphere (preferably,
(The hydrogen partial pressure was 0.1 to 1 atm.) At 550 ° C. for 4 hours. At this time, some regions under the amorphous silicon film 205
Since the nickel silicide film is formed, crystal growth occurs in a direction perpendicular to the substrate in that portion and in a direction parallel to the substrate in other portions, so that a crystalline silicon film can be obtained.

Then, the semiconductor region (portion indicated by 204) made of crystalline silicon is patterned to form an island-shaped semiconductor region (TFT active layer). Further, a gate insulating film of silicon oxide (thickness of 700 to 1200 Å, here 1000 １０００) is formed by plasma CVD in an oxygen atmosphere using tetraethoxysilane (TEOS) as a raw material.
Å) Form 206.

Next, a silicon gate electrode 207 is formed. After that, phosphorus as an N-type impurity is implanted into the crystalline silicon film in a self-aligned manner by an ion doping method to form source / drain 208 and 209 of the TFT. further,
As shown by an arrow in FIG. 3C, the film is irradiated with a KrF laser beam to improve the crystallinity of the silicon film having deteriorated crystallinity due to the ion doping. At this time, the energy density of the laser beam is 250 to 300 mJ.
/ Cm ² . By the laser irradiation, the source / drain sheet resistance of the TFT is 300 to 80.
It becomes 0 Ω / cm ² .

Thereafter, the interlayer insulator 21 is formed by silicon oxide.
1 is formed, and the pixel electrode 212 is formed of ITO. Then, a contact hole is formed and TF
The electrodes 213 and 214 are formed of a chromium / aluminum multilayer film in the source / drain region of T, and one of the electrodes 214 is also connected to ITO. The chromium / aluminum multilayer film has a chromium film of 20 to 200 nm as a lower layer,
Typically 100 nm, aluminum film 100 to
It is formed by depositing 2000 nm, typically 500 nm. It is desired that these are continuously formed by a sputtering method. Finally, annealing in hydrogen at 200 to 300 ° C. for 2 hours completes hydrogenation of silicon. Thus, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to obtain an active matrix type liquid crystal display device.

FIG. 4 is a schematic top view of the TFT of this embodiment. FIG. 4 shows a TFT portion and a region 204 to which a small amount of nickel has been added. FIG.
Include the source / drain regions 208 and 210, the channel formation region 209, and the gate electrode 2 above the channel formation region.
07 is shown. In crystallization by thermal annealing, crystal growth occurs in a direction parallel to the substrate, as indicated by an arrow, from the region 204 into which nickel is selectively introduced. The source / drain regions 208 and 210 and the channel formation region 209 are formed using a crystalline silicon film grown in a direction parallel to the substrate. During the operation of the TFT, the carriers move between the channel forming region, that is, between the regions 208 and 210, so that the carriers are hardly affected by the grain boundaries in the crystalline silicon film in which the crystal growth directions are aligned. You can move. That is, high mobility can be obtained. Also, since the crystal growth in the lateral direction is performed about 40 μm,
It is preferable that the length of the active layer is 40 μm or less. Further, the nickel trace addition region 204 may overlap the drain / source region 210. However, care must be taken because, when the channel formation region 209 and the nickel-addition region 204 overlap, the crystal growth direction in the channel formation region 209 is perpendicular to the substrate.

In the above embodiment, the TFT is formed so that carriers flow in a direction parallel to the crystal growth direction. However, by appropriately determining the direction in which carriers flow in the TFT and the crystal growth direction, the TFT is formed. , The characteristics of the TFT can be controlled. That is, the direction in which carriers flow in the TFT (the direction of the line connecting the source and the drain) and
The rate at which the carrier crosses the grain boundary can be controlled by the angle formed by the crystal growth direction and the crystal growth direction. By controlling this angle, the resistance of the carrier during the movement can be controlled to some extent.

[Embodiment 3] In this embodiment, by selectively implanting silicon ions, a region where silicon ions have not been implanted is selectively left as a silicon film having a crystal component. This is an example in which lateral crystal growth is performed on an amorphous region where ions are implanted.

For example, in the manufacturing process shown in FIG. 1, a small amount of nickel is selectively added to the region 100 as in the first embodiment, and in the process (B), the region 100 is masked with a resist, Is performed.
At this time, the silicon film 104 is preferably formed as a film having crystallinity. Then, during crystallization by heating, 100
From the silicon film 104 on the region (a region where silicon ions have not been implanted), crystal growth as shown by an arrow 105 can be caused.

A similar effect can be obtained by adding a trace amount of nickel to the entire silicon film 104. However, in this case, crystal growth in the direction perpendicular to the substrate 101 using nickel as a catalyst also occurs.

Embodiment 4 FIG. 6 shows this embodiment. After a silicon oxide film 602 having a thickness of 1000 to 5000 Å, for example, 2000 Å was formed over a glass substrate 601, an amorphous silicon film 603 having a thickness of 300 to 1500 Å, for example, 500 Å was formed by a plasma CVD method. further,
A silicon oxide film 604 having a thickness of 500 to 1500 °, for example, 500 ° is formed thereon. It is desirable that these films are formed continuously. Then, the silicon oxide film 604 was selectively etched to open a window 605 for introducing nickel. The window 605 was formed so as to avoid a portion to be a channel of the TFT. Then, a nickel salt film 607 was formed by spin coating. The method will be described. First, nickel acetate or nickel nitrate is diluted with water or ethanol to form a solution of 25 to 2
The concentration was set to 00 ppm, for example, 100 ppm.

On the other hand, the substrate was immersed in a hydrogen peroxide solution or a mixed solution of a hydrogen peroxide solution and ammonia to form an extremely thin silicon oxide film on the exposed portion of the amorphous silicon film (the area of the window 605). . This is for improving the interface affinity between the nickel solution prepared as described above and the amorphous silicon film. The substrate thus treated is placed on a spinner and gently rotated, and a nickel solution is applied on the substrate for 1 hour.
-10 ml, for example, 2 ml, was dropped, and the solution was spread over the entire surface of the substrate. This state was maintained for 1 to 10 minutes, for example, 5 minutes. Thereafter, spin drying was performed by increasing the rotation speed of the substrate. This operation may be repeated more than once. Thus, a thin film 607 of nickel salt was formed.
(FIG. 6 (A))

Then, silicon ions were implanted by an ion implantation method. At this time, except for the window 605, that is, in a region covered with the silicon oxide film 604, silicon ions are implanted into the interface between the underlying silicon oxide film 602 and the amorphous silicon film 603 most. It was done as follows. At this time, in the region of the window 605, since the silicon oxide film 604 does not exist, silicon ions are implanted deeper. Then, in a heating furnace, 520-58
Heat treatment was performed at 0 ° C. for 4 to 12 hours, for example, at 550 ° C. for 8 hours. The atmosphere was nitrogen. As a result, first, nickel diffused into a region immediately below the window 605, and crystallization started from this region. The crystallization region is indicated by an arrow 6
As shown at 08, it spread around it. (FIG. 6
(B))

Thereafter, in an air or oxygen atmosphere, KrF excimer laser light (wavelength: 248 nm) or XeCl excimer laser light (wavelength: 308 nm) was irradiated for 1 to 20 shots, for example, 5 shots to further improve the crystallinity. Energy density is 200-3
The substrate temperature was 50 mJ / cm ² and the substrate temperature was 200 to 400 ° C. (FIG. 6 (C))

After that, the silicon film 603 is etched,
A TFT region was formed. And the whole surface has a thickness of 1000
Silicon oxide film 609 of up to 1500 °, for example, 1200 °
Are formed, and the gate electrode 610 of the PTFT, the gate electrode 613 of the NTFT, and the respective anodic oxide films 61 are formed of aluminum in the same manner as in the first embodiment.
A gate electrode portion was formed by 2,614.

Then, using these gate electrode portions as masks, N-type and P-type impurities were implanted into the silicon film by ion doping as in Example 1. As a result,
PTFT source 615, channel 616, drain 6
17. Source 620 and channel 6 of NTFT of peripheral circuit
19, a drain 618 was formed. Then, Example 1
Similarly, laser irradiation was performed on the entire surface to activate the doped impurities. (FIG. 6 (D))

Thereafter, as an interlayer insulating material,
A silicon oxide film 621 of 8000 °, for example, 5000 ° was formed. Thereafter, contact holes are formed in the source / drain of the TFT, and a two-layer film of titanium nitride (thickness 1000 °) and aluminum (thickness 5000 °) is deposited by a sputtering method, and is patterned and etched. Thus, electrodes / wirings 622 to 624 were formed. Thus, an inverter circuit composed of PTFT and NTFT could be formed by crystalline silicon grown in the lateral direction. (FIG. 6E)

In this embodiment, laser irradiation is performed as shown in FIG. In this step, the amorphous component remaining between the silicon crystals grown in the shape of needles is crystallized, and the crystallization is performed with the needle-like crystals as nuclei so that the needle-like crystals become thicker. This expands the region through which the current flows, and allows a larger drain current to flow. This is shown in FIG. FIG. 7 shows a thinned crystallized silicon film observed by a transmission electron microscope (TEM). FIG. 7A shows the vicinity of the tip of the crystallized region of the silicon film crystallized by the lateral growth, and needle-like crystals are observed. Further, it can be seen that there are many non-crystallized amorphous regions between the crystals. (FIG. 7 (A))

When this is irradiated with a laser under the conditions of this embodiment, the result is as shown in FIG. By this step, FIG.
The amorphous region which occupies most of the area of (A) is crystallized, but since this crystallization occurs randomly, the electrical characteristics are not so good. Noteworthy is the crystalline state of the region between the needle-like crystals observed near the center, which seems to be originally amorphous. Here, a thick crystal region is formed so as to grow from a needle crystal. (FIG. 7
(B))

FIG. 7 shows, for simplicity,
Although the top region of crystal growth with many amorphous regions was observed, the same is true near the root or center of crystal growth. As described above, by laser irradiation, the amorphous portion can be reduced and the needle-like crystal can be made thick, and the characteristics of the TFT can be further improved.

[0064]

[Effect] A metal element for promoting crystallization is selectively introduced into a specific region, and a lateral direction (a direction parallel to the substrate) is introduced from this region.
Thus, a crystalline silicon film having a uniform crystal growth direction can be obtained. Then, at this time, the region where the crystal growth in the lateral direction is performed does not have a crystal component in advance, so that amorphization is thoroughly performed by implanting inert ions, and further, thermal annealing is performed. Thus, a crystalline semiconductor film having a uniform crystal growth direction can be obtained. Then, by manufacturing a TFT using this film, a TFT with high mobility can be obtained.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows an outline of an embodiment.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows an outline of an embodiment.

FIG. 5 shows the dose of silicon ions.

FIG. 6 shows a manufacturing process of the example.

FIG. 7 shows a crystal structure of an example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Glass substrate 102 Base film (silicon oxide film) 103 Mask 100 Region into which nickel is introduced 99 Protective film (silicon oxide film) 105 Crystal growth direction 107 Gate electrode 108 Anodized layer 109 Gate electrode 110 Anodized layer 111 Source / drain Region 112 channel formation region 113 drain / source region 114 source / drain region 115 channel formation region 116 drain / source region 117 electrode 118 interlayer insulator 119 electrode 120 electrode 201 glass substrate 202 base film (silicon oxide film) 203 mask 204 nickel Region to be introduced 206 Gate insulating film 207 Gate electrode 208 Source / drain region 209 Channel formation region 210 Drain / source region 211 Interlayer insulator 212 ITO (pixel electrode) 213 214 electrode

Claims (7)

[Claims] 1. A semiconductor device comprising: a base film on a substrate; a semiconductor film on the base film; a gate insulating film on the semiconductor film; a source region and a drain region formed in the semiconductor film; A channel formation region formed between the source region and the drain region; and a gate electrode formed on the gate insulating film. In the channel formation region, a needle-like or columnar crystal is formed with respect to a substrate surface. A thin-film transistor, wherein crystals are grown in parallel, and a ratio of carriers crossed is controlled by an angle between a direction of a line connecting the source region and the drain region and the direction of the crystal growth. 2. In a CMOS having a P-channel thin film transistor and an N-channel thin film transistor provided in a complementary manner, each of the thin film transistors has a base film on a substrate, a semiconductor film on the base film, and a semiconductor film on the semiconductor film. A source region and a drain region formed in the semiconductor film, a channel forming region formed between the source region and the drain region, and a gate formed on the gate insulating film. An electrode, wherein in the channel forming region, a needle-like or columnar crystal grows in parallel to the substrate surface, and a direction of a line connecting the source region and the drain region and a direction in which the crystal grows Characterized in that the carrier crossing rate is controlled by the angle formed by the thin film transistor. 3. A semiconductor device comprising: a base film on a substrate; an active layer formed of a semiconductor film on the base film; and a gate insulating film on the active layer, wherein the active layer has at least a source region and a drain region. Having a gate electrode formed on the gate insulating film, wherein a needle-like or columnar crystal grows in parallel with the substrate surface in the channel formation region, A thin film transistor, wherein a ratio of carriers crossing is controlled by an angle between a direction of a line connecting a source region and a drain region and the direction in which the crystal grows. 4. A semiconductor device comprising: a base film on a substrate; a crystalline semiconductor film on the base film; a gate insulating film on the crystalline semiconductor film; and a gate electrode formed on the gate insulating film. Having at least a source region, a drain region, and a channel forming region in the crystalline semiconductor film, and controlling a ratio of carriers traversed by an angle formed between a direction of a line connecting the source region and the drain region and a crystal growth direction. A thin film transistor characterized by the above-mentioned. 5. A semiconductor device comprising: a base film on a substrate; a crystalline semiconductor film on the base film; a gate insulating film on the crystalline semiconductor film; and a gate electrode formed on the gate insulating film. Having at least a source region, a drain region, and a channel forming region in the crystalline semiconductor film; the crystalline semiconductor film having crystal growth in a direction parallel to a substrate surface; A thin film transistor, wherein a ratio of carriers crossing is controlled by an angle between a direction of a connecting line and a crystal growth direction. 6. The thin film transistor according to claim 1, wherein the semiconductor film contains a metal element. 7. The semiconductor device according to claim 1, wherein the concentration of the metal element contained in the semiconductor film is 1 × 10 ^19.
A thin film transistor having a thickness of atoms / cm ³ or less.