JPH0799314A - Semiconductor device - Google Patents

Abstract

PURPOSE:To lower a temperature required for crystallization, and to shorten the time by conforming the direction of crystal growth and the direction that carriers are moved in a semiconductor device. CONSTITUTION:The foundation film 102 of silicon oxide is formed onto a substrate 101, and a mask 103 formed of method or silicon oxide film, is shaped. A nickel silicide film is formed selectively in a region 100. An intrinsic (I-type) amorphous silicon film is formed, and the amorphous silicon film is crystallized through annealing in an reductive hydrogen atmosphere for four hours. Impurities (phosphorus and boron) imparting one conductivity type are implanted into an active layer region. Accordingly, n-type impurity regions 114 and 116 and p-type impurity regions 111 and 113 are formed, and the region of a p- channel TFT (PTFT) and the region of an n-channel TFT (NTFT) can be formed. Annealing is conducted by the irradiation of laser beams.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate such as glass and a method for manufacturing the same.

[0002]

2. Description of the Related Art As a semiconductor device having TFTs on an insulating substrate such as glass, active type liquid crystal display devices and image sensors using these TFTs for driving pixels are known.

Thin film silicon semiconductors are generally used for TFTs used in these devices. The thin-film silicon semiconductor is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low manufacturing temperature, can be relatively easily manufactured by the vapor phase method, and have high mass productivity. Since it is inferior to the silicon semiconductors it has,
In order to obtain higher speed characteristics in the future, establishment of a method for manufacturing a TFT made of a crystalline silicon semiconductor has been strongly demanded. As the crystalline silicon semiconductor, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, semi-amorphous silicon having an intermediate state between crystalline and amorphous are known. .

As a method for obtaining these thin film silicon semiconductors having crystallinity, (1) a film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed and crystallized by the energy of laser light. (3) An amorphous semiconductor film is formed in advance and heat energy is applied so that the film has crystallinity. The method is said to be known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor physical properties over the entire surface of the substrate, and since the film forming temperature is as high as 600 ° C. or more, it is inexpensive. There was also a cost problem that the glass substrate could not be used. Also, (2)
In the case of the most commonly used excimer laser, the method of (1) has a problem that throughput is low because the irradiation area of the laser beam is small, and the entire surface of a large area substrate is uniformly processed. The laser is not stable enough, and there is a strong sense that it is a next-generation technology. (3)
The method (1) has an advantage of being able to handle a large area as compared with the methods (1) and (2), but it is still necessary to set the heating temperature to a high temperature of 600 ° C. or higher, and an inexpensive glass substrate is used. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of current liquid crystal display devices, the screen size is increasing, and therefore it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in the heating step, which is indispensable for semiconductor fabrication, lowers the accuracy of mask alignment and the like, which is a serious problem. Particularly, in the case of 7059 glass which is most commonly used at present, the strain point is 593 ° C., and the conventional heat crystallization method causes a large deformation. In addition to the problem of temperature, in the present process, the heating time required for crystallization reaches several tens of hours or more, so it is necessary to further shorten the heating time.

[0005]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method of manufacturing a thin film of a crystalline silicon semiconductor using a method of crystallizing a thin film of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. Its purpose is to provide a process that achieves both. Of course, the crystalline silicon semiconductor manufactured by using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technique and can be used for the active layer region of the TFT. It goes without saying that there is.

BACKGROUND OF THE INVENTION The inventors of the present invention form an amorphous silicon semiconductor film by the CVD method or the sputtering method, and crystallize the film by heating, as described in the section of the conventional technique. Regarding the method, the following experiments and consideration were performed.

First, as an experimental fact, when an amorphous silicon film was formed on a glass substrate and the mechanism of crystallizing this film by heating was examined, crystal growth started from the interface between the glass substrate and amorphous silicon. It was confirmed that when the film thickness exceeds a certain level, it progresses in a columnar shape perpendicular to the substrate surface.

According to the above phenomenon, a crystal nucleus (a seed which is a basis of crystal growth) which is a basis of crystal growth exists at the interface between the glass substrate and the amorphous silicon film, and a crystal grows from the nucleus. It is considered that it is due to going. Such crystal nuclei are
It is considered to be a trace amount of impurity metal elements present on the substrate surface or crystal components on the glass surface (so-called crystallized glass is believed to contain silicon oxide crystal components on the glass substrate surface). To be

Therefore, it is thought that the crystallization temperature can be lowered by more positively introducing the crystal nuclei, and in order to confirm the effect, a small amount of another metal is formed on the substrate, An experiment was conducted to form a thin film of amorphous silicon on the top and then perform heat crystallization. As a result, a decrease in crystallization temperature was confirmed when several metals were formed on the substrate, and it was expected that crystal growth with foreign particles as crystal nuclei occurred. Therefore, the mechanism of a plurality of impurity metals that could be lowered in temperature was investigated in more detail.

Crystallization can be considered by dividing it into two stages: initial nucleation and crystal growth from the nuclei. Here, the initial nucleation rate is observed by measuring the time until a point-like fine crystal is generated at a constant temperature, and this time is any value in the thin film on which the impurity metal is formed. The case was shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. And, unexpectedly, the growth of crystal grains after nucleation was examined by changing the heating time, and it was found that after depositing a certain metal, the amorphous silicon thin film deposited on it was deposited. In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism will be described in detail later.

In any case, due to the above two effects, it has not been possible in the past to form a small amount of a certain kind of metal on a thin film of amorphous silicon and then heat crystallization. It was found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or lower in about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and the material selected by us is nickel.

To give an example of the effect of nickel, there is no treatment, that is, on a substrate on which a very small amount of nickel thin film has not been formed (Corning 70).
In 59), when a thin film made of amorphous silicon formed by plasma CVD is crystallized by heating in a nitrogen atmosphere, when the heating temperature is 600 ° C., the heating time is 10 hours or more. Although it was necessary, when a thin film made of amorphous silicon on a substrate on which a small amount of a thin film of nickel was formed was used, a similar crystallization state could be obtained by heating for about 4 hours. In addition, Raman spectroscopy spectrum was utilized for the judgment of crystallization at this time. From this alone, it can be seen that the effect of nickel is very large.

[0013]

[Means for Solving the Problems] As can be seen from the above description,
When a thin film of amorphous silicon is formed after a thin film of nickel is formed, the crystallization temperature can be lowered and the time required for crystallization can be shortened. Therefore, on the premise that this process is used for manufacturing a TFT, a more detailed description will be added. As will be described later in detail, since the nickel thin film has the same effect not only on the substrate but also on the amorphous silicon, and because it was the same in the ion implantation, the present specification Then, this series of treatments will be referred to as "addition of a small amount of nickel".

First, a method of adding a small amount of nickel will be described. To add a small amount of nickel, a method of forming a small amount of nickel thin film on a substrate and then forming amorphous silicon
The method of forming amorphous silicon first and then forming a small amount of nickel thin film on it also has the same effect of lowering the temperature. The film forming method may be sputtering, vapor deposition, or coating. It has been proved that a spin coating method or a spin coating method can be used, and the film forming method does not matter. However, when forming a small amount of nickel thin film on a substrate, rather than forming a small amount of nickel thin film directly on the 7059 glass substrate, a thin film of silicon oxide is formed on the same substrate The effect is more remarkable when a thin nickel thin film is formed. One possible reason for this is that direct contact between silicon and nickel is important for this low-temperature crystallization.
In the case of 59 glass, it is possible that components other than silicon may interfere with the contact or reaction between the two.

Further, as a method of adding a trace amount, it was confirmed that substantially the same effect was obtained by adding nickel by ion implantation, in addition to forming a thin film on or below the amorphous silicon. The amount of nickel is 1 × 10 ¹⁵ ato
It has been confirmed that the addition of the amount of ms / cm ³ or more lowers the temperature. However, at the amount of addition of 1 × 10 ²¹ atoms / cm ³ or more, the peak shape of the Raman spectroscopic spectrum is clearly that of silicon alone. Since it is different, it is possible to actually use 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 × 10.
It seems to be in the range of ¹⁹ atoms / cm ³ . Also,
Considering that it is used as an active layer of a TFT as a semiconductor physical property, this amount is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 ×.
It is necessary to suppress it to 10 ¹⁹ atoms / cm ³ .

Next, the characteristics of crystal growth and crystal morphology when a small amount of nickel is added will be described, and the crystallization mechanism inferred therefrom will be described.

As described above, when nickel is not added, nuclei are randomly generated from the crystal nuclei at the substrate interface, etc., and crystal growth from the nuclei is also random, depending on the manufacturing method (110) or ( It has been reported that relatively oriented crystals are obtained in (111), and of course, almost uniform crystal growth is observed over the entire thin film.

First, in order to confirm this mechanism, a DSC (differential scanning calorimeter) analysis was performed. An amorphous silicon thin film formed on a substrate by plasma CVD was filled in a sample container with the substrate attached and the temperature was raised at a constant rate. Then,
A clear exothermic peak was observed at around 700 ° C., and crystallization was observed. This temperature naturally shifts when the temperature rising rate is changed, but when it was carried out at a rate of 10 ° C./min, for example, crystallization started from 700.9 ° C. Next, three types of temperature rising rates were measured, and the activation energy of crystal growth after initial nucleation was determined from them by the Ozawa method. Then, a value of about 3.04 eV was obtained. In addition, when the reaction rate equation was obtained by fitting with a theoretical curve, it was found that it was best explained by the disordered nucleation and its growth model, and nuclei were randomly generated from crystal nuclei such as the substrate interface. The validity of the model of crystal growth from nuclei was confirmed.

The same measurement as that described above was carried out for a sample to which a small amount of nickel was added. Then 10 ℃ /
When the temperature is raised at a rate of min, crystallization starts from 619.9 ° C., and the activation energy of crystal growth obtained from the series of measurements is about 1.87 eV, which facilitates crystal growth. It became clear numerically that it has become. In addition, it was suggested that the reaction rate equation obtained from the fitting with the theoretical curve is close to the one-dimensional interface-controlled model, and has a certain directionality in crystal growth.

Next, the results of observing the crystal morphology of this time with a small amount of nickel added by TEM (transmission electron microscope) will be shown. A characteristic phenomenon found from the result of TEM observation is that the crystal growth differs between the nickel-added region and the vicinity thereof. That is,
When the nickel-added region is observed from the cross-section, moire or fringes that appear to be a lattice image are observed almost perpendicular to the substrate. It is considered that this shows that columnar crystals grow almost perpendicularly to the substrate as well as those that do not. When the nickel-added region was observed from the surface, it was found that the regions were not completely aligned like epitaxy. A TED (transmission electron beam diffraction) pattern showing this is shown in FIG. FIG. 4 shows a pattern obtained by injecting an electron beam perpendicularly to the film surface in a region to which nickel is added. The diameter of the electron beam is several microns, and the large black circle in the center is a pattern from (000). . From FIG. 4, it was found that at least about 3 types of crystals with different angles were observed, and because they were not completely ringed, one crystal grain had a considerable size. To further confirm this, when the orientation was evaluated using a thin film XRD (X-ray diffraction), mainly a peak of {111} or {110} was observed. Here, {hkl} is a symbol indicating all surfaces equivalent to the (hkl) surface. Comparing this result with the result of thin film XRD of a crystallized thin film of the same thickness not added with nickel, the amount of nickel added this time is {110} versus {1}.
11} clearly increased in strength, and it was revealed that the orientation was enhanced by adding nickel.

Next, the observation result of the crystal morphology in the vicinity of the region to which nickel is added will be shown. First, it was unexpected that the region where nickel was not directly added in a trace amount was crystallized, but a nickel trace added portion, a lateral crystal growth portion in the vicinity thereof (hereinafter abbreviated as a lateral growth portion), When the nickel concentration was examined by SIMS (secondary ion mass spectrometry) in the distant amorphous part (the low temperature crystallization is not performed in the part far away and the amorphous part remains), the lateral growth part Was detected in an amount of about one digit less than that of the portion containing a small amount of nickel, and an amount of about one digit less was observed in the amorphous portion. That is, nickel is diffused over a fairly wide range, and it is considered that crystallization of a region in the vicinity of the region to which nickel is added is also an effect of the trace amount of nickel.

First, FIG. 5 shows a surface TEM image in the vicinity of the region to which nickel is added. As is clear from the figure, characteristic needle-like or columnar crystals with uniform width are observed in the direction parallel to the substrate. It is observed that the lateral growth parallel to the substrate grows up to several hundreds μm in a large area from the region where a small amount of nickel is added, and the growth amount may increase in proportion to the increase of time and temperature. understood. As an example,
A growth of about 20 μm was observed at 550 ° C. for 4 hours. It is also known that the angle at which these crystals intersect is about 60 degrees in any case and does not depend on the location. Next, the TED pattern in the above area is shown in FIGS. FIG. 6 shows the tip of the needle-shaped crystal, and FIG. 7 shows the region where the needle-shaped crystals overlap to some extent. The pattern is very simple, and single crystals or twin crystals at most can be seen, and the crystal orientations are very uniform, and this pattern is in very good agreement with [111] incidence.
As a result, it was revealed that the plane parallel to the substrate was (111). Then, since the crystal growth direction is a direction perpendicular to (111), it can be seen that the axial direction of the laterally grown crystal is the [110] direction. This relationship is briefly shown in FIG. Further, the (110) plane or the [110] axial direction has a six-fold symmetry with respect to the [111] direction. Therefore, when intersecting at about 60 degrees described above, each of them is [110]. There is no contradiction that the crystal can be grown in any direction and the TED pattern of FIG. 7 is like a single crystal.

Based on the above experimental facts, the inventors believe that crystallization proceeds by the following mechanism.

First, nucleation occurs, but the activation energy at this time is reduced by the addition of a small amount of nickel. This is obvious from the fact that the addition of nickel causes crystallization to occur at a lower temperature. The reason for this is not only the effect of nickel as a foreign substance but also the intermetallic compound of nickel and silicon. I think that one of them may be due to the fact that the lattice constant is close to that of crystalline silicon. Also, since this nucleation occurs almost at the same time on the entire surface of the region where nickel is added, the mechanism is such that crystal growth grows as it is, and in this case the reaction rate equation becomes a one-dimensional interface rate-determining process, A substantially vertical columnar crystal is obtained. However, the crystal axes are not perfectly aligned due to the limitation of the film thickness and the influence of stress and the like.

However, since the horizontal direction on the substrate is more uniform than the vertical direction, columnar or acicular crystals grow in the horizontal direction with the nickel-added portion as a nucleus,
The direction is [110]. Of course, in this case as well, the reaction rate equation is expected to be a one-dimensional interface-controlled type. Since the activation energy of crystal growth is reduced by adding nickel as described above, this lateral growth rate is expected to be very high, and this is the case.
However, the reason why crystals grow in the [110] direction has not yet been clarified.

Next, the electrical characteristics of the above-mentioned trace amount nickel addition portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the portion with a small amount of nickel added are about the same as those of the film with almost no nickel added, that is, the values obtained by crystallization at about 600 ° C. for several tens of hours. When the activation energy was calculated from the property, the addition amount of nickel was 10 ¹⁷ atoms / cm ³ as described above.
When it was set to about 10 ¹⁸ atoms / cm ^3, no behavior that could be attributed to the nickel level was observed. That is, from this experimental fact, it is considered that the above concentration can be used as an active layer of a TFT or the like.

On the other hand, the lateral growth portion has a conductivity higher than that of the nickel trace addition portion by one digit or more, which is a considerably high value for a crystalline silicon semiconductor. This is considered to be due to the fact that there was little or no grain boundaries existing during the passage of electrons between the electrodes because the current path direction was aligned with the lateral growth direction of the crystal,
It is consistent with the result of the transmission electron micrograph. That is, it can be considered that the carrier moves along the grain boundaries of the crystals grown in a needle shape or a columnar shape, so that the carrier is easily moved.

Therefore, the present invention improves the mobility of carriers by making the direction substantially along the crystal grain boundaries and the direction in which carriers in a semiconductor device (for example, TFT) move substantially coincide with each other. The direction along the crystal grain boundaries is the direction of crystal growth in the form of needles or columns, and this growth direction is the direction having crystallinity in the [110] axial direction, and this direction is also As described above, this is a direction that selectively has a high conductivity with respect to other directions (for example, a direction perpendicular to crystal growth). Further, as a practical matter, it is difficult for the crystal growth direction and the carrier flow direction to completely coincide with each other, and the crystal does not completely grow in a uniform direction over the entire surface.
Therefore, as a practical matter, the direction of crystal growth is determined as an average direction. Further, it can be considered that the direction and the carrier flow direction are coincident with each other within a range of about ± 20 °.

It is important that the crystalline silicon film on the substrate used in the present invention is not single crystal silicon. That is, it is a crystalline silicon film crystallized into a thin film, and its crystal growth direction is the [110] axial direction, which is essentially different from single crystal silicon. Therefore, the crystalline silicon film in the present invention can be particularly referred to as a non-single crystalline silicon film having crystallinity.

Finally, a method of applying to a TFT based on the above various characteristics will be described. Where TF
As an application field of T, an active matrix type liquid crystal display device using a TFT for driving a pixel is assumed.

As described above, in the recent large-screen active matrix type liquid crystal display device, it is important to suppress the shrinkage of the glass substrate. However, by using the nickel trace amount addition process of the present invention, the distortion of the glass is suppressed. Crystallization is possible at a temperature sufficiently lower than that of the point, which is particularly preferable. According to the present invention, it is possible to easily replace a portion where amorphous silicon has been conventionally used with crystalline silicon by adding a small amount of nickel and crystallizing it at about 500 to 550 ° C. for about 4 hours. It is possible. Needless to say, it is necessary to change the design rules and the like accordingly, but it is considered that the existing equipment for both the equipment and the process can suffice, and its merit is great.

Moreover, according to the present invention, the TFT used for the pixel and the TFT forming the driver of the peripheral circuit
It is also possible to separately form and using the crystal forms according to the characteristics, which is particularly advantageous for application to the active liquid crystal display device. A TFT used for a pixel does not require so much mobility, and a smaller off-current is more advantageous than that. Therefore, in the case of using the present invention, a small amount of nickel is directly added to a region to be a TFT used for a pixel to grow a crystal in the vertical direction, and as a result, a large number of grain boundaries are formed in the channel direction to turn off current. It can be lowered.
On the other hand, the TFT that forms the driver of the peripheral circuit
Will need very high mobility when it is applied to workstations in the future. Therefore, in the case of applying the present invention, a small amount of nickel is added in the vicinity of the TFT forming the driver of the peripheral circuit, and a crystal is grown in one direction from that, and the crystal growth direction is defined as the channel current path direction. By aligning them, it is possible to fabricate a TFT having extremely high mobility.

In this way, a crystalline silicon film can be obtained by selectively performing crystallization in a specific direction, but if the characteristics of such a crystalline silicon film are further improved, After the crystallization step, a laser or intense light equivalent thereto may be irradiated to crystallize the insufficiently crystallized component remaining in the grain boundary or the like. In this step, the remaining amorphous component grows with the crystal formed by the previous heating step as a nucleus and the grain boundary disappears, so that higher characteristics can be obtained.

[0034]

In a semiconductor device using a thin film semiconductor, the movement of carriers is set at the crystal grain boundary by setting the crystal growth direction of the crystalline silicon film, which has been crystal-grown in a needle shape or a column shape in the plane direction of the film, as the movement direction of carriers. Can be in the direction along, and the carrier can be moved with high mobility.

[0035]

【Example】

[Embodiment 1] This embodiment is an example of forming a circuit in which a P-channel TFT (referred to as PTFT) using crystalline silicon and an N-channel TFT (referred to as NTFT) are combined in a complementary type on a glass substrate. . The structure of this embodiment can be used for a switching element of a pixel electrode of an active type liquid crystal display device, a peripheral driver circuit, an image sensor and an integrated circuit.

FIG. 1 shows a sectional view of the manufacturing process of this embodiment. First, a 2000-Å-thick silicon oxide base film 102 was formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a mask 103 formed of a metal mask or a silicon oxide film is provided. The mask 103 exposes the base film 102 in a slit shape. When this state is viewed from above, the base film 1 is slit-shaped.
02 is exposed, and the other part is masked.

After the mask 103 is provided, a nickel silicide film (chemical formula NiSi _x , 0.4 ≦ x ≦ 2.0.5-200 Å, for example, 20 Å) is formed by a sputtering method.
5, for example, x = 2.0) is selectively formed in 100 regions. (Fig. 1 (A))

Next, an intrinsic (I type) having a thickness of 500 to 1500 Å, for example, 1000 Å, is formed by the plasma CVD method.
The amorphous silicon film 104 is formed. Then, in a hydrogen reducing atmosphere (preferably, the hydrogen partial pressure is 0.1 to 1 atm) at 550 ° C., or in an inert atmosphere (atmospheric pressure), 5
Crystallize by annealing at 50 ° C. for 4 hours. On this occasion,
In the region 100 where the nickel silicide film is selectively formed, the crystalline silicon film 1 is formed in the direction perpendicular to the substrate 101.
Crystallization of 04 occurs. Then, in regions other than the region 100, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 100, as indicated by an arrow 105.

As a result of the above steps, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. After that, a silicon oxide film 106 having a thickness of 1000 Å is formed as a gate insulating film by a sputtering method. For sputtering, silicon oxide is used as a target, and the substrate temperature during sputtering is 200 to 400 ° C., for example 350.
The sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less. Subsequently, a thickness of 6000 to 8 is obtained by a sputtering method.
000Å, for example 6000Å aluminum (0.1 to
2% silicon) is deposited. It is desirable that the steps of forming the silicon oxide film 106 and the aluminum film are continuously performed.

Then, the silicon film 104 is patterned to form gate electrodes 107 and 109. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodic oxidation was performed in an ethylene glycol solution containing 1-5% tartaric acid. The resulting oxide layers 108, 110 have a thickness of 200.
It was 0Å. The oxides 108 and 110 are
The thickness of the offset gate region is formed in the subsequent ion doping process, so that the length of the offset gate region can be determined by the anodizing process.

Next, an impurity imparting one conductivity type is added to the active layer region (which constitutes the source / drain and the channel) by the ion doping method. In this doping process, the gate electrode 107 and the oxide layer 10 around it are formed.
8. Impurities (phosphorus and boron) are implanted using the gate electrode 109 and the oxide layer 110 around it as a mask. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) were used as the doping gas, and the acceleration voltage was 60 in the former case.
~ 90 kV, for example 80 kV, in the latter case 40-8
It is set to 0 kV, for example, 65 kV. The dose is 1 × 10 ¹⁵
~ 8 × 10 ¹⁵ cm ^-2 , for example, phosphorus is 2 × 10 ¹⁵ cm ^-2 ,
Boron is 5 × 10 ¹⁵ . Upon doping, one region is covered with a photoresist to selectively dope each element. As a result, N-type impurity regions 114 and 116 and P-type impurity regions 111 and 113 are formed, and a P-channel type TFT (PTFT) region and an N-channel type TFT (NTFT) region can be formed. .

After that, annealing is performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Irradiate a shot, for example, two shots. It is useful to heat the substrate to about 200 to 450 ° C. during the irradiation with the laser light. In this laser annealing step, since nickel has diffused into the previously crystallized region, recrystallization easily proceeds by the irradiation of this laser light, and the impurities doped with the impurity imparting P-type are doped. Area 1
11 and 113, and the impurity regions 114 and 116 doped with the impurity imparting N can be easily activated.

Then, a silicon oxide film 11 having a thickness of 6000Å is formed.
8 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 120, and 119 are formed. Finally, annealing was carried out at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete a semiconductor circuit having a complementary TFT structure. (Fig. 1 (D))

The circuit shown above has a CMOS structure in which PTFT and NTFT are provided in a complementary type. In the above process, two independent TFTs are formed at the same time by forming two TFTs at the same time and cutting them at the center. It is also possible to produce.

FIG. 2 shows an outline of FIG. 1 (D) as seen from above. The reference numerals in FIG. 2 correspond to those in FIG. Figure 2
As shown in FIG. 3, the crystallization direction is the direction indicated by the arrow, and the crystal growth is performed in the direction of the source / drain region (the line direction connecting the source region and the drain region). During operation of the TFT having this structure, carriers move between the source / drain along the crystals grown in a needle-like or columnar shape. That is, the carriers move along the crystal grain boundaries of needle-like or columnar crystals. Therefore, it is possible to reduce the resistance that the carrier receives when moving, and the TF having high mobility.
T can be obtained.

In this embodiment, as a method of introducing Ni, Ni is selectively thin film on the underlying film 102 under the amorphous silicon film 104 (it is extremely thin, so it is difficult to observe it as a film). However, a method of selectively forming a nickel silicide film after forming the amorphous silicon film 104 may be used. That is, crystal growth may be performed from the upper surface or the lower surface of the amorphous silicon film. Alternatively, a method of forming an amorphous silicon film in advance and then selectively implanting nickel ions into the amorphous silicon film 104 by using an ion doping method may be adopted. In this case, there is a feature that the concentration of nickel element can be controlled.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. Although one pixel will be described below, a large number of pixels (generally several hundreds of thousands) are formed in the same structure. Also, N
It goes without saying that the P-channel type may be used instead of the channel type. Further, instead of being provided in the pixel portion of the liquid crystal display device, it can be used in the peripheral circuit portion. It can also be used for image sensors and other devices. That is, if it is used as a thin film transistor, its use is not particularly limited.

An outline of the manufacturing process of this example is shown in FIG.
In this embodiment, Corning 70 is used as the substrate 201.
59 glass substrate (thickness 1.1 mm, 300 x 400 m
m) was used. First, the base film 203 (silicon oxide) is formed to a thickness of 2000 Å by a sputtering method. After that, in order to selectively introduce nickel, a mask 20 is formed by a metal mask, a silicon oxide film, a photoresist, or the like.
3 is formed. Then, a nickel silicide film is formed by the sputtering method. This nickel silicide film is formed by sputtering to a thickness of 5 to 200Å, for example, 20Å. This nickel silicide film has the chemical formula NiS
i _x , 0.4 ≦ x ≦ 2.5, for example, x = 2.0. In this way, the nickel silicide film is selectively formed in the region 204.

After this, the LPCVD method or plasma C
An amorphous silicon film 205 is formed to a thickness of 1000 Å by the VD method, dehydrogenated at 400 ° C. for 1 hour, and then crystallized by heating annealing. This annealing step was performed at 550 ° C. for 4 hours in a hydrogen reducing atmosphere (preferably, the partial pressure of hydrogen is 0.1 to 1 atm). Further, this heat annealing step may be performed in an inert atmosphere such as nitrogen.

In this annealing step, since the nickel silicide film is formed in a part of the region under the amorphous silicon film 205, crystallization occurs from this part. During this crystallization, as shown by the arrow in FIG. 3B, in the portion 204 where the nickel silicide is formed, the crystal growth of silicon proceeds in the direction perpendicular to the substrate 201. Similarly, as indicated by an arrow, in a region where nickel silicide is not formed (region other than the region 205),
Crystal growth is performed in the parallel direction.

Thus, the semiconductor film 2 made of crystalline silicon
05 can be obtained. Next, the semiconductor film 205 is patterned to form an island-shaped semiconductor region (active layer of TFT).
To form. Furthermore, tetra-ethoxy-silane (TEO
S) as a raw material by a plasma CVD method in an oxygen atmosphere by a silicon oxide gate insulating film (thickness 70 to 120 n
m, typically 100 nm) 206. The substrate temperature is 400 ° C. or lower, preferably 200 to 350 ° C., in order to prevent the glass from shrinking or warping.

Next, a known film containing silicon as a main component is formed by the CVD method and is patterned,
A gate electrode 207 is formed. After that, phosphorus is implanted as an N-type impurity by an ion doping method to form the source region 208, the channel formation region 209, and the drain region 210 in a self-aligned manner. Then, by irradiating the KrF laser beam, the crystallinity of the silicon film whose crystallinity is deteriorated due to the ion doping is improved. At this time, the energy density of the laser light is 250 to 300 mJ /
cm ² By this laser irradiation, this TFT
Source / drain sheet resistance is 300-800Ω /
It becomes cm ² .

After that, the interlayer insulator 21 is made of silicon oxide.
1 is formed, and the pixel electrode 212 is further formed of ITO. Then, a contact hole is formed and TF
Electrodes 213 and 214 are formed in the source / drain regions of T by a chromium / aluminum multilayer film, and one of these electrodes 213 is also connected to the ITO 121. Finally, anneal in hydrogen at 200-300 ° C for 2 hours,
Complete hydrogenation of silicon. In this way, the TFT
To complete. This step is simultaneously performed on many other pixel regions at the same time.

The TFT manufactured in this example uses a crystalline silicon film which is crystal-grown in the carrier flow direction as an active layer forming a source region, a channel forming region and a drain region. Since the carrier does not traverse, that is, the carrier moves along the crystal grain boundaries of needle-like or columnar crystals, a TFT with high carrier mobility can be obtained. The TFT manufactured in this example is an N-channel type, and its mobility is 9
It was 0 to 130 (cm ² / Vs). Conventional 600
This is large compared with the fact that the migration to the N channel type TFT using the crystalline silicon film obtained by the crystallization by the thermal annealing at 48 ° C. for 48 hours was 80 to 100 (cm ² / Vs). It is the improvement of characteristics.

A P-channel TFT was manufactured by the same manufacturing method as in the above step, and its mobility was measured and found to be 50 to 80 (cm ² / Vs). This is also a P-channel TFT using a crystalline silicon film obtained by crystallization by conventional thermal annealing at 600 ° C. for 48 hours.
This is a great improvement in characteristics in comparison with the movement of 30 to 60 (cm ² / Vs).

[Embodiment 3] This embodiment is an example in which the source / drain is provided in the TFT shown in the embodiment 2 in a direction substantially perpendicular to the crystal growth direction. That is, this is an example in which the moving direction is perpendicular to the crystal growth direction, and the carriers move so as to cross the crystal grain boundaries of needle-like or columnar crystals. With this configuration,
The resistance between the source / drain can be increased. This is because the carriers must move so as to cross the crystal grain boundaries of the crystals that have grown like needles or columns. In order to realize the structure of this embodiment, it is sufficient to simply set the orientation of the TFT in the structure shown in the second embodiment.

[Embodiment 4] In this embodiment, in the structure shown in Embodiment 2, the direction in which a TFT is provided (source / source here) is used.
It is defined by the line connecting the drain regions. That is, the characteristic of the TFT is selected by setting the direction of the TFT depending on the direction of carrier flow) at an arbitrary angle with the crystal growth direction of the crystalline silicon film with respect to the substrate surface.

As described above, when carriers are moved in the crystal growth direction, the carriers move along the crystal grain boundaries, so that the mobility can be improved. on the other hand,
When carriers are moved in a direction perpendicular to the crystal growth direction, the carriers have to cross a large number of grain boundaries, so that the mobility of carriers decreases.

Therefore, between these two states, that is, the angle between the crystal growth direction and the moving direction of carriers is 0 to 90.
The carrier mobility can be controlled by setting in the range of °. From another point of view, the resistance between the source / drain regions can be controlled by setting the angle between the crystal growth direction and the carrier movement direction. Of course, this structure can also be used for the structure shown in the first embodiment. In this case, the slit-shaped nickel trace addition region 100 shown in FIG.
It rotates in the range of 0 °, and the angle between the crystal growth direction indicated by arrow 105 and the line connecting the source / drain regions is 0 to 90.
° will be selected in the range. And this angle is
When the angle is close to 0 °, the mobility is high and the electric resistance between the source / drain can be low. Further, when this angle is close to 90 °, the mobility can be high and the resistance between the source and the drain can be low.

[Embodiment 5] This embodiment is shown in FIG. After forming a silicon oxide film 302 having a thickness of 1000 to 5000Å, for example, 2000Å on a glass substrate 301, an amorphous silicon film 303 having a thickness of 300 to 1500Å, for example, 500Å was formed by a plasma CVD method. further,
A silicon oxide film 304 having a thickness of 500 to 1500 Å, for example, 500 Å, was formed thereon. It is desirable that these film formations be performed continuously. Then, the silicon oxide film 304 was selectively etched to open a window 305 for introducing nickel. The window 305 was formed so as to avoid a portion which should be a channel of the TFT. Then, a nickel salt film 307 was formed by spin coating. Explaining this method, first, nickel acetate or nickel nitrate is diluted with water or ethanol, and
The concentration was set to 00 ppm, for example, 100 ppm.

On the other hand, the substrate was dipped in hydrogen peroxide solution or a mixed solution of hydrogen peroxide solution and ammonia to form an extremely thin silicon oxide film on the exposed portion of the amorphous silicon film (the area of the window 305). . This is to improve the interfacial affinity between the nickel solution prepared as described above and the amorphous silicon film.

The substrate treated as described above was placed in a spinner, gently rotated, and 1 to 10 ml, for example, 2 ml of a nickel solution was dropped on the substrate to spread the solution on the entire surface of the substrate. This state was held for 1 to 10 minutes, for example, 5 minutes. After that, the rotation speed of the substrate was increased and spin drying was performed. This operation may be repeated a plurality of times.
Thus, the thin film 307 of nickel salt was formed.
(Fig. 9 (A))

Then, silicon ions were implanted by the ion implantation method. At this time, in the region other than the window 305, that is, in the region covered with the silicon oxide film 304, most of the silicon ions are implanted into the interface between the underlying silicon oxide film 302 and the amorphous silicon film 303. I did so. At this time, since the silicon oxide film 304 does not exist in the region of the window 305, silicon ions are implanted deeper.

Then, in a heating furnace, 520 to 580
The heat treatment was performed at 4 ° C. for 4 to 12 hours, for example, at 550 ° C. for 8 hours. The atmosphere was nitrogen. As a result, first, nickel diffused into the region immediately below the window 305, and crystallization started from this region. The crystallization region is indicated by arrow
As shown in 08, it spread around it. (Fig. 9
(B))

Then, in the air or oxygen atmosphere, KrF excimer laser light (wavelength 248 nm) or XeCl excimer laser light (wavelength 308 nm) was irradiated for 1 to 20 shots, for example, 5 shots to further improve the crystallinity. Energy density is 200 to 3
The substrate temperature was 50 mJ / cm ² and the temperature was 200 to 400 ° C. (Fig. 9 (C))

Then, the silicon film 303 is etched,
The area of the TFT was formed. And the thickness is 1000 on the whole surface.
~ 1500 Å, for example 1200 Å silicon oxide film 309
And the gate electrode 310 of the PTFT, the gate electrode 313 of the NTFT, and the respective anodic oxide films 31 are formed of aluminum as in the first embodiment.
2, 314 formed a gate electrode portion.

Then, using these gate electrode portions as masks, N-type and P-type impurities were implanted into the silicon film by the ion doping method as in the first embodiment. As a result,
PTFT source 315, channel 316, drain 3
17, peripheral circuit NTFT source 320, channel 3
19, a drain 318 was formed. Then, Example 1
Similarly to the above, the entire surface was irradiated with laser to activate the doped impurities. (Fig. 9 (D))

After that, as an interlayer insulator, a thickness of 3000 to
A silicon oxide film 321 having a thickness of 8000 Å, for example 5000 Å, was formed. After that, contact holes are formed in the source / drain of the TFT, and further, a two-layer film of titanium nitride (thickness 1000Å) and aluminum (thickness 5000Å) is deposited by the sputtering method, and this is patterned and etched. Thus, the electrodes / wirings 322 to 324 were formed. In this way, an inverter circuit composed of PTFT and NTFT could be formed by the laterally grown crystalline silicon. (Fig. 9 (E))

Also in this embodiment, as in the first embodiment, the crystallization direction 508 is the direction in which the carriers of the TFT flow (that is,
(Source-drain direction). Therefore, the drain current of the TFT also becomes large in this embodiment, which is convenient for high-speed operation. In addition, in this embodiment, laser irradiation is performed as shown in FIG. In this step, the amorphous component remaining between the silicon crystals grown like needles is also crystallized, and this crystallization is performed by using the needle-like crystals as nuclei to thicken the needle-like crystals. This expands the region in which the current flows and allows a larger drain current to flow.

This state is shown in FIG. FIG. 10 shows a crystallized silicon film made thin and observed by a transmission electron microscope (TEM). FIG. 10A is a view of the vicinity of the tip of the crystallization region of the silicon film crystallized by the lateral growth, and needle-like crystals are observed. further,
It can be seen that there are many non-crystallized amorphous regions between the crystals. (Fig. 10 (A))

When this is irradiated with laser under the conditions of this embodiment, it becomes as shown in FIG. By this step, the amorphous region, which occupies most of the area of FIG. 10A, is crystallized, but this crystallization occurs randomly, and the electrical characteristics are not so good. What should be noted is the crystalline state of the region that was originally amorphous between the needle-like crystals observed near the center. Here, a thick crystal region is formed so as to grow by crystallization from a needle crystal.
(Figure 10 (B))

For the sake of clarity, FIG. 10 shows the tip region of crystal growth with a relatively large number of amorphous regions, but the same can be said near the root and center of crystal growth. As described above, by laser irradiation, the amorphous portion can be reduced and the needle crystal can be thickened, and the characteristics of the TFT can be further improved.

[0073]

[Effect] When a non-single crystal silicon semiconductor film having crystallinity provided on a substrate and crystal-grown in a direction parallel to the substrate surface is used for a TFT, the direction of carrier flow moving in the TFT is crystal-grown. It is possible to obtain a TFT having a high mobility by making it possible to adopt a configuration in which the movement of carriers moves (parallelly) along the crystal grain boundaries of the crystals grown in a needle-like or columnar shape by matching with the direction in which I can do it.

[Brief description of drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows an outline of an example.

FIG. 3 shows an outline of an example.

FIG. 4 shows an electron diffraction image.

FIG. 5 is a photograph showing a crystal structure of a silicon film.

FIG. 6 shows an electron diffraction image.

FIG. 7 shows an electron beam diffraction image.

FIG. 8 is a schematic view showing crystal orientations.

FIG. 9 shows a manufacturing process of an example.

FIG. 10 shows a crystal structure of an example.

[Explanation of symbols]

 101 glass substrate 102 base film (silicon oxide film) 103 mask 104 silicon film 105 crystallization direction 106 gate insulating film 107 gate electrode 108 anodized layer 109 gate electrode 110 anodized layer 111 source / drain region 112 channel formation region 113 drain / Source region 114 Source / drain region 115 Channel formation region 116 Drain / source region 117 Electrode 118 Interlayer insulator 120 Electrode 119 Electrode 201 Glass substrate 202 Base film (silicon oxide film) 203 Mask 204 Nickel trace addition region 205 Silicon film 206 Gate Insulating film 207 Gate electrode 208 Source / drain region 209 Channel formation region 210 Drain / source region 211 Interlayer insulator 213 Electrode 214 Electrode 212 ITO (pixel electrode)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shoji Miyanaga 398 Hase, Atsugi City, Kanagawa Prefecture, Semiconducting Energy Laboratory Co., Ltd.

Claims (5)

[Claims] 1. A semiconductor device using a non-single crystalline silicon semiconductor film having crystallinity provided on a substrate, wherein the semiconductor film is crystal-grown in a direction substantially parallel to a substrate surface, A growth direction substantially coincides with a [110] axis direction, and the crystal growth direction and a movement direction of carriers in the semiconductor device are substantially coincident with each other. 2. A semiconductor device using a crystalline non-single-crystal silicon semiconductor film provided on a substrate, wherein the semiconductor film has a crystal grain boundary along a direction substantially parallel to the substrate surface. A semiconductor device characterized in that a direction along the crystal grain boundary and a direction in which carriers in the semiconductor device move are substantially matched. 3. A semiconductor device using a crystalline non-single-crystal silicon semiconductor film provided on a substrate, wherein the semiconductor film is crystal-grown in a direction substantially parallel to a substrate surface. A semiconductor device characterized in that a growth direction has a high conductivity with respect to other directions, and the crystal growth direction and a direction in which carriers in the semiconductor device move are substantially coincident with each other. 4. A thin film transistor using a non-single crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the semiconductor film is crystal-grown in a direction substantially parallel to a substrate surface. A semiconductor device characterized in that the direction and the direction of carriers flowing in the channel of the thin film transistor are substantially matched. 5. A thin film transistor using a crystalline non-single-crystal silicon semiconductor film provided on a substrate, wherein the semiconductor film is crystal-grown in a direction substantially parallel to a substrate surface, and the crystal is formed. The semiconductor device is characterized in that the growth direction has an approximately [110] axis direction, and the crystal growth direction and the direction of carriers flowing in the channel of the thin film transistor are substantially matched.