JP2860877B2 - Semiconductor and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a thin film silicon semiconductor having crystallinity and a method for manufacturing the same. For example, the present invention relates to a TFT (thin film transistor) provided on an insulating substrate such as glass and a method for manufacturing the TFT. Further, the invention disclosed in this specification can be used for bipolar transistors and diodes using thin film semiconductors, and further for capacitors and resistors.

[0002]

2. Description of the Related Art Active type liquid crystal display devices, image sensors, and the like using TFTs for driving pixels are known as devices utilizing TFTs formed on an insulating substrate such as glass.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. In addition, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

A method for obtaining a silicon semiconductor in the form of a thin film having crystallinity is as follows: (1) A film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed, and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy. Is known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or higher, so that the method is inexpensive. There was also a cost problem that a glass substrate could not be used. Also, (2)
Taking the excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low, and the entire surface of the large-area substrate is uniformly processed. The stability of the laser is not enough, and it seems to be a next-generation technology. (3)
The method (1) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more, and uses an inexpensive glass substrate. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen size is increasing, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage and distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, in the case of Corning 7059 glass, which is currently most commonly used, the strain point is 593 ° C., and the conventional heating crystallization method causes large deformation. In addition to the problem of the temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.

[0005]

The invention disclosed in this specification provides means for solving the above-mentioned problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Needless to say, a silicon semiconductor having crystallinity manufactured using the process provided by the invention disclosed in this specification has physical properties equivalent to or higher than those manufactured by a conventional technique, and is also used in an active layer region of a TFT. Needless to say, it can be used.

Background of the Invention The present inventors form an amorphous silicon semiconductor film by a CVD method or a sputtering method and crystallize the film by heating as described in the section of the prior art. Regarding the method, the following experiments and considerations were made.

First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallizing the film by heating is examined. The crystal growth starts from the interface between the glass substrate and the amorphous silicon. When the film thickness exceeded a certain level, it was recognized that the film proceeded in a columnar shape perpendicular to the substrate surface.

In the above phenomenon, a crystal nucleus serving as a base for crystal growth (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be due to going. Such a crystal nucleus
Considered to be trace amounts of impurity metal elements present on the substrate surface and crystalline components on the glass surface (like glass crystallized glass, it is considered that there is a crystalline component of silicon oxide on the glass substrate surface) Can be

Therefore, it was considered that the crystallization temperature could be lowered by more actively introducing crystal nuclei, and in order to confirm the effect, a small amount of another metal was deposited on the substrate. An experiment was conducted in which a thin film made of amorphous silicon was formed thereon and then heated and crystallized. As a result, when some metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was expected that crystal growth using foreign matter as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals whose temperature could be reduced was investigated in more detail.

[0010] Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of point-like fine crystals at a constant temperature. The case was also shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism will be described in detail later.

In any case, due to the above two effects, it has not been possible to consider a case where a thin film made of amorphous silicon is formed after a certain kind of metal is formed in a very small amount and then heated and crystallized. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less for about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and a material selected by us is nickel.

One example of the effect of nickel is as follows. On a substrate on which no treatment is performed, that is, on a substrate on which a very small amount of nickel thin film is not formed (Corning 70
59) In the case where a thin film made of amorphous silicon formed by a plasma CVD method is crystallized by heating in a nitrogen atmosphere, when the heating temperature is 600 ° C., the heating time is 10 hours or more. Although it was necessary, when a thin film made of amorphous silicon was used on a substrate on which a thin film of nickel was formed, a similar crystallization state could be obtained by heating for about 4 hours. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.

[0013]

As can be seen from the above description,
When a thin film made of amorphous silicon is formed after forming a thin film of nickel, a lower crystallization temperature and a shorter time required for crystallization can be achieved. Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT.

First, a method for adding a trace amount of nickel will be described. The addition of a small amount of nickel is also possible by forming a small amount of nickel thin film on a substrate and then forming amorphous silicon.
A method in which amorphous silicon is formed first, and a small amount of nickel thin film is formed thereon has the same effect of lowering the temperature, and the film formation method can be a sputtering method or a vapor deposition method. It has been found that the film formation method does not matter. However,
When a minute amount of nickel thin film is formed on a substrate, 7059
The effect is more remarkable when a silicon oxide thin film is formed on the glass substrate and then a small nickel thin film is formed on the glass substrate, rather than directly forming a small nickel thin film on the glass substrate. is there. One possible reason for this is that direct contact between silicon and nickel is important for the low-temperature crystallization, and in the case of 7059 glass, components other than silicon inhibit the contact or reaction between the two. It may be that.

As a method of adding a small amount, almost the same effect was confirmed by adding nickel by ion implantation, in addition to forming a thin film in contact with above or below amorphous silicon. Regarding the amount of nickel, 1 × 10 ^{15 at}
It has been confirmed that the temperature is lowered when the addition amount is not less than ms / cm ^3, but when the addition amount is not less than 1 × 10 ²¹ atoms / cm ³ , the shape of the peak of the Raman spectroscopy spectrum is clearly that of silicon alone. Because of the difference, only 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 × 10
It seems to be in the range of ¹⁹ atoms / cm ³ . Also,
Considering that the semiconductor material is used for the active layer of the TFT as a physical property, the amount is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 ×.
It is necessary to keep it at 10 ¹⁹ atoms / cm ³ .

Next, the features of crystal growth and crystal morphology in the case where a trace amount of nickel is added will be described, and the crystallization mechanism deduced therefrom will be described.

As described above, when nickel is not added, nuclei are randomly generated from crystal nuclei at the substrate interface and the like, and crystal growth from the nuclei is also random, and depending on the manufacturing method, (110) or ( It has been found that relatively oriented crystals can be obtained in (111), and of course, almost uniform crystal growth is observed over the entire thin film.

First, in order to confirm this mechanism, an analysis was performed using a DSC (differential scanning calorimeter). The amorphous silicon thin film formed on the substrate by the plasma CVD method was filled in a sample container while remaining on the substrate, and the temperature was raised at a constant rate. Then, a clear exothermic peak was observed at about 700 ° C., and crystallization was observed. This temperature naturally shifts when the rate of temperature rise is changed. For example, when the temperature is increased at a rate of 10 ° C./min, crystallization starts at 700.9 ° C. Next, three kinds of heating rates were measured, and the activation energy of crystal growth after initial nucleation was determined by the Ozawa method. Then, a value of about 3.04 eV was obtained. In addition, when the reaction rate equation was obtained from fitting with a theoretical curve, it was found that the reaction was best explained by disorder nucleation and its growth model, and nuclei were generated randomly from crystal nuclei at the substrate interface and the like. The validity of the model of crystal growth from the nucleus was confirmed.

The same measurement as described above was performed on a sample to which a small amount of nickel was added. Then 10 ° C /
When the temperature was raised at a rate of min, crystallization started at 619.9 ° C., and the activation energy of crystal growth determined from a series of these measurements was approximately 1.87 eV, which indicated that crystal growth was easy. It became clear numerically that it had become. Moreover, the reaction rate equation obtained from the fitting with the theoretical curve was close to a one-dimensional interface rate-determining model, suggesting that the crystal growth has a certain directionality.

The data obtained by the thermal analysis are shown in Table 1 below.

The activation energies shown in Table 1 were obtained by measuring the amount of heat released from the sample at the stage of heating the sample, and calculating from the result by an analysis means called the Ozawa method.

[0022]

[Table 1]

The activation energy in Table 1 is a parameter indicating the easiness of crystallization. The larger the value, the harder the crystallization, and the smaller the value, the easier the crystallization. From Table 1, it can be seen that the activation energy of the nickel-added sample decreases as the crystallization proceeds. That is, it is shown that crystallization is more easily performed as crystallization proceeds.
On the other hand, in the case of a crystalline silicon film formed by a conventional method without addition of nickel, it is shown that the activation energy increases as crystallization proceeds. This indicates that crystallization becomes more difficult as crystallization proceeds. Also, comparing the average activation energy,
The value of the silicon film crystallized by nickel addition is about 62% of that of the crystalline silicon film without nickel addition, which suggests that the amorphous silicon film with nickel addition is easily crystallized. Is done.

Next, the results of observation of the crystal morphology of the sample with a small amount of nickel added by TEM (transmission electron microscope) are shown below. As a characteristic phenomenon found from the result of the TEM observation, there is a difference in crystal growth between a region to which nickel is added and a portion in the vicinity thereof. That is,
When observed from the cross section of the nickel-added region, moire or fringes that appear to be lattice images are observed almost perpendicular to the substrate, which means that the added nickel or its compound with silicon becomes a crystal nucleus, and the nickel is added. This is considered to indicate that a columnar crystal grows almost perpendicularly to the substrate, as in the case of no crystal. Further, in the peripheral region to which nickel was added, it was observed that crystals were grown in a needle-like or columnar shape in a direction parallel to the substrate.

Next, the results of observing the crystal morphology near the nickel-added region will be described. Firstly, it was unexpected that the region where nickel was not directly added in a small amount crystallized itself was unexpected. However, a nickel added portion, a lateral crystal growth portion in the vicinity thereof (hereinafter abbreviated as a lateral growth portion), In a further distant amorphous part (low temperature crystallization is not performed in a considerably distant part, the amorphous part remains), the nickel concentration was examined by SIMS (secondary ion mass spectrometry). As shown in the figure, in the lateral growth part (Lateral growth), a small concentration was detected from the nickel-added part, and the amorphous part
The amount of (a-Si) was further reduced by about one digit. That is,
Nickel diffuses over a fairly wide area, but the nickel concentration is high especially in the region where nickel is directly added, and the nickel concentration in the laterally grown portion (the portion grown crystal parallel to the substrate) is lower. I understand.

From the observation of the surface TEM image near the nickel-added region, the lateral growth parallel to the substrate was found to be several hundred μm in the large region from the nickel-added region.
m was also observed to grow, and it was also found that the growth amount increased in proportion to an increase in time and temperature. As an example, a growth of about 20 μm was observed at 550 ° C. for 4 hours. This crystal growth is performed in a needle shape or a column shape, and it was also confirmed that nickel was concentrated at the tip portion.

Based on the above experimental facts and observation facts,
The inventors believe that crystallization proceeds by the following mechanism.

First, nucleation occurs. At this time, the activation energy is reduced by adding a small amount of nickel. This is obvious from the fact that crystallization occurs from a lower temperature by adding nickel. This is because, besides the effect of nickel as a foreign substance, the intermetallic compound composed of nickel and silicon One of them thinks that it is possible that the lattice constant is close to that of crystalline silicon. In addition, since this nucleation occurs almost simultaneously on the entire surface of the region to which nickel is added, the crystal growth has a mechanism of growing as a plane. In this case, the reaction rate equation is a one-dimensional interface rate-determining process, and A substantially vertical columnar crystal is obtained. However, due to the limitation of the film thickness and the influence of stress and the like, the crystal axes do not always have to be completely aligned.

However, since the horizontal direction of the substrate is more uniform than the vertical direction, columnar or needle-like crystals grow in a horizontal direction with the nickel-added portion as a nucleus. Of course, also in this case, the reaction rate equation is expected to be a one-dimensional interface rate-determining type. The activation energy for crystal growth is
As noted above, this lateral growth rate is expected to be very fast, as it has been reduced by the addition of nickel, and this is the case.

Next, the electrical characteristics of the nickel-added portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the nickel-added portion are substantially the same as those of a film to which nickel is not substantially added, that is, a film which has been crystallized at about 600 ° C. for several tens of hours. When the activation energy was determined from the properties, the amount of nickel added was 10 ¹⁷ atoms / cm ³ as described above.
When the concentration was set to about 10 ¹⁸ atoms / cm ^3, no behavior that might be caused by the nickel level was observed. That is, it is considered from this experimental fact that the above-described concentration can be used as an active layer of a TFT or the like.

On the other hand, the laterally grown portion has an electric conductivity one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is considered to be due to the fact that the current path direction coincided with the lateral growth direction of the crystal, so that few or no grain boundaries existed during the passage of electrons between the electrodes.
It is consistent with the result of the transmission electron micrograph. That is, it can be considered that the carrier moves along the grain boundary of the crystal grown in the shape of a needle or a column, so that the carrier can easily move.

It has been confirmed that the nickel concentration is high at the tip where the crystal is grown in a needle or column shape, as in the region to which nickel is added. From this, when a device such as a TFT is formed using this portion, it is expected that nickel will be affected.
Therefore, it is useful not to use the crystal growth start point and the crystal growth end point of the crystalline silicon film grown in the direction parallel to the substrate, but to use the intermediate region.

In the invention disclosed in this specification, for example, as shown in FIG. 1, first, an amorphous silicon film 13 to be crystallized and a silicon oxide film 14 thereon are formed in an island shape. Then, a film 15 containing a trace element such as a nickel silicide film is formed on the upper surface thereof, nickel silicide is formed on the side surface 16 of the amorphous silicon film, and crystal growth is performed from this portion by arrows 1.
7 and high nickel concentration 10 or 18
And forming a device such as a TFT without using the region.

That is, the invention disclosed in this specification avoids a crystal growth start point and a crystal growth end point (tip) of a region where crystal growth has taken place in a direction parallel to the substrate, and utilizes the intermediate region between the crystal growth start point and the crystal growth end point. In addition to using a crystalline silicon film that easily moves, a region having a low nickel concentration is used. Specifically, by removing (eg, etching) a region into which a metal element for promoting crystallization has been introduced and a crystal growth ending portion where crystal growth has been performed in a direction parallel to the substrate, after crystallization, A region containing a small number of elements is used.

It is important that the crystalline silicon film on the substrate used in the invention disclosed in this specification is not single crystal silicon. In other words, it is a crystalline silicon film crystallized in a thin film shape, and its crystal growth is performed in a direction parallel to the substrate, which is essentially different from single crystal silicon. Therefore, the crystalline silicon film in the invention disclosed in this specification can be referred to as a non-single-crystal silicon film having crystallinity.

The crystallization promoting elements that can be used in the invention disclosed in the present specification include Group 8 elements Fe, Co, Ni, Ru, Rh, Pd, Os, Ir,
Pt can be used. Sc, which is a 3d element,
Ti, V, Cr, Mn, Cu, Zn can also be used. Further, according to the experiment, the action of crystallization was confirmed also in Au and Ag. Especially among the above elements,
A remarkable effect is obtained, and the operation of a TFT has been confirmed using a crystalline silicon film crystallized by the effect of Ni.

Hereinafter, the invention disclosed in this specification will be described. One of the structures disclosed in this specification includes a step of forming a non-single-crystal semiconductor film over a substrate, a step of forming an insulating film over the non-single-crystal semiconductor film, and patterning the non-single-crystal semiconductor A step of forming an island-shaped stack including a film and an insulating film, a step of forming a film including a metal element that promotes crystallization, and a step of performing crystallization from a side surface of the non-single-crystal semiconductor film. It is characterized by having.

In the above structure, as the substrate, various glass substrates, quartz substrates, other insulating substrates, semiconductor substrates having an insulating surface, and metal substrates having an insulating surface can be used.

FIG. 1 shows a specific example of the above configuration. FIG.
(A) shows an amorphous silicon semiconductor film 13 formed in an island shape.
(Nickel silicide film) 15 containing nickel, which is a metal element for promoting crystallization, at the end 16 (side surface of the island region)
Is formed. And (B)
The nickel silicide layer is formed in the 16 regions by the heat treatment, the nickel silicide film is further removed, and the heat treatment is further performed, so that the crystal growth as indicated by the arrow 17 in the direction parallel to the substrate 11 from the 16 region. This is shown. In the step (C), 18
2 shows a state where a portion where nickel silicide is formed, that is, a crystal growth start portion is removed.

In the example shown in FIG. 1, the structure in which the crystal growth start portion 18 is removed is shown. However, the crystal growth end portion as indicated by 10 (crystal growth from 18 is 10
It is even more effective to remove the crystal at the point where the crystal growth stops. This is because the crystal growth start portion 18 and the crystal growth end portion 10 contain a high concentration of nickel element. Further, by employing such a structure, a semiconductor device in which a region having a low nickel concentration is used as an active layer can be obtained.

The silicon film grown by the above-described method undergoes crystal growth as indicated by arrow 17, so that the entire crystal is grown in a direction substantially parallel to the substrate. Silicon film.

According to another aspect of the invention disclosed in this specification, an active layer made of a crystalline silicon film is provided, and the active layer is grown from a side surface thereof. And / or the crystal growth ending portion is removed.

In the above structure, the active layer refers to a semiconductor layer forming a main part of the semiconductor device. For example, it refers to a semiconductor layer included in at least one of a source region, a drain region, and a channel formation region of a thin film transistor.

The fact that crystal growth is performed from the side surface of the active layer means that, for example, as shown in FIG. 1, a silicon semiconductor layer 13 formed in an island shape (the semiconductor layer 13 formed in an island shape A state in which crystal growth has been performed as shown by an arrow 17 from the side surface 16 of the active layer).

In the above structure, it is effective to form source / drain regions along the crystal growth direction. This is because, by making the carriers move in the crystal growth direction, it is possible to make the carrier movement less affected by the grain boundaries.

When the carriers are moved in the crystal growth direction, the carrier can be made less susceptible to the influence of the grain boundaries because the crystal growth is performed in a needle or column shape.

The nickel concentration in the silicon film grown as described above is 2 × 10 ^{19 at the} crystal growth start portion.
atoms / cm ³ or more. The nickel concentration at the end of the crystal growth is about equal to or higher than 2 × 10 ¹⁹ atoms / cm ³ .

FIG. 4 shows that a portion of the amorphous silicon film is exposed by using a mask, and nickel is introduced into the portion by a plasma treatment (specifically, an extremely thin nickel silicide film is formed). In addition, in the case where crystal growth is performed by heat treatment at 550 ° C. for 4 hours, the nickel concentration of each portion of the crystallized silicon film is examined by SIMS (secondary ion analysis). The plasma processing is a technique in which hydrogen plasma is generated using a parallel plate type electrode containing a large amount of nickel, and a small amount of nickel element is deposited on a sample arranged between the electrodes.

Also in this case, lateral growth of about several tens μm (crystal growth in a direction parallel to the substrate as indicated by arrow 17 in FIG. 1) occurs from the region where nickel is selectively introduced. What is written as Lateral growth in FIG. 4 is the nickel concentration in this laterally grown region. Also Plasma t
What is described as “reated” is the nickel concentration in a portion where nickel is directly exposed to the plasma in the plasma processing and nickel is directly deposited on the amorphous silicon film. This part is shown in FIG.
Corresponds to the region of the crystal growth start portion 16. It has been confirmed that the nickel concentration in the region where the crystal growth as indicated by 17 in FIG. 1 has been performed is almost the same as that indicated as Lateral growth in FIG.

The a-Si is the nickel concentration of the portion which was not directly exposed to the plasma, did not grow laterally, and was in an amorphous state.

FIG. 4 shows that the nickel concentration in the region grown in the lateral direction is smaller than that in the region where nickel is directly introduced. Further, as shown in FIG. 4, in the region where the crystal growth in the lateral growth direction was performed, the nickel concentration was approximately 1 × 10 ¹⁸ atoms / cm ³ or more, and 8 × 10 ¹⁸ atoms / cm ³ or more.
It turns out that it is cm ³ or less. Also, considering the variation of data represented by a-Si, the lower limit is 1 × 10 ¹⁸ atom
s / cm ^3, and the upper limit can be set to 1 × 10 ¹⁹ atoms / cm ³ in consideration of the upper limit margin.

[0052]

The metal element which promotes crystallization is concentrated at the tip of the crystal grown in the direction parallel to the substrate, so that the tip and the growth start point (portion to which the metal element is added) are located. By forming a device in the intermediate region of the above, it is possible to realize a configuration in which the carrier can be moved at a high mobility and the concentration of the metal element which is considered to affect the movement of the carrier can be reduced.

[0053]

【Example】

[Embodiment 1] In this embodiment, a circuit in which a P-channel TFT (referred to as PTFT) using a crystalline silicon film formed on a glass substrate and an N-channel TFT (referred to as NTFT) are combined in a complementary manner. It is an example of forming. The configuration of this embodiment can be used for a switching element of a pixel electrode and a peripheral driver circuit of an active type liquid crystal display device, as well as an image sensor and an integrated circuit. Further, the basic configuration shown in this embodiment can be used not only for an insulated gate field effect semiconductor device but also for a bipolar transistor and a diode. Further, the present invention can be applied to a circuit in which these semiconductor devices are integrated with resistors and capacitors.

FIG. 1 and FIG. 2 are cross-sectional views showing the manufacturing process of this embodiment. First, a 2000-nm-thick silicon oxide base film 12 is formed on a substrate (Corning 7059) 11 by a sputtering method. Next, a known amorphous silicon film 13 is formed by a plasma CVD method at 1000Å (500 to 150).
0 °). Next, the silicon oxide film 14 is
It is formed by a sputtering method to a thickness of 00 (200 to 2000). Here, patterning is performed, and the amorphous silicon film 13 and the silicon oxide film 14 are stacked to form an island-shaped pattern. (Fig. 1 (A))

[0055] After the above process, by sputtering, the thickness 5～200A, e.g. 100Å of nickel silicide film (chemical formula _{NiSi x, 0.4 ≦ x ≦ 2.5} , for example,
x = 2.0) 15 is formed. This nickel silicide film
It is important that the film is formed on the side surface of the amorphous silicon film. In addition, as a film forming method, a method using a vapor deposition method, a CVD method, or a plasma treatment can be adopted. Thus, FIG.
(A) is obtained. When a metal other than nickel is used as a metal that promotes crystallization, the thin film 15 may be formed by using a sputtering method or an evaporation method using such a material, or by using a plasma treatment or a CVD method.

Next, a heat treatment is performed to form nickel silicide regions in 16 regions. This heat treatment is 4
The test was performed at 50 degrees for 1 hour. This heat treatment is performed for 30
It may be performed at 0 to 600 degrees. And the nickel silicide film 1
5 is removed. This is placed under a hydrogen reducing atmosphere (preferably,
Annealing is performed for 4 hours at 550 ° C. or at 550 ° C. in an inert atmosphere (atmospheric pressure) at a partial pressure of hydrogen of 0.1 to 1 atm. At this time, crystal growth as indicated by 17 is performed in a direction parallel to the substrate 11. (Figure 1
(B))

In the above process, thermal annealing is performed at 550 ° C. for 4 hours without forming nickel silicide, and crystal growth is performed directly from the side surface (portion indicated by 16) of the amorphous silicon film 13. After that, the nickel silicide film 15 may be removed. When such a step is adopted, crystallization is performed simultaneously with the formation of the nickel silicide 16. However, in this case, there is a concern that nickel is diffused during thermal annealing.

As a result of the steps described above, the amorphous silicon film can be crystallized to obtain a crystalline silicon film (indicated by reference numeral 13 in FIG. 1C). Thereafter, isotropic etching is performed, and the side surface 18 of the crystallized silicon film 13 is side-etched. This is because this portion is made of nickel silicide, and the nickel concentration is high (in terms of concentration, 10 ²¹ / cm ³ or more). Thus, removing the region that is nickel silicide
This is very important when forming a device such as a TFT. For example, after this process, there are an ion implantation process for forming source / drain regions, a process for activating the source / drain regions, and the like. In this process, heat is inevitably applied to the silicon film 13. It is conceivable that nickel further diffuses from the region where the nickel concentration is high. In particular, when nickel silicide is formed, it is considered that considerable nickel diffuses from this portion, and this is considered to affect the operation of the TFT.
Therefore, it is useful to remove the nickel silicide portion after crystallization as described above.

Next, the silicon oxide film 14 is removed, and FIG.
(D) shape is obtained. The silicon film 1 crystallized in this state
In the central part of No. 3, there is a portion where the tips grown from both sides overlap. Since nickel is present in this portion at a high concentration, it is not preferable to use this portion as a channel forming region of the TFT.

Next, as shown in FIG. 2A, a silicon oxide film 201 having a thickness of 1000.degree.
Is formed as a gate insulating film. For sputtering,
Using silicon oxide as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example, 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen =
0 to 0.5, for example, 0.1 or less.

Next, a thickness of 6
A film of aluminum (containing 0.1 to 2% of silicon) of 000 to 8000%, for example, 6000% is formed. Then, the aluminum film is patterned to form a gate electrode 1.
9 and 21 are formed. Further, the surface of the aluminum electrode is anodized to form oxide layers 20 and 22 on the surface. This anodization is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. Obtained oxide layer 2
The thickness of 0, 22 is 2000 °. Since the oxide layers 20 and 22 have a thickness for forming an offset gate region in a later ion doping step,
The length of the offset gate region can be determined in the above anodic oxidation step.

Next, an impurity for imparting one conductivity type is added to the active layer region (constituting the source / drain and the channel) by ion implantation. In this doping step, impurities (phosphorus and boron) are implanted using the gate electrode 19 and the surrounding oxide layer 20 and the gate electrode 21 and the surrounding oxide layer 22 as masks. Phosphine (PH ₃ ) and diborane (B ₂ H)
₆ ), and in the former case, the accelerating voltage is 60 to 90 k
V, for example 80 kV, in the latter case 40-80 kV,
For example, it is set to 65 kV. Dose amount is 1 × 10 ¹⁵ to 8 × 1
0 ¹⁵ cm ^-2 , for example, phosphorus is 2 × 10 ¹⁵ cm ^-2 and boron is 5 × 10 ¹⁵ cm ^-2 . At the time of doping, each element is selectively doped by covering one region with a photoresist. As a result, N-type impurity regions 26 and 28 and P-type impurity regions 23 and 25 are formed, and a P-channel TFT (PTFT) region and an N-channel TFT (NTFT) region can be formed. .

Thereafter, annealing is performed by irradiation with laser light or strong light. KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) as laser light
Is used, but another laser may be used. The irradiation condition of the laser light is such that the energy density is 200 to 400 mJ /
cm ² , for example, 250 mJ / cm ^2, and irradiate 2 to 10 shots, for example, 2 shots per one place. It is useful to heat the substrate to about 200 to 450 ° C. at the time of this laser light irradiation. In this laser annealing step, nickel is diffused in the previously crystallized region, so that the laser light irradiation facilitates recrystallization, and the impurity doped with an impurity imparting a P-type. Regions 23 and 25, and impurity regions 26 and 28 doped with an impurity for imparting N can be easily activated.

When this step is performed by irradiating strong light, it is effective to use infrared rays (for example, 1.2 μm). Infrared rays are easily absorbed by silicon, and effective annealing comparable to thermal annealing of 1000 degrees or more can be performed. On the other hand, since it is hardly absorbed by the glass substrate, it is not necessary to heat the glass substrate to a high temperature, and the process can be performed in a short time. .

Subsequently, a silicon oxide film 29 having a thickness of 6000.degree.
Is formed by a plasma CVD method as an interlayer insulator,
A contact hole is formed in this, and a TFT is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
Of electrodes and wirings 30, 31, and 32 are formed. Finally,
Annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm, thereby completing a semiconductor circuit having a complementary TFT.
(FIG. 2 (B))

The above-described circuit has a CMOS structure in which a PTFT and an NTFT are provided in a complementary type. In the above-described manufacturing process, two independent TFTs are manufactured at the same time, and the two TFTs are cut at the center. Can be formed simultaneously.

In such a configuration, the direction of movement of carriers moving between the source and the drain is substantially the same as the direction of crystal growth in the channel formation region, so that a TFT with high mobility can be obtained. That is, since the carriers move along the crystal grain boundaries of the needle-like or columnar crystals, the resistance received during the movement can be reduced, and a TFT having high mobility can be obtained.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure. Also, N
It goes without saying that a P-channel type may be used instead of a channel type. Further, it can be used not only for the pixel portion of the liquid crystal display device but also for the peripheral circuit portion. Further, it can be used for an image sensor and other devices.

FIGS. 1 and 3 show the outline of the manufacturing process of this embodiment.
Shown in That is, (A) to (D) of FIG.
The manufacturing process proceeds as shown in FIG. In this embodiment, a Corning 7059 glass substrate (1.1 mm thick, 300 × 400 mm) was used as the substrate 201.
1A to 1D are the same as those described in the first embodiment, and thus will not be described here.

As shown in FIG. 1D, after obtaining a crystallized silicon film 13, isolation between elements is performed by patterning. If the central portion of the silicon film 13 is removed between the elements, the nickel element existing at a high concentration in the central portion of the silicon film 13 can be removed, which is useful. Thus, as shown in FIG. 3A, an active layer region (in FIG. 3, composed of 33, 34, and 35) is determined, and a silicon oxide film 301 serving as a gate insulating film is formed. Although this silicon oxide film may be formed by a sputtering method, here, tetraethoxysilane (T
EOS) as a raw material, plasma CV in oxygen atmosphere
Formed by Method D. The thickness of the silicon oxide film is 1000
Å.

Next, a known film containing silicon as a main component is formed by a CVD method, and is patterned by
A gate electrode 30 is formed. Thereafter, phosphorus is implanted as an N-type impurity by an ion implantation method, and a source region 33, a channel formation region 34, and a drain region 35 are formed in a self-aligned manner. Then, the crystallinity of the silicon film having deteriorated crystallinity due to ion implantation is improved by irradiation with laser light or strong light. At this time, the energy density of the laser beam is set to 250 to 300 mJ / cm ² . By this laser irradiation, the source / drain sheet resistance of the TFT becomes 300 to 800 Ω / cm ² . When using strong light, it is effective to perform lamp annealing using infrared rays.

Thereafter, the interlayer insulator 36 is formed by silicon oxide.
Is formed, and the pixel electrode 37 is formed of ITO. Then, a contact hole is formed, and electrodes 38 and 39 are formed in a source / drain region of the TFT with a chromium / aluminum multilayer film.
It is also connected to the TO electrode 37. Finally, hydrogenation is completed by annealing in hydrogen at 200 to 300 ° C. for 2 hours. Thus, the TFT is completed. This process is performed simultaneously in many other pixel regions.

In the TFT manufactured in this embodiment, a crystalline silicon film grown in the direction of flow of carriers is used as an active layer constituting a source region, a channel formation region, and a drain region. May not be crossed by the carrier. That is, the carriers move along the crystal grain boundaries of needle-like or columnar crystals, so that a TFT with high carrier mobility can be obtained.

Further, in the step of FIG. 1C, the nickel silicide region is removed, and in the steps from FIG. 1D to FIG. 3A, the central portion 10 of the silicon film 13 is avoided. By determining the active layer, it is possible to provide a configuration in which there is no region with a high nickel concentration in the active layer, and TF
An improvement in the reliability of T can be obtained. In other words, nickel silicide is formed in the portion 18 and nickel is present at a high concentration in the portion 10 because the crystal growth ending portion is in the region where the nickel silicide has hit. Therefore, it is important to form a TFT by removing this portion by etching. It is also useful to form a semiconductor device, for example, a thin-film diode using this portion, not limited to the TFT.

[0075]

[Effect] A film of a metal element that promotes crystallization is formed on the side surface of the amorphous silicon film formed in an island shape, and crystal growth is performed from this portion, so that the entire amorphous silicon film is parallel to the substrate. It can be a silicon film grown by crystal growth in various directions. After removing the film of the metal element, a TFT having high mobility can be obtained by forming a TFT using the crystallized silicon film.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows a nickel concentration in a silicon film.

[Explanation of symbols]

 11 ··· glass substrate 12 ··· base film (silicon oxide film) 13 ··· silicon film 14 ··· silicon oxide film 15 ··· nickel silicide film 16 ··· nickel silicide 17 ··· Crystallization direction 18 ··· Side etching portion 19 ··· Gate electrode 20 ··· Oxide layer 201 ··· Gate insulating film 21 ··· Gate electrode 22 ··· Oxidation Material layer 23 Source / drain region 24 Channel formation region 25 Drain / source region 26 Drain source region 27 Channel formation region 28 Source / Drain region 29 ... interlayer insulator 30 ... source / drain electrode 31 ... drain source electrode 32 ... source / drain electrode 30 ... gate electrode 301 ... gate Edge film 33 Source / drain region 34 Channel formation region 35 Drain / drain region 36 Interlayer insulator 37 ITO electrode (pixel electrode) 38 ..Source / drain electrodes 39.. .Drain / source electrodes

Claims (12)

(57) [Claims] It consists of forming an amorphous semiconductor film, forming an insulating film on the amorphous semiconductor film, and the amorphous semiconductor film and the insulating film and patterned to 1. A substrate Forming an island-shaped stack; and forming a film containing a metal element that promotes crystallization using the amorphous semiconductor.
Forming on the sides of the membrane, the have rows crystal growth from the side of the amorphous semiconductor film crystallinity and a half
Forming a conductor film; and a method for manufacturing a semiconductor device. 2. A process for forming an amorphous semiconductor film on a substrate.
And a step of forming an insulating film on the amorphous semiconductor film; and performing patterning to form the insulating film and the insulating film.
Forming an island-shaped laminate, and forming a film containing a metal element that promotes crystallization from the amorphous semiconductor.
Forming a film on the side surface of the film;
The method for manufacturing a semiconductor device, characterized in that it comprises the steps of forming a conductive film, and forming a thin film transistor using the crystalline semiconductor film. 3. The crystalline semiconductor film according to claim 2 , wherein
Channel forming region, source region, and drain using
And a step of forming a region, in the channel forming region, to move the carrier along outline in the direction of crystal growth is performed of the crystalline semiconductor film
Forming a source region and a drain region as described above . 4. A process for forming an amorphous semiconductor film on a substrate.
And a step of forming an insulating film on the amorphous semiconductor film; and performing patterning to form the insulating film and the insulating film.
Forming an island-shaped laminate, and forming a film containing a metal element that promotes crystallization from the amorphous semiconductor.
Forming a film on the side surface of the film;
Forming a conductor film, removing the crystal growth start portion and the crystal growth end portion of the crystal growth, and removing the crystal growth start portion and the crystal growth end portion.
Forming a semiconductor device using the crystalline semiconductor film . 5. An active layer comprising a crystalline silicon film, wherein the active layer contains nickel element at 4 × 10 ¹⁷ (atoms).
/ Cm ³ ) to 1 × 10 ¹⁹ (atoms / cm ³ ), and the active layer is grown in a direction substantially parallel to the substrate. A semiconductor device, wherein a growth start portion or a crystal growth end portion is removed. 6. has an active layer made from crystalline silicon film, the active layer is 4 × 10 a Runi nickel element to promote crystallization of
¹⁷ (atoms / cm ³ ) to 1 × 10 ¹⁹ (atom
s / cm ³ ), and the active layer is grown in a direction substantially parallel to the substrate. 7. The method of claim 5 or claim 6, wherein
A channel formation region is formed in the active layer.
In Yaneru formation region, along the direction of the crystal growth
A method for manufacturing a semiconductor device, wherein a source region and a drain region are formed so that carriers move . 8. The method of Claim 5 or claim 6, wherein a channel formation region is formed in the active layer. 9. The method of claim 5 or claim 6, wherein a said crystal growth is carried out in a needle shape or columnar. 10. The method of Claim 5 or claim 6, the concentration of the nickel element is 1 × ¹⁰ 18 (atoms / c
m ³ ) to 8 × 10 ¹⁸ (atoms / cm ³ ). 11. The method of Claim 5 or claim 6, wherein the crystal growth is performed in a needle shape or columnar, the concentration of the nickel element is 1 × ¹⁰ 18 (atoms /
cm ³ ) to 8 × 10 ¹⁸ (atoms / cm ³ ). 12. An amorphous semiconductor film formed on a substrate .
A step of adding a metal element that promotes crystallization of the side surface, the amorphous semiconductor film by crystal growth, the amorphous semiconductor
A step of obtaining a crystalline semiconductor film that has grown from a side surface of the body film in a direction substantially parallel to the substrate ; and a step of removing a crystal growth start portion or a crystal growth end portion of the crystalline semiconductor film. A method for manufacturing a semiconductor device, comprising: