JP3918068B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a semiconductor device having a TFT (thin film transistor) provided over an insulating substrate such as glass and a method for manufacturing the semiconductor device.
[0002]
[Prior art]
Known semiconductor devices having TFTs on an insulating substrate such as glass include active liquid crystal display devices and image sensors that use these TFTs to drive pixels.
[0003]
A thin film silicon semiconductor is generally used for TFTs used in these devices. Thin film silicon semiconductors are roughly classified into two types: those made of amorphous silicon semiconductor (a-Si) and those made of crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low production temperature, can be produced relatively easily by a vapor phase method, and are highly mass-productive. However, physical properties such as conductivity have crystallinity. Since it is inferior to a silicon semiconductor, the establishment of a method for manufacturing a TFT made of a crystalline silicon semiconductor has been strongly demanded in order to obtain higher speed characteristics in the future. Note that the silicon semiconductor having crystallinity includes non-single crystal silicon such as polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, and semi-amorphous silicon having an intermediate state between crystalline and amorphous. Membranes are known. Hereinafter, a crystalline silicon semiconductor is referred to as a crystalline silicon semiconductor, and a crystalline silicon semiconductor film is referred to as a crystalline silicon film.
[0004]
As a method of obtaining a thin film silicon semiconductor having these crystallinity,
(1) A film having crystallinity is directly formed at the time of film formation.
(2) An amorphous semiconductor film is formed and given crystallinity by the energy of laser light.
(3) An amorphous semiconductor film is formed and crystallized by applying heat energy.
Is known. However, the method (1) is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. There was also a problem of cost that a glass substrate could not be used. In the method (2), the excimer laser, which is currently most commonly used, has a problem that the throughput is low because the irradiation area of the laser beam is small. The laser is not stable enough to treat the material uniformly, and there is a strong sense of the next generation technology. The method (3) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but it is also necessary to set the heating temperature to a high temperature of 600 ° C. or more, which is an inexpensive glass. Considering the use of a substrate, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen has been enlarged, and therefore it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage and distortion in the heating process that is indispensable for semiconductor fabrication reduce the accuracy of mask alignment and the like, which is a serious problem. In particular, in the case of 7059 glass that is most commonly used at present, the strain point is 593 ° C., and the conventional heat crystallization method causes large deformation. In addition to the temperature problem, in the current process, the heating time required for crystallization is several tens of hours or more, and it is necessary to further shorten the time.
[0005]
[Problems to be solved by the invention]
The present invention provides means for solving the above problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The purpose is to provide a process that balances the two. Of course, the silicon semiconductor having crystallinity produced using the process provided by the present invention has physical properties equivalent to or better than those produced by the prior art, and can be used for the active layer region of the TFT. It goes without saying that there are.
[0006]
BACKGROUND OF THE INVENTION
The inventors have conducted the following experiment on the method of forming an amorphous silicon semiconductor film by the CVD method or the sputtering method and crystallizing the film by heating, as described in the section of the prior art. And discussed.
[0007]
First, as an experimental fact, when an amorphous silicon film is formed on a glass substrate and the mechanism for crystallizing this film by heating is investigated, crystal growth starts from the interface between the glass substrate and amorphous silicon, Above the film thickness, it was recognized that the film progressed in a columnar shape perpendicular to the substrate surface.
[0008]
In the above phenomenon, there is a crystal nucleus (a seed that becomes the basis of crystal growth) at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be caused by Such crystal nuclei include impurity metal elements that are present in minute amounts on the substrate surface and crystal components on the glass surface (as called crystallized glass, the crystal component of silicon oxide exists on the glass substrate surface) Is considered).
[0009]
Therefore, we thought that it would be possible to lower the crystallization temperature by more aggressively introducing crystal nuclei, and in order to confirm the effect, a small amount of other metal was deposited on the substrate and non-coated on it. An experiment was conducted in which a thin film made of crystalline silicon was formed and then heated for crystallization. As a result, when several metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was predicted that crystal growth occurred using foreign substances as crystal nuclei. Therefore, the mechanism of the impurity metals that could be reduced in temperature was investigated in more detail.
[0010]
Crystallization can be considered in two stages: initial nucleation and crystal growth from the nuclei. Here, the initial nucleation rate is observed by measuring the time until fine crystals are generated at a constant temperature at a constant temperature. In some cases, the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. Moreover, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, a certain kind of metal was deposited, and then the amorphous silicon thin film deposited thereon was formed. In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism will be described in detail later.
[0011]
In any case, due to the above two effects, when a thin film made of amorphous silicon is formed on a small amount of a certain kind of metal, and then heated and crystallized, it has not been considered in the past. It has been found that sufficient crystallinity can be obtained in about 4 hours at a temperature of 580 ° C. or lower. Examples of impurity metals having such effects include iron, cobalt, nickel, copper, palladium, silver, and platinum. Since these are metals that are often used as catalyst materials, they will be hereinafter referred to as “catalyst metals for low-temperature crystallization” in the present specification. Among these, nickel is mentioned as a material that is most effective and easy to handle, and in the present specification, discussion will be focused on nickel.
[0012]
As an example of the effect of nickel, amorphous silicon formed by plasma CVD on a substrate (Corning 7059) on which no treatment is performed, that is, a nickel thin film is not formed. When a thin film made of the material is crystallized by heating in a nitrogen atmosphere, if the heating temperature is 600 ° C., a heating time of 10 hours or more is required. in the case of using a thin film made of amorphous silicon on the substrate, it was it is possible to get a similar crystalline state in the heating of about 4 hours. The determination of crystallization at this time utilized a Raman spectrum. From this alone, it can be seen that the effect of nickel is very large.
[0013]
[Means for solving the problems]
As can be seen from the above description, when a thin film of amorphous silicon is formed after forming a thin film of catalytic metal for low-temperature crystallization, the time required for lowering the crystallization temperature and for crystallization is reduced. Shortening is possible. Therefore, a more detailed description will be added on the assumption that this process is used for manufacturing TFTs. As will be described in detail later, the thin film of the catalyst metal for low-temperature crystallization has the same effect even when it is formed on amorphous silicon as well as on the substrate, and it is the same in ion implantation. Hereinafter, in the present specification, this series of treatments will be referred to as “low-temperature crystallization catalyst metal addition”. As the catalyst metal for low-temperature crystallization, it is useful to use at least one element selected from iron, cobalt, nickel, copper, palladium, silver, and platinum. Examples of elements having effects equivalent to those of the above materials include Group 8 elements such as Ru, Rh, Os, and Ir.
[0014]
First, a method for adding a catalyst metal for low-temperature crystallization will be described. The addition of a trace amount of the catalyst metal for low-temperature crystallization can be performed by forming a thin film of the catalyst metal for low-temperature crystallization on the substrate and then depositing amorphous silicon. In addition, the method of forming a small amount of the catalyst metal thin film for low-temperature crystallization from the above has the effect of lowering the temperature in the same way, and the film-forming method can be either sputtering or vapor deposition. It turns out not. However, when a small amount of low-temperature crystallization catalyst metal thin film is formed on the substrate, silicon oxide is not formed on the substrate rather than directly on the 7059 glass substrate. The effect is more remarkable when a thin film is formed and a small amount of a low-temperature catalytic metal thin film for crystallization is formed thereon. As a possible reason for this, it is important for the low temperature crystallization that silicon and the catalytic metal for low temperature crystallization are in direct contact. In the case of 7059 glass, components other than silicon are in contact with each other. Or the reaction may be inhibited.
[0015]
Further, as a method of adding a small amount, in addition to forming a thin film in contact with or under amorphous silicon, almost the same effect was confirmed by adding a catalyst metal for low-temperature crystallization by ion implantation. Further, it may be added as an impurity when forming an amorphous silicon film or a non-single-crystal silicon film to be crystallized.
[0016]
Regarding the amount of the catalyst metal for low-temperature crystallization, for example, for nickel, a low temperature is confirmed by addition of an amount of 1 × 10 ¹⁵ atoms / cm ³ or more, but addition of 1 × 10 ²¹ atoms / cm ³ or more. In terms of quantity, the peak shape of the Raman spectrum is clearly different from that of silicon alone, so that it is actually possible to use 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 × 10 ¹⁹ atoms / cm ³ . Seems to be in range. Further, considering that it is used for an active layer of TFT as a semiconductor physical property, it is necessary to suppress this amount to 1 × 10 ¹⁵ atoms / cm ³ to 2 × 10 ¹⁹ atoms / cm ³ .
[0017]
Subsequently, the crystallization mechanism presumed when nickel is used as the catalyst metal for low temperature crystallization will be described.
[0018]
As described above, when the low-temperature crystallization catalyst metal is not added, nuclei are randomly generated from crystal nuclei such as the substrate interface, and crystal growth from the nuclei is also random, depending on the production method (110). Alternatively, it has been reported that a relatively oriented crystal is obtained at (111), and of course, almost uniform crystal growth is observed over the entire thin film.
[0019]
First, in order to confirm this mechanism, analysis by DSC (differential scanning calorimeter) was performed. The amorphous silicon thin film formed on the substrate by plasma CVD was filled in the sample container while attached to the substrate, and the temperature was raised at a constant rate. Then, a clear exothermic peak was observed around 700 ° C., and crystallization was observed. This temperature naturally shifts when the rate of temperature increase is changed, but crystallization started from 700.9 ° C., for example, when performed at a rate of 10 ° C./min. Next, three types of temperature rising rates were measured and the activation energy for crystal growth after initial nucleation was determined from them by the Ozawa method. As a result, a value of about 3.04 eV was obtained. In addition, when the reaction rate equation was obtained by fitting with the theoretical curve, it was found that it was best explained by disordered nucleation and its growth model, and nuclei were randomly generated from crystal nuclei such as the substrate interface. The validity of the model of crystal growth from the nucleus was confirmed.
[0020]
The same measurement as described above was carried out for a sample to which a low-temperature crystallization catalyst metal was added, in which a small amount of nickel was added as an example. Then, when the temperature is raised at a rate of 10 ° C./min, crystallization starts from 619.9 ° C., and the activation energy of crystal growth obtained from these series of measurements is about 1.87 eV, It became numerically clear that crystal growth was easy. In addition, the reaction rate equation obtained from the fitting with the theoretical curve is close to the one-dimensional interface-controlled model, suggesting that the crystal growth has a certain directionality.
[0021]
Here, the lowering of the crystallization start temperature can be considered relatively easily as a foreign matter effect as described above, but what is the cause of the decrease in activation energy for crystal growth? In order to investigate this reason, the activation energy for recrystallization of the amorphous silicon film produced by making it amorphous by implanting silicon ions into the polycrystalline silicon film was measured by the method described above. As a result, it was found that the activation energy for crystal growth decreased to about 2.3 eV although the crystallization start temperature was shifted to the high temperature side. Here, in the amorphous silicon film produced by ion implantation, considering that the film contains almost no hydrogen, the ease of crystal growth depends on the hydrogen at the interface between the crystal part and the amorphous part. It is expected that the ease of detachment is rate-limiting. As an experimental result to support this hypothesis, from the result of TG-DTA (simultaneous differential thermothermal gravimetric analysis) of an amorphous silicon film, the start of crystallization always occurs immediately after the hydrogen desorption is completed. The possibility of inhibiting crystallization is expected to be very high.
Here, when examining the reaction between hydrogen and the catalyst metal for low-temperature crystallization added this time, these are substances that cause an exothermic reaction when reacting with hydrogen to form a hydride (Palladium is the only literature). Depending on the endothermic reaction). This indicates that the low-temperature crystallization catalyst metal is stabilized by bonding with hydrogen, and it is considered that the low-temperature is achieved by the following mechanism.
The catalyst metal for low-temperature crystallization incorporated into amorphous silicon forms a direct bond with silicon. When temperature is added here, diffusion of the catalyst metal for low-temperature crystallization proceeds prior to crystallization in order to homogenize the concentration gradient. The bond becomes weak and the bond is easily broken, and dangling bonds and vacancies in the film increase. Crystallization needs to be accompanied by movement of silicon atoms, but increased dangling bonds and vacancies are expected to facilitate them, which means that crystallization preparations are formed at lower temperatures. . Thereafter, nucleation occurs, and the activation energy at this time is reduced by adding a small amount of the catalyst metal for low-temperature crystallization. This is obvious from the fact that crystallization occurs at a lower temperature by adding a low-temperature crystallization catalyst metal, and this is because of the effect of the low-temperature crystallization catalyst metal alone as a foreign substance, or It is considered that there is a possibility of an effect of an intermetallic compound composed of a catalyst metal for low-temperature crystallization and silicon. In addition, this nucleation occurs almost simultaneously over the entire region where the catalyst metal for low-temperature crystallization is added. As a result, the crystal growth grows as a plane. In this case, the reaction rate equation is a one-dimensional interface rate-determining method. The process is consistent with the DSC results. After that, crystal growth from the crystal nucleus proceeds, but at that time, hydrogen does not exist at the interface between the crystal part and the amorphous part, so the rate-determining process changes, and accordingly the activation energy required for crystal growth is Decrease significantly.
In order to explain the above mechanism, diffusion of the catalyst metal for low-temperature crystallization prior to crystallization is indispensable. For this, low-temperature crystallization is performed on samples annealed before crystallization starts. The concentration of the catalytic metal for the catalyst was measured by SIMS (secondary ion mass spectrometry), and it was found that the low temperature crystallization was higher than the measurement limit value from the region where the catalytic metal for low temperature crystallization was directly added to the region where it was not added far away. It is thought that it will be clear from the presence of the catalyst metal for use.
[0022]
Next, the crystal form of the crystalline silicon film obtained by adding a small amount of the catalyst metal for low-temperature crystallization will be described.
As mentioned in the explanation of the crystallization mechanism, the added metal diffuses in a considerably wide region below the crystallization temperature. As a result, the crystallization temperature is lowered in these diffusion regions. And it became clear that a crystal form differs in this direct addition area | region and its diffusion area | region. That is, it was confirmed that the directly added region grew in the vertical direction to the substrate, while the peripheral diffusion region grew in the horizontal direction on the substrate. It is speculated that these are all due to the difference in initial nucleation of crystals. That is, in the directly added portion, these foreign substances become crystal nuclei and crystal growth occurs from there to the columnar shape, whereas in the peripheral diffusion region, the crystal nuclei are directly added portions grown in the above-described vertical direction. This is because it is construed that the growth is inevitably happening laterally in order to start growing from there. Hereinafter, in this specification, the crystal growth region in the lateral direction parallel to the substrate extending from the direct addition region of the low-temperature crystallization catalyst metal to the periphery will be referred to as a “lateral growth” region.
[0023]
Next, the electrical characteristics of the nickel slight addition portion and the laterally grown portion in the vicinity when nickel is used as the catalyst metal for low temperature crystallization will be described. The electrical characteristics of the portion with a small amount of nickel added are about the same as those of a film with almost no nickel added, that is, the value obtained by crystallization at about 600 ° C. for several tens of hours, and the temperature dependence of the conductivity. When the activation energy was determined from the properties, it was considered that when the amount of nickel added was about 10 ¹⁷ atoms / cm ³ to 10 ¹⁸ atoms / cm ³ as described above, it was thought to be due to the level of nickel. No behavior was observed. That is, from this experimental fact, it is considered that the above-mentioned concentration can be used as an active layer of a TFT.
[0024]
On the other hand, the laterally grown portion has a conductivity higher by one digit or more than that of the portion with a small amount of nickel added, and has a considerably high value as a silicon semiconductor having crystallinity. This is thought to be due to the fact that the path direction of the current coincides with the lateral growth direction of the crystal, so that there are few or almost no grain boundaries existing while electrons pass between the electrodes. Consistent with the results. That is, since the movement of the carrier is along the grain boundary of the crystal grown in the shape of a needle or a column, it can be considered that the carrier is easily moved.
[0025]
Further, as shown in FIG. 1, nickel is selectively introduced into a region 100 as a nickel silicide film, and thereafter an amorphous silicon film 104 is formed by a known plasma CVD method, and further heated at 550 ° C. for 4 hours. In the region 100 into which nickel has been introduced, crystal growth occurs in a direction perpendicular to the substrate 101, and at the same time, in regions other than 100, the region is laterally parallel to the substrate 101 as indicated by an arrow 105. Directional growth takes place. As a result, a crystalline silicon film is obtained. When the nickel concentration in the crystalline silicon film was measured by SIMS, the following knowledge was obtained.
[0026]
1. The concentration distribution of nickel is not so large in the thickness direction of the film.
2. The nickel concentration in a region where nickel is directly introduced (for example, 100 region in FIG. 1) is greatly influenced by the deposition conditions of the nickel film. In other words, the reproducibility of the nickel concentration in that region is not so high.
3. In the region where the crystal is grown in a direction parallel to the substrate (region where nickel is not directly introduced), the concentration is about one order of magnitude smaller than the region where nickel is directly introduced, and the reproducibility of the concentration is Highly obtained.
4). The background nickel concentration is about 1 × 10 ¹⁷ cm ⁻³ , which almost coincides with the SIMS measurement limit. That is, it can be said that the background nickel concentration is about 1 × 10 ¹⁷ cm ⁻³ , which is the SIMS measurement limit level, or less.
[0027]
For example, in a region where nickel is directly introduced and crystal is grown in a direction perpendicular to the substrate, when nickel is present at a concentration of about 2 × 10 ¹⁸ cm ⁻³ , about 40 μm from the region where nickel is introduced. In a region where crystals are grown in a direction parallel to a distant substrate, that is, a region where lateral growth is performed, the measured nickel concentration is about 2 × 10 ^{17, which} is about an order of magnitude less. The above example will be described with reference to FIG. FIG. 4 shows a Ni concentration in a region to which Ni has been added by plasma treatment (plasma treated), a Ni concentration in a region in which crystal growth has occurred in a direction parallel to the substrate (lateral growth), and a− which is a ground level. This is the Ni concentration of Si. As can be seen from FIG. 4, the Ni concentration in the region (Lateral growth) in which the crystal grows in the direction parallel to the substrate is lower than that in the region where Ni is directly introduced. Therefore, for use as a device, it is useful to use a region in which crystals are grown in a direction parallel to the substrate.
[0028]
It is very difficult to control the nickel concentration in the silicon film in the region where nickel is directly introduced, and the nickel concentration in this case varies greatly depending on the deposition conditions of the nickel film (actually nickel silicide film) To do. This is because the nickel concentration in the region (e.g., 100 regions in FIG. 1), a very severe film thickness of about 20 Å (actually be measured is difficult, is a value estimated from the film formation rate) This is considered to be because it directly depends on the required film forming conditions. As is well known, it is not possible to good uniformity deposited 20 Å about film on a large area in the film forming method such as a sputtering method. Therefore, it is considered that the poor reproducibility of the film formation directly reflects the nickel concentration in the silicon film. In addition, the variation in nickel concentration directly affects the characteristics of a TFT in which a region where nickel is directly introduced is formed as an active layer. That is, when a TFT is manufactured using a region into which nickel is directly introduced (for example, 100 in FIG. 1), the variation in characteristics appears greatly. This is also considered to be caused by the poor reproducibility of the ultra-thin nickel film.
[0029]
On the other hand, the nickel concentration in the region away from the region where nickel is introduced, that is, the region where the crystal is laterally grown in the direction parallel to the substrate from the region where nickel is directly introduced is generally higher than the region where nickel is directly introduced. There was a tendency that the concentration was small (about one order of magnitude at a location 40 μm away as described above) and the variation was further reduced. Further, according to experiments, the concentration of nickel in the active layer at which satisfactory characteristics can be obtained as a TFT is below the SIMS measurement limit (1 × 10 ¹⁷ cm ⁻³ or less) to about 2 × 10 ¹⁹ cm ⁻³ . Although it is known that in the region where the crystal has grown in parallel with the substrate, the above described nickel is directly applied regardless of the amount of direct nickel introduced (the nickel-introduced region, for example, the nickel concentration in the silicon film 104 in the region 100). It has been found that a predetermined nickel concentration can be obtained relatively stably. In other words, if a TFT is formed using a region in which crystal is grown in parallel with the substrate from a region where nickel is introduced, a TFT can be obtained with extremely high reproducibility.
[0030]
Furthermore, it is easy to select a region within the above nickel concentration range, or to make the nickel concentration within a predetermined region (but not a region indicated by 100 where nickel is directly introduced) within the above range. Has been confirmed. For example, in order to select a region having a predetermined nickel concentration, the nickel can be set to a predetermined concentration by setting a distance from the region where nickel is introduced. However, in this case, it is necessary to obtain the required crystallinity of the silicon film.
[0031]
In addition, to control the nickel concentration in the region of crystal growth parallel to the substrate, it can also be controlled by controlling the crystallization conditions (mainly heating time and heating temperature). This is much easier than controlling the nickel concentration in the region.
[0032]
As described above, the use of a region in which a crystal is grown in parallel to the substrate from a region to which a catalytic element for crystallization is added, that is, a laterally grown region, is used for a semiconductor device.
(1) The crystal orientation can be positively used, and a carrier having high mobility can be used.
(2) A region where the concentration of the catalyst material for crystallization is low can be used.
(3) The region (2) can be obtained with good reproducibility.
(4) The concentration of the catalyst material for crystallization can be easily controlled.
It is useful in that respect.
[0033]
Finally, a method applied to the TFT will be described based on the various characteristics described above. Here, as an application field of the TFT, an active matrix liquid crystal display device using the TFT for driving the pixel is assumed.
[0034]
As described above, in the recent large-screen active matrix liquid crystal display devices, it is important to suppress the shrinkage of the glass substrate. However, by using the catalytic metal trace addition process for low-temperature crystallization according to the present invention, This is particularly preferable because crystallization can be performed at a temperature sufficiently lower than the strain point. According to the present invention, a portion where amorphous silicon has been conventionally used is added with a small amount of a low-temperature crystallization catalyst metal and crystallized at about 500 to 550 ° C. for about 4 hours. It can be easily replaced. Of course, it is necessary to change the design rules and the like accordingly, but it is considered that the apparatus and the process can be sufficiently handled by conventional ones, and the merit is great.
[0035]
In addition, if the present invention is used, the TFT used for the pixel and the TFT for forming the driver of the peripheral circuit can be separately formed using crystal forms corresponding to the characteristics, and the active liquid crystal display device There are many merits especially in application to. A TFT used for a pixel does not require much mobility, and a smaller off-current has a greater merit than that. Therefore, when using the present invention, a small amount of catalyst metal for low-temperature crystallization is directly added to a region to be a TFT used for a pixel to grow a crystal in the vertical direction, thereby forming a large number of grain boundaries in the channel direction. Thus, the off-state current can be reduced. On the other hand, the TFT that forms the driver of the peripheral circuit needs very high mobility when considering application to a workstation in the future. Therefore, when applying the present invention, a small amount of catalyst metal for low-temperature crystallization is added in the vicinity of the TFT forming the driver of the peripheral circuit, and from there, a crystal is grown in one direction (direction parallel to the substrate), By aligning the crystal growth direction with the channel current path direction, a TFT having very high mobility can be manufactured.
[0036]
There is also known an apparatus in which sensors for handling image information and optical signals are integrated on a glass substrate. For example, an integrated image sensor is known. In such an apparatus, if visible light is detected, it is preferable to use amorphous silicon (a-Si) from the viewpoint of spectral sensitivity. However, since a switching element that requires high-speed operation is required for the drive circuit portion, it is not preferable that the element of the drive circuit portion, for example, the TFT is made of an amorphous silicon film. In such a case, it is useful to use the high mobility TFT described above. For example, a photodiode or phototransistor using an amorphous silicon film is formed in the sensor portion, and a transistor is formed in the peripheral circuit portion using the crystalline silicon film of the present invention. Then, these circuits can be integrated on the same substrate (for example, a glass substrate) to make a different structure.
[0037]
That is, if the present invention is used, a crystalline silicon film region and an amorphous silicon film region can be separately formed in a predetermined region, and the crystalline silicon film region that has grown in the lateral direction is used. Thus, a device in which carriers can move at high speed can be formed. The usefulness as described above can be used not only for liquid crystal display devices and sensors, but also for semiconductor devices that are widely integrated on a substrate. That is, it can be used for a device in which a transistor or a diode using a thin film semiconductor on a substrate, and further a resistor and a capacitor are integrated.
[0038]
[Action]
Crystal growth is performed in a needle-like or columnar shape in a direction parallel to the substrate from a region into which trace elements centering on a group 8 element having a catalytic action introduced to crystallize silicon are introduced. By forming an active layer such as a TFT using a crystal growth region, a region having a lower concentration than the region into which a trace element is introduced can be used as an active layer, and the device is not affected by the trace element. Can be obtained.
[0039]
Further, when the device is formed, the characteristics of the device can be enhanced by setting the carriers to flow in accordance with the crystal growth direction of the crystalline silicon film crystal-grown in a needle shape or a column shape. Further, in this region, the concentration of the trace element is low and the concentration can be easily controlled, so that a device having necessary characteristics can be obtained with good reproducibility.
[0040]
【Example】
In the following examples, nickel is used as a catalyst for crystallization. However, when other group 8 elements are used, Cu or Ag that can be expected to have the same effect as nickel is used. However, it can basically be used instead of nickel in the following examples. In addition, the introduction method is a method of forming those elements or a thin film containing the elements on the top surface of the non-single-crystal silicon film, and adding an element of group 8 into the non-single-crystal silicon film by ion doping or ion implantation. Or a method of mixing at the time of forming an amorphous silicon film. At this time, the concentration may be 2 × 10 ¹⁹ cm ⁻³ or less in the silicon film.
[0041]
[Example 1]
In this embodiment, a circuit in which a P-channel TFT (PTFT) using a crystalline silicon film and an N-channel TFT (NTFT) are combined on a glass substrate in a complementary manner is formed. The configuration of this embodiment can be used for pixel electrode switching elements, peripheral driver circuits, image sensors, and other integrated circuits in active liquid crystal display devices.
[0042]
FIG. 1 shows a cross-sectional view of a manufacturing process of this embodiment. First, a silicon oxide base film 102 having a thickness of 2000 mm is formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a mask 103 formed of a metal mask or a silicon oxide film is provided. The mask 103 exposes the base film 102 in a slit shape in a region indicated by 100. That is, looking at the state of FIG. 1 (A) from the top, the underlying film 102 like a slit is exposed, the other portion is in a state being masked.
[0043]
After providing the mask 103, by sputtering, the thickness 5 to 200 Å, for example, 20 Å of nickel silicide film (chemical formula _{NiSi x, 0.4 ≦ x ≦ 2.5} , for example, x = 2.0) of A film is selectively formed in 100 regions. The nickel silicide film is formed because nickel, which is a group VIII (group 8) element, is used as a catalyst element for crystallization.
[0044]
Next, by a plasma CVD method, an amorphous silicon film 104 having a thickness of 500 to 1500 Å, for example 1000 Å intrinsic (I type). Then, this is crystallized by annealing for 4 hours at 550 ° C. or in an inert atmosphere (atmospheric pressure) at 550 ° C. in a hydrogen reducing atmosphere (preferably the partial pressure of hydrogen is 0.1 to 1 atm). . At this time, the crystallization of the crystalline silicon film 104 occurs in a direction perpendicular to the substrate 101 in 100 regions where the nickel silicide film is selectively formed. In regions other than the region 100, crystal growth is performed from the region 100 in the lateral direction (direction parallel to the substrate) as indicated by an arrow 105.
[0045]
In order to promote this crystallization and to obtain a denser crystalline silicon film, annealing by lamp heating is performed after the above heat annealing. This annealing is performed using 1.2 μm infrared light. Also, the annealing time is within 5 minutes. Infrared light is efficiently absorbed by silicon, and a great effect can be obtained in improving the film quality of silicon. On the other hand, since it is difficult to be absorbed by the glass substrate, it is possible to obtain the significance that energy is selectively given to silicon and the glass substrate is not heated so much. As light used for annealing by this lamp heating, tungsten halogen lamp light (wavelength: 0.5 μm to 3.5 μm) or the like can be used. A dense crystalline silicon film can be obtained by annealing by this lamp heating. It is also possible to perform annealing using laser light instead of the lamp heating.
[0046]
In addition, when the crystalline silicon film annealed by the lamp heating and the crystalline silicon film without the lamp heating were respectively formed, N-channel TFTs were formed, and the mobility was measured. An improvement of about 20% was observed. This is considered to be due to the crystallinity improvement by the lamp heating, particularly the fact that defects in the film can be greatly reduced.
[0047]
As a result of the above step, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. Thereafter, element isolation is performed to determine the active layer region in which the source / drain region and the channel formation region of the TFT are formed. In this example, since crystal growth (lateral growth) in a direction parallel to the substrate was observed over about 40 μm or more, the length of each active layer (length in the source / drain direction) was set to 40 μm. . In this case, the distance between the center of the channel and the position where nickel is introduced is about 20 μm. By setting this distance, the concentration of nickel in the active layer (especially the channel formation region) can be selected. it can.
[0048]
Next, a silicon oxide film 106 having a thickness of 1000 mm is formed as a gate insulating film by a sputtering method. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example 0.1 or less. To do.
[0049]
After this step, the previous annealing by lamp heating is performed again. This is to improve the interface characteristics between the gate insulating film 106 made of a silicon oxide film and the crystalline silicon film 104. Of course, the crystallinity of the crystalline silicon film 104 is further improved by this lamp heating annealing. As is well known, the interface characteristics between the gate insulating film of the insulated gate field effect transistor and the channel formation region (in FIG. 1, 112 and 115 are the crystalline silicon film portions that become the channel formation region) are improved. Specifically, it is important to reduce defects and levels in the region as much as possible. Therefore, annealing by lamp heating performed after the formation of the gate insulating film 106 can obtain a great effect. Further, annealing by laser beam irradiation may be performed instead of lamp heating.
[0050]
Then, deposited by sputtering, the thickness 6000 to 8000 Å, for example 6000 Å of aluminum (containing 0.1% to 2% of silicon). Then, patterning is performed to form gate electrodes 107 and 109. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing 1 to 5% tartaric acid. The thickness of the resulting oxide layers 108 and 110 was 2000 Å. Note that the oxides 108 and 110 have a thickness for forming an offset gate region in a subsequent ion doping step, and therefore the length of the offset gate region can be determined in the anodic oxidation step. Of course, this gate electrode may have a structure having silicon as a main component, further having a silicide of silicon and metal, one having a metal as a main component, and a stack of silicon and metal.
[0051]
Next, an impurity imparting one conductivity type is added to the active layer region (which constitutes a source / drain and a channel) by ion doping (ion implantation). In this doping step, impurities (phosphorus and boron) are implanted using the gate electrode 107 and its surrounding oxide layer 108 and the gate electrode 109 and its surrounding oxide layer 110 as masks. As the doping gas, phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used. In the former case, the acceleration voltage is set to 60 to 90 kV, for example, 80 kV, and in the latter case, 40 to 80 kV, for example, 65 kV. The dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus is 2 × 10 ¹⁵ cm ⁻² and boron is 5 × 10 ¹⁵ . In doping, each region is selectively doped by covering one region with a photoresist. As a result, N-type impurity regions 114 and 116 and P-type impurity regions 111 and 113 are formed, and a P-channel TFT (PTFT) region and an N-channel TFT (NTFT) region can be formed. .
[0052]
Thereafter, annealing is performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers may be used. The laser light is irradiated under an energy density of 200 to 400 mJ / cm ² , for example, 250 mJ / cm ^2, and ² to 10 shots, for example, 2 shots are irradiated at one place. It is useful to heat the substrate to about 200 to 450 ° C. during the laser light irradiation. In this laser annealing step, since nickel has diffused in the previously crystallized region, recrystallization easily proceeds by this laser light irradiation, and an impurity doped with an impurity imparting P-type The regions 111 and 113 and the impurity regions 114 and 116 doped with an impurity imparting N can be easily activated.
[0053]
Further, as the annealing method for the source / drain regions, the annealing method by lamp heating described above is also effective. This lamp heating (for example, using 1.2 μm of infrared light) selectively heats silicon as described above, and thus is useful for processes such as this example in which it is desired to avoid heating the glass substrate as much as possible. .
[0054]
Subsequently, a silicon oxide film 118 having a thickness of 6000 mm is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed in the silicon oxide film 118, and a TFT electrode and a metal material, for example, a multilayer film of titanium nitride and aluminum are formed. Wirings 117, 120, and 119 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete a semiconductor circuit in which TFTs are configured in a complementary manner. (Figure 1 (D))
[0055]
The circuit shown above has a CMOS structure in which PTFT and NTFT are provided in a complementary manner. However, in the above process, two TFTs are formed at the same time, and two independent TFTs are manufactured simultaneously by cutting at the center. Is also possible.
[0056]
FIG. 2 shows an outline of FIG. 1D viewed from above. The reference numerals in FIG. 2 correspond to the reference numerals in FIG. As shown in FIG. 2, the direction of crystallization is a direction indicated by an arrow 105, and crystal growth is performed in the direction of the source / drain region (the direction of the line connecting the source region and the drain region). During the operation of the TFT having this configuration, carriers move between the source / drain along a crystal grown in a needle shape or a column shape. That is, the carrier moves along the crystal grain boundary of the needle-like or columnar crystal. Therefore, the resistance received when the carrier moves can be reduced, and a TFT having high mobility can be obtained.
[0057]
In this embodiment, as a method of introducing nickel, nickel is selectively formed on the underlying film 102 under the amorphous silicon film 104 as a nickel silicide thin film (it is very thin and difficult to observe as a film). Although a method of forming and crystal growth from this portion is adopted, a method of selectively forming a nickel silicide film after forming the amorphous silicon film 104 may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. In addition, as a method for introducing nickel, a method of performing a plasma treatment using an electrode containing nickel and attaching a minute amount of nickel may be used. Also, an amorphous silicon film is formed in advance, and nickel ions are selectively implanted into the amorphous silicon film 104 by ion doping or ion implantation (ion implantation). May be. In this case, the concentration of the nickel element can be controlled.
[0058]
[Example 2]
This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. In the following, one pixel will be described, but many other (generally several hundred thousand) pixels are formed with the same structure. Needless to say, the P-channel type may be used instead of the N-channel type. Further, it can be used not only in the pixel portion of the liquid crystal display device but also in the peripheral circuit portion. It can also be used for image sensors and other integrated circuits. That is, as long as it is used with a thin film transistor, its application is not particularly limited.
[0059]
An outline of the manufacturing process of this example is shown in FIG. In this example, a Corning 7059 glass substrate (thickness 1.1 mm, 300 × 400 mm) was used as the substrate 201. First, a base film 203 (silicon oxide) is formed to a thickness of 2000 mm by a sputtering method. Thereafter, in order to selectively introduce nickel, a mask 203 is formed using a metal mask, a silicon oxide film, a photoresist, or the like. Then, a nickel silicide film is formed by sputtering. This nickel silicide film, by sputtering, formed to a thickness of thickness of 5 to 200 Å, for example, 20 Å. This nickel silicide film is represented by the chemical formula NiSi _x , 0.4 ≦ x ≦ 2.5, for example, x = 2.0. In this way, a nickel silicide film is selectively formed in the region 204.
[0060]
Thereafter, an amorphous silicon film 205 is formed to a thickness of 1000 mm by LPCVD or plasma CVD, dehydrogenated at 400 ° C. for 1 hour, and then crystallized by heat annealing. This annealing step was performed at 550 ° C. for 4 hours in a hydrogen reducing atmosphere (preferably, the hydrogen partial pressure was 0.1 to 1 atm). Further, this heat annealing step may be performed in an inert atmosphere such as nitrogen.
[0061]
In this annealing step, since a nickel silicide film is formed in a partial region (region 204) under the amorphous silicon film 205, crystallization occurs from this portion. During this crystallization, as shown by an arrow in FIG. 3B, silicon crystal growth proceeds in a direction perpendicular to the substrate 201 in the portion 204 where the nickel silicide film is formed. Further, as shown in the same arrows, in the region where the nickel silicide is not formed (a region other than the region 205), to the substrate, the crystal growth is performed in a direction parallel to. An annealing by the same lamp heating Example 1 This is followed by improvement in the crystallinity of the silicon film (densification).
[0062]
Thus, the semiconductor film 205 made of crystalline silicon can be obtained. Next, the semiconductor film 205 is patterned to form island-shaped semiconductor regions (TFT active layers). At this time, by setting the distance between the 204 part and nickel, channel formation region 209 is formed is introduced, it is possible to determine the concentration of nickel in the channel formation region 209. That is, if the distance is increased, the nickel concentration in the channel formation region 209 can be decreased, and if the distance is decreased, the nickel concentration in the channel formation region can be increased. Of course, in this case, it must be a region where the silicon film 205 is crystallized.
[0063]
Further tetraethoxysilane (TEOS) as a raw material by the plasma CVD method in an oxygen atmosphere, a gate insulating film of silicon oxide (thickness 700 to 1200 Å, typically 1000 Å) to form a 206. The substrate temperature is set to 400 ° C. or lower, preferably 200 to 350 ° C., in order to prevent the glass from shrinking or warping. Thereafter, lamp heating by infrared light irradiation is performed for 1 to 5 minutes in the same manner as in Example 1 to improve the interface characteristics between the semiconductor film 205 and the gate insulating film 206.
[0064]
Next, a gate electrode 207 is formed by forming a known silicon-based film by a CVD method and performing patterning. Thereafter, phosphorus is doped as an N-type impurity by ion implantation, and a source region 208, a channel formation region 209, and a drain region 210 are formed in a self-aligned manner. Then, irradiation with KrF laser light improves the crystallinity of the silicon film whose crystallinity has deteriorated due to ion implantation. At this time, the energy density of the laser beam is set to 250 to 300 mJ / cm ² . By this laser irradiation, the sheet resistance of the source / drain of this TFT becomes 300 to 800 Ω / cm ² . This step can also be performed by infrared lamp heating instead of using laser light.
[0065]
Thereafter, an interlayer insulator 211 is formed with silicon oxide, and further, the pixel electrode 212 is formed with ITO. Then, a contact hole is formed, and electrodes 213 and 214 are formed of a chromium / aluminum multilayer film in the source / drain region of the TFT, and one of the electrodes 213 is also connected to the ITO 212. Finally, annealing is performed in hydrogen at 200 to 300 ° C. for 2 hours to complete the hydrogenation of silicon. In this way, the TFT is completed. This process is simultaneously performed in many other pixel regions.
[0066]
In the TFT manufactured in this embodiment, a crystalline silicon film grown in the carrier flow direction is used as an active layer constituting a source region, a channel formation region, and a drain region. Since the carriers do not cross, that is, the carriers move along the crystal grain boundaries of the needle-like or columnar crystals, TFTs with high carrier mobility can be obtained. The TFT manufactured in this example was an N-channel type, and its mobility was 90 to 130 (cm ² / Vs). Compared with the movement of the N-channel TFT using the crystalline silicon film obtained by the conventional crystallization by thermal annealing at 600 ° C. for 48 hours, compared with 80-100 (cm ² / Vs), Is a significant improvement in properties.
[0067]
Further, when a P-channel TFT was manufactured by the same manufacturing method as in the above step and the mobility was measured, it was 80 to 120 (cm ² / Vs). Compared to the fact that the movement of the P-channel TFT using the crystalline silicon film obtained by the conventional crystallization by thermal annealing at 600 ° C. for 48 hours was 30 to 60 (cm ² / Vs). This is a great improvement in characteristics.
[0068]
Example 3
This embodiment is an example in which the source / drain is provided in the direction perpendicular to the crystal growth direction in the TFT shown in the second embodiment. That is, in this example, the carrier moves in a direction perpendicular to the crystal growth direction, and the carrier moves so as to cross the crystal grain boundary of the needle-like or columnar crystal. With such a configuration, the resistance between the source / drain can be increased. This is because the carriers must move so as to cross the crystal grain boundaries of the crystals that have grown into needles or columns. In order to realize the configuration of this embodiment, it is only necessary to set the direction in which the TFT is provided in the configuration shown in Embodiment 2.
[0069]
Example 4
In this embodiment, in the structure shown in Embodiment 2, the direction in which the TFT is provided (defined here by a line connecting the source / drain regions. That is, the direction of the TFT is determined by the direction in which carriers flow) is crystalline. The gist is to select the TFT characteristics by setting the crystal growth direction with respect to the substrate surface of the silicon film at an arbitrary angle.
[0070]
As described above, when carriers are moved in the crystal growth direction, the carriers move along the crystal grain boundaries, so that the mobility can be improved. On the other hand, when carriers are moved in a direction perpendicular to the crystal growth direction, the carriers must cross a large number of grain boundaries, so that the carrier mobility decreases.
[0071]
Therefore, by selecting between these two states, that is, by setting the angle between the crystal growth direction and the carrier movement direction in the range of 0 to 90 °, the carrier mobility can be controlled. . From another viewpoint, the resistance between the source / drain regions can be controlled by setting the angle between the crystal growth direction and the carrier moving direction. Of course, this configuration can also be used for the configuration shown in the first embodiment. In this case, the slit-like nickel slight addition region 100 shown in FIG. 2 rotates in the range of 0 to 90 °, and the angle between the crystal growth direction indicated by the arrow 105 and the line connecting the source / drain regions is 0 to 90. It will be selected in the range. When this angle is close to 0 °, the mobility can be increased and the electrical resistance between the source / drain can be reduced. When this angle is close to 90 °, the mobility is small and the resistance between the source and drain, that is, the resistance of the channel formation region can be large.
[0072]
Example 5
In this example, in the crystallization process of the non-single-crystal silicon semiconductor film of Example 1 or Example 2, after forming a silicon oxide film to which chlorine is added, crystallization is performed by lamp heating. In Example 1 or Example 2, a non-single crystal silicon film is first formed, and then the silicon film is crystallized by heating at 550 ° C. for 4 hours, and further, crystallinity is promoted and improved by lamp heating. there were. This embodiment is a further development of this process, and uses a gettering catalyst element for crystallization during lamp heating.
[0073]
In this embodiment, first, as described in Embodiments 1 and 2, a crystalline silicon film is formed by heating. This step is performed by heating annealing at about 550 degrees for about 4 hours by the action of a catalytic element (for example, nickel). Thereafter, a silicon oxide film to which chlorine is added is formed to a thickness of 1000 mm . Thereafter, lamp heating is performed through the silicon oxide film. The lamp heating conditions are the same as in the first embodiment. At this time, the crystallinity of the crystalline silicon film crystallized by the previous heating is improved (film densification proceeds), and the catalytic element for crystallization is caused by the action of chlorine in the silicon oxide film. Gettering is performed. Thus, a crystalline silicon film can be obtained in which the catalytic element is fixed and the catalytic element has a reduced influence on device operation.
[0074]
Thereafter, the silicon oxide film added with chlorine is removed to form a silicon oxide film for a gate insulating film. Subsequent processes are the same as those described in the first and second embodiments.
[0075]
Example 6
This example is an example in which, in the manufacturing process of Example 2 shown in FIG. 3, a nickel silicide film is formed on the entire surface of the base film 202 so that crystal growth is performed in a direction perpendicular to the substrate on the entire surface of the silicon film. is there. In manufacturing the TFT, a nickel silicide film is formed on the entire surface of the base film 202 without providing the mask 203, and thereafter, an amorphous silicon film 205 is formed as described in the second embodiment, followed by a crystallization process. A TFT is manufactured.
[0076]
The schematic cross section of the TFT of this embodiment is not different from that shown in FIG. 3D, but in the active layer in which the source / drain regions 208 and 210 and the channel formation region 209 are formed, needle-like or The growth direction of the columnar crystals is perpendicular to the substrate 201. For this reason, the carriers moving between the source region (208 or 210) and the drain region (210 or 208) move across the crystal grain boundary of the needle-like or columnar crystal. Therefore, the TFT has a slightly high resistance between the source and the drain. Such TFT is mobility is less 100 cm 2 / ^Vs, since the off current is small, an optimum format for pixel TFT of the liquid crystal display device intended to perform the charge retention.
[0077]
However, the TFT as in this embodiment has a problem in yield and reliability because it is difficult to control the nickel concentration in the active layer as described above. This problem can be improved by using a method that can control the amount of nickel introduced (for example, ion implantation).
[0078]
Example 7
In this example, crystallization is further promoted by ion implantation of a group 4 element in addition to a group 8 element which is a catalyst element for crystallization by heating. A manufacturing process of this embodiment will be described with reference to FIGS. Unless otherwise specified, the manufacturing conditions and film thickness in the individual manufacturing steps are the same as those described in Example 1.
[0079]
First, a base film (silicon oxide film) is formed on the glass substrate 101, and further a mask 103 is formed, and a group 8 element (here, nickel) which is a catalyst element for crystallization is selectively exposed as a thin film. 100 regions are formed. Next, the mask 103 is removed, and a non-single crystal silicon film, here an amorphous silicon film 104, is formed by plasma CVD. Next, silicon which is a group 4 element is implanted into the entire surface by ion implantation. At this time, the projected range is set on the substrate side in the vicinity of the interface between the silicon film 104 and the base film 102. The acceleration voltage for ion implantation is 60 kV, and the dose is 2 × 10 ¹⁵ cm ⁻² . As a result, the amorphization is thoroughly performed mainly in the vicinity of the interface between the substrate (including the base film) and the amorphous silicon film 104, and the existence of crystallization nuclei can be eliminated as much as possible.
[0080]
The reason why the Group 4 element is used is that it is an impurity that is electrically neutral with respect to silicon. As this Group 4 element, C, Si, Ge, Sn, and Pb can be used, but Si, Ge, and Sn are particularly preferable. The dose may be 5 × 10 ^{14 to} 5 × 10 ¹⁶ ions cm ⁻² .
[0081]
Thereafter, the amorphous silicon film 104 is crystallized by heating at 550 ° C. for 4 hours. At this time, crystal growth occurs in the direction parallel to the substrate as indicated by the arrow 105 from the region 100. This crystal growth is performed in a needle shape or a column shape. During the crystal growth, the crystal component that becomes the nucleus of crystal growth centering on the interface between the substrate and the amorphous silicon film (the crystal component exists as a matter of degree even if it is an amorphous silicon film). Therefore, the crystal growth performed in the direction parallel to the substrate from the region 100 is not hindered by the crystal growth generated from the interface between the silicon film 104 and the base film 102, and thus the orientation is not affected. It is possible to perform crystal growth with good properties, that is, with a uniform crystal growth direction.
[0082]
Thereafter, as described in the first embodiment, PTFT and NTFT are formed to complete a complementary TFT circuit. As in this example, in a crystalline silicon film with good orientation, when a TFT is formed so that the crystal growth direction and the carrier movement direction are aligned, the carrier moves along the crystal grain boundary. , The structure can hardly be affected by the grain boundary during the movement. That is, high speed operation can be obtained. For example, the mobility of NTFT formed by the process shown in Example 1 was 90 to 130 cm ² / Vs on average, but silicon ions were implanted prior to crystallization by heating as in this example. The thing of 150-170 cm < ² > / Vs was able to be obtained.
[0083]
In this example, the crystallinity was further improved, and a TFT having a high mobility was obtained in the crystal growth in the direction parallel to the substrate from the introduction region of nickel which is a group 8 element. It is considered that the crystal growth in the direction parallel to the substrate was preferentially performed because the crystal component that promotes the crystal growth in the vertical direction to the substrate that hinders the growth was thoroughly removed in advance. In particular, it is considered effective to thoroughly amorphize the vicinity of the interface between the silicon film and the substrate where crystal nuclei exist when the crystal is grown in a columnar shape in a direction perpendicular to the substrate.
[0084]
Example 8
In this example, in an active liquid crystal display device, a peripheral driver circuit is crystallized by the catalytic action of nickel which is a group 8 element, and the TFT is shown as a manufacturing process in Example 1 or Example 2, and a pixel is formed. This is an example in which the TFT provided in the portion is constituted by a TFT using known amorphous silicon (amorphous silicon).
[0085]
As is well known, in an active liquid crystal display device, a TFT in a peripheral driver circuit portion has a high mobility (100 cm ² / Vs or more), and a TFT capable of flowing a large amount of on-current is required. The TFT provided in the portion is required to have a relatively small mobility (about 10 cm ² / Vs) in order to avoid a malfunction due to a small off-state current and light irradiation for charge retention.
[0086]
This requirement is satisfied to some extent by forming the peripheral circuit portion with the TFT described in the first and second embodiments and forming the pixel portion with a TFT (a-Si TFT) using a known amorphous silicon film. Is done. However, a TFT using an amorphous silicon film has a mobility of 1 cm ² / Vs or less, so that a problem remains in that respect.
[0087]
Example 9
This embodiment is a further development of the embodiment 8, and the TFT in the peripheral circuit portion is composed of the TFT having a high mobility of 100 cm ² / Vs or more shown in the embodiment 1 or 2, and the pixel This is an example in which the TFT of the portion is constituted by the TFT shown in the sixth embodiment.
[0088]
In the TFT shown in Example 6, crystal growth is performed in a direction perpendicular to the substrate so that the crystal grain boundaries are perpendicular to the carrier flow so that the carriers cross many crystal grain boundaries. This is a TFT configured as follows. In such a TFT, since the carrier movement is hindered by the crystal grain boundary, the mobility is lowered. However, since the off-state current becomes small, the charge retention rate can be increased, which is suitable as a pixel TFT. However, when nickel is introduced as a thin film as shown in Example 1 or Example 2, its reproducibility is poor, and the mobility obtained is close to 100 cm ² / Vs. The pixel TFT is over-spec.
[0089]
Therefore, in this embodiment, depending on the use of the ion implantation method which can be introduced by controlling the concentration of nickel, solves cents above problems. First, the problem of reproducibility of nickel concentration in the film is solved by using the ion implantation method. Furthermore, by lowering the nickel concentration in the film, the crystallinity can be made somewhat worse and the mobility can be lowered. Of course, in order to lower the mobility, a method of artificially introducing oxygen or nitrogen into the channel region or the source / drain region, the doping amount of the impurity imparting the conductivity type doped in the source / drain region, or the activity thereof is reduced. A method of increasing the resistance of the source / drain region by simplifying the formation process, a method of making the channel a reverse conductivity type weaker than that of the source / drain, and separating the contact hole of the source / drain (ie, the source / drain region) A method for increasing the resistance between the source and the drain, such as a method using a sheet resistance of the above, may be used.
[0090]
As described above, this embodiment uses a method of injecting nickel, which is a catalytic element for crystallizing a silicon film, into the amorphous silicon film by an ion implantation method. Injecting nickel into the entire surface at a low concentration, further injecting it into the peripheral circuit portion at a higher concentration, and further forming a TFT in the pixel portion using a crystalline silicon film grown in a direction perpendicular to the substrate, In the peripheral circuit portion, a TFT is formed using a crystalline silicon film crystal-grown parallel to the substrate. By adopting such a configuration, a TFT having a low off-current with a mobility of about 10 to 50 cm ² / Vs in the pixel portion, and a large on-current with a mobility of 100 cm ² / Vs or more in the peripheral circuit portion. A TFT capable of flowing can be obtained.
[0091]
Further, if only the peripheral circuit portion is to be increased in mobility, the neutral element ion implantation as shown in the embodiment 7 may be used in that region together.
[0092]
【effect】
When a non-single crystal silicon semiconductor film having crystallinity that is provided on a substrate and grown in a direction parallel to the substrate surface is used for a TFT, the crystal growth is performed in the direction of the flow of carriers moving in the TFT. By combining with the above direction, the carrier can move along (in parallel) the crystal grain boundary of the crystal grown in a needle shape or column shape, and a TFT having high mobility can be obtained. . Furthermore, since these TFTs can be formed at a low temperature of 600 ° C. or less, an inexpensive glass substrate can be used as the substrate.
[0093]
In addition, TFTs having the required mobility can be selectively made. In particular,
1. Using a crystalline silicon film grown in a direction parallel to the substrate, a TFT is manufactured so that carriers move in a direction along the crystal grain boundary.
2. Using a crystalline silicon film crystal-grown in a direction parallel to the substrate, a TFT is manufactured so that carriers move across the crystal grain boundary.
3. A TFT is formed in a region where the crystal has grown in a direction perpendicular to the substrate.
4). By selectively introducing a catalytic element for crystallization, a crystalline silicon film is selectively formed, and by using the crystalline silicon film, a TFT in a specific portion is made a high mobility TFT. .
In particular, since the crystalline silicon film in a region away from the region where the catalytic element for crystallization is introduced has a one-dimensional orientation, the one-dimensional direction and the direction in which carriers move are determined. By roughly matching, a semiconductor device in which carriers have high mobility can be obtained. In particular, by utilizing this structure the channel forming region of the insulating gate site type field effect transistor, it is possible to obtain a TFT having a high speed response.
[Brief description of the drawings]
FIG. 1 shows a manufacturing process of an example.
FIG. 2 shows an outline of an embodiment.
FIG. 3 shows a manufacturing process of the example.
FIG. 4 shows the concentration of a metal element.
[Explanation of symbols]
101 glass substrate 102 base film (silicon oxide film)
103 Mask 104 Silicon film 105 Direction of crystallization 106 Gate insulating film 107 Gate electrode 108 Anodized layer 109 Gate electrode 110 Anodized layer 111 Source / drain region 112 Channel formation region 113 Drain / source region 114 Source / drain region 115 Channel formation Region 116 Drain / source region 117 Electrode 118 Interlayer insulator 120 Electrode 119 Electrode 201 Glass substrate 202 Base film (silicon oxide film)
203 Mask 204 Nickel Trace Addition Region 205 Silicon Film 206 Gate Insulation Film 207 Gate Electrode 208 Source / Drain Region 209 Channel Formation Region 210 Drain / Source Region 211 Interlayer Insulator 213 Electrode 214 Electrode 212 ITO (Pixel Electrode)

Claims (31)

A non-single crystal semiconductor film is formed on a glass substrate,
Nickel element is added in a rectangular shape to a part of the non-single crystal semiconductor film,
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is grown from where the nickel element is added to where the nickel element is not added, thereby forming a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
After irradiating the laser beam , the crystalline semiconductor film formed by crystal growth from the rectangular long side of the non-single-crystal semiconductor film to which the nickel element is added is patterned to form an island-shaped semiconductor film. Forming ,
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
Since the rectangular long side of the non-single-crystal semiconductor film is larger than the channel width of the island-shaped semiconductor film, the patterning includes a moving direction of carriers moving between the source region and the drain region, The method for manufacturing a semiconductor device is performed so that the crystal growth direction of the source region, the drain region, and the channel formation region is along. A non-single crystal semiconductor film is formed on a glass substrate,
Nickel element is added in a rectangular shape to a part of the non-single crystal semiconductor film,
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is grown from where the nickel element is added to where the nickel element is not added, thereby forming a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
After irradiation with the infrared light , the crystalline semiconductor film formed by crystal growth from the rectangular long side of the non-single-crystal semiconductor film to which the nickel element is added is patterned to form an island-shaped semiconductor Forming a film ,
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
Since the rectangular long side of the non-single-crystal semiconductor film is larger than the channel width of the island-shaped semiconductor film, the patterning includes a moving direction of carriers moving between the source region and the drain region, The method for manufacturing a semiconductor device is performed so that the crystal growth direction of the source region, the drain region, and the channel formation region is along. A non-single crystal semiconductor film is formed on a glass substrate,
On the non-single crystal semiconductor film, forming a mask that exposes a part of the surface of the non-single crystal semiconductor film in a rectangular shape ,
Adding nickel element to the exposed surface of the non-single crystal semiconductor film;
Wherein by heating the non-single-crystal semiconductor film, wherein the non-single crystal semiconductor film the nickel element is either et crystal growth was been added to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
After the irradiation with the laser light, wherein the nickel element is added non-single-crystal semiconductor film the rectangular-shaped crystalline semiconductor film is patterned island-shaped semiconductor film which is formed by crystal growth from the long sides of Form the
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
The rectangular long side of the non-single-crystal semiconductor film is larger than the channel width of the island-shaped semiconductor film, so that the movement direction of carriers moving between the source region and the drain region, the source region, the method for manufacturing a semiconductor device, characterized in that said crystal growth direction of the drain region and the channel forming region is performed so along. A non-single crystal semiconductor film is formed on a glass substrate,
On the non-single crystal semiconductor film, forming a mask that exposes a part of the surface of the non-single crystal semiconductor film in a rectangular shape ,
Adding nickel element to the exposed surface of the non-single crystal semiconductor film;
Wherein by heating the non-single-crystal semiconductor film, wherein the non-single crystal semiconductor film the nickel element is either et crystal growth was been added to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
After irradiation with the infrared light , the crystalline semiconductor film formed by crystal growth from the rectangular long side of the non-single-crystal semiconductor film to which the nickel element is added is patterned to form an island-shaped semiconductor Forming a film ,
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
Since the long side of the rectangular shape of the non-single-crystal semiconductor film is larger than the channel width of the island-shaped semiconductor film, the patterning includes a moving direction of carriers moving between the source region and the drain region, The method for manufacturing a semiconductor device is performed so that the crystal growth direction of the source region, the drain region, and the channel formation region is along. A non-single crystal semiconductor film is formed on a glass substrate,
On the non-single crystal semiconductor film, forming a mask that exposes a part of the surface of the non-single crystal semiconductor film in a slit shape,
Adding nickel element to the surface of the non-single-crystal semiconductor film exposed in a slit shape;
Wherein by heating the non-single-crystal semiconductor film, wherein the non-single crystal semiconductor film the nickel element is either et crystal growth was been added to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
After the irradiation with the laser light, wherein the nickel element is added non-single-crystal semiconductor film said slit-like crystalline semiconductor film is patterned island-shaped semiconductor film which is formed by crystal growth from the long sides of Form the
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
Since the slit-like long side of the non-single-crystal semiconductor film is larger than the channel width of the island-like semiconductor film, the patterning includes a moving direction of carriers moving between the source region and the drain region, The method for manufacturing a semiconductor device is performed so that the crystal growth direction of the source region, the drain region, and the channel formation region is along. A non-single crystal semiconductor film is formed on a glass substrate,
On the non-single crystal semiconductor film, forming a mask that exposes a part of the surface of the non-single crystal semiconductor film in a slit shape,
Adding nickel element to the surface of the non-single-crystal semiconductor film exposed in a slit shape;
Wherein by heating the non-single-crystal semiconductor film, wherein the non-single crystal semiconductor film the nickel element is either et crystal growth was been added to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
After irradiation with the infrared light , the crystalline semiconductor film formed by crystal growth from the slit-like long side of the non-single-crystal semiconductor film to which the nickel element is added is patterned to form an island-shaped semiconductor Forming a film ,
Forming a source region, a drain region and a channel formation region in the island-shaped semiconductor film ;
Since the slit-like long side of the non-single-crystal semiconductor film is larger than the channel width of the island-like semiconductor film, the patterning includes a moving direction of carriers moving between the source region and the drain region, The method for manufacturing a semiconductor device is performed so that the crystal growth direction of the source region, the drain region, and the channel formation region is along. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single crystal semiconductor film, the non-single crystal semiconductor film is grown in a vertical direction from an upper surface of the non-single crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
Patterning the crystalline semiconductor film irradiated with the laser beam;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A method for manufacturing a semiconductor device, wherein a thin film transistor is formed using the source region, the drain region, and the channel formation region. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single crystal semiconductor film, the non-single crystal semiconductor film is grown in a vertical direction from an upper surface of the non-single crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
Patterning the crystalline semiconductor film irradiated with the infrared light;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A method for manufacturing a semiconductor device, wherein a thin film transistor is formed using the source region, the drain region, and the channel formation region. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is vertically grown in a columnar shape from the upper surface of the non-single-crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
Patterning the crystalline semiconductor film irradiated with the laser beam;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A method for manufacturing a semiconductor device, in which a thin film transistor is formed using the source region, the drain region, and the channel formation region. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is vertically grown in a columnar shape from the upper surface of the non-single-crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
Patterning the crystalline semiconductor film irradiated with the infrared light;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A method for manufacturing a semiconductor device, wherein a thin film transistor is formed using the source region, the drain region, and the channel formation region. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single crystal semiconductor film, the non-single crystal semiconductor film is grown in a vertical direction from an upper surface of the non-single crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
Patterning the crystalline semiconductor film irradiated with the laser beam;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film ;
Before SL source region, and forming a thin film transistor using the drain region and the channel forming region,
Carrier to move between the said source region a drain region, said source region, in said drain region and the channel forming region, a method for manufacturing a semiconductor device, characterized in that cross the crystal grain boundary of the crystalline semiconductor film. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single crystal semiconductor film, the non-single crystal semiconductor film is grown in a vertical direction from an upper surface of the non-single crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
Patterning the crystalline semiconductor film irradiated with the infrared light;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film ;
Before SL source region, and forming a thin film transistor using the drain region and the channel forming region,
Carrier to move between the said source region a drain region, said source region, in said drain region and the channel forming region, a method for manufacturing a semiconductor device, characterized in that cross the crystal grain boundary of the crystalline semiconductor film. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is vertically grown in a columnar shape from the upper surface of the non-single-crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with laser light,
Patterning the crystalline semiconductor film irradiated with the laser beam;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A thin film transistor is formed using the source region, the drain region, and the channel formation region,
A method for manufacturing a semiconductor device, wherein carriers moving between the source region and the drain region cross a crystal grain boundary of the crystalline semiconductor film in the source region, the drain region, and the channel formation region. A non-single crystal semiconductor film is formed on a glass substrate,
Adding nickel element to the entire upper surface of the non-single crystal semiconductor film;
By heating the non-single-crystal semiconductor film, the non-single-crystal semiconductor film is vertically grown in a columnar shape from the upper surface of the non-single-crystal semiconductor film to form a crystalline semiconductor film,
Irradiating the crystalline semiconductor film with infrared light,
Patterning the crystalline semiconductor film irradiated with the infrared light;
Forming a source region, a drain region and a channel formation region in the patterned crystalline semiconductor film;
A thin film transistor is formed using the source region, the drain region, and the channel formation region,
A method for manufacturing a semiconductor device, wherein carriers moving between the source region and the drain region cross a crystal grain boundary of the crystalline semiconductor film in the source region, the drain region, and the channel formation region. 15. The method for manufacturing a semiconductor device according to claim 7, wherein the thin film transistor is a thin film transistor for a pixel. 15. The method for manufacturing a semiconductor device according to any one of claims 2, 4, 6, 8 , 10 , 12, and 14 , wherein the wavelength of the infrared light is 0.5 to 3.5 [mu] m. In any one of claims 1 to 16, a method for manufacturing a semiconductor device addition of the nickel element is characterized by being carried out by ion doping or ion implantation. In any one of claims 1 to 16, a method for manufacturing a semiconductor device addition of the nickel element is characterized in that it is carried out by forming a film containing nickel. 19. The method for manufacturing a semiconductor device according to claim 18 , wherein the film containing nickel element is made of nickel silicide. 20. The method for manufacturing a semiconductor device according to claim 19 , wherein the nickel silicide is represented by a chemical formula NiSix (0.4 ≦ x ≦ 2.5). In any one of claims 1 to 20, a method for manufacturing a semiconductor device, which comprises activated by irradiation with a laser beam after forming the source region and the drain region, the source region and the drain region. In any one of claims 1 to 20, a method for manufacturing a semiconductor device comprising the after forming a source region and a drain region, be activated by irradiation with infrared light on the source region and the drain region. In any one of claims 1 to 22, wherein the heating of the non-single crystal semiconductor film, a method for manufacturing a semiconductor device, which comprises carrying out in an inert atmosphere. In any one of claims 1 to 22, wherein the heating of the non-single-crystal semiconductor film, a method for manufacturing a semiconductor device, which comprises carrying out in a nitrogen atmosphere. In any one of claims 1 to 24, a method for manufacturing a semiconductor device, wherein the content of the nickel element in the crystalline semiconductor film is 2 × 10 ^{1 9} cm ^-3 or less. In any one of claims 1 to 24, a method for manufacturing a semiconductor device, wherein the content of the nickel element in the crystalline semiconductor film is 1 × 10 ¹⁷ cm ^-3 or less. 27. The method for manufacturing a semiconductor device according to claim 1, wherein the non-single-crystal semiconductor film is an amorphous silicon film. In any one of claims 1 to 27, wherein the crystalline semiconductor film is a method for manufacturing a semiconductor device characterized by comprising a crystalline silicon film. The semiconductor device manufactured by the method according to any one of claims 1 to 28. 30. The semiconductor device according to claim 29 , wherein the semiconductor device is an active matrix display device. 30. The semiconductor device according to claim 29 , wherein the semiconductor device is an image sensor.

Images