JP3431851B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate such as glass and a method for manufacturing the semiconductor device.

[0002]

2. Description of the Related Art As a semiconductor device having TFTs on an insulating substrate such as glass, active type liquid crystal display devices and image sensors using these TFTs for driving pixels are known.

Thin film silicon semiconductors are generally used for TFTs used in these devices. The thin-film silicon semiconductor is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low manufacturing temperature, can be relatively easily manufactured by the vapor phase method, and have high mass productivity. Since it is inferior to the silicon semiconductors it has,
In order to obtain higher speed characteristics in the future, establishment of a method for manufacturing a TFT made of a crystalline silicon semiconductor has been strongly demanded. As the crystalline silicon semiconductor, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, semi-amorphous silicon having an intermediate state between crystalline and amorphous are known. .

As a method for obtaining these thin film silicon semiconductors having crystallinity, (1) a film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed and crystallized by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallized by applying heat energy. The method is said to be known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor physical properties over the entire surface of the substrate, and since the film forming temperature is as high as 600 ° C. or more, it is inexpensive. There was also a cost problem that the glass substrate could not be used. Also, (2)
In the case of the most commonly used excimer laser, the method of (1) has a problem that throughput is low because the irradiation area of the laser beam is small, and the entire surface of a large area substrate is uniformly processed. The laser is not stable enough, and there is a strong sense that it is a next-generation technology. (3)
The method (1) has an advantage of being able to handle a large area as compared with the methods (1) and (2), but it is still necessary to set the heating temperature to a high temperature of 600 ° C. or higher, and an inexpensive glass substrate is used. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of current liquid crystal display devices, the screen size is increasing, and therefore it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in the heating step, which is indispensable for semiconductor fabrication, lowers the accuracy of mask alignment and the like, which is a serious problem. Particularly, in the case of 7059 glass which is most commonly used at present, the strain point is 593 ° C., and the conventional heat crystallization method causes a large deformation. In addition to the problem of temperature, in the present process, the heating time required for crystallization reaches several tens of hours or more, so it is necessary to further shorten the heating time.

[0005]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method of manufacturing a thin film of a crystalline silicon semiconductor using a method of crystallizing a thin film of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. Its purpose is to provide a process that achieves both. Of course, the crystalline silicon semiconductor manufactured by using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technique and can be used for the active layer region of the TFT. It goes without saying that there is.

BACKGROUND OF THE INVENTION The inventors of the present invention form an amorphous silicon semiconductor film by the CVD method or the sputtering method, and crystallize the film by heating, as described in the section of the conventional technique. Regarding the method, the following experiments and consideration were performed.

First, as an experimental fact, when an amorphous silicon film was formed on a glass substrate and the mechanism of crystallizing this film by heating was examined, crystal growth started from the interface between the glass substrate and amorphous silicon. It was confirmed that when the film thickness exceeds a certain level, it progresses in a columnar shape perpendicular to the substrate surface.

According to the above phenomenon, a crystal nucleus (a seed which is a basis of crystal growth) which is a basis of crystal growth exists at the interface between the glass substrate and the amorphous silicon film, and a crystal grows from the nucleus. It is considered that it is due to going. Such crystal nuclei are
It is considered to be a trace amount of impurity metal elements present on the substrate surface or crystal components on the glass surface (so-called crystallized glass is believed to contain silicon oxide crystal components on the glass substrate surface). To be

Therefore, it is thought that the crystallization temperature can be lowered by more positively introducing the crystal nuclei, and in order to confirm the effect, a small amount of another metal is formed on the substrate, An experiment was conducted to form a thin film of amorphous silicon on the top and then perform heat crystallization. As a result, a decrease in crystallization temperature was confirmed when several metals were formed on the substrate, and it was expected that crystal growth with foreign particles as crystal nuclei occurred. Therefore, the mechanism of a plurality of impurity metals that could be lowered in temperature was investigated in more detail.

Crystallization can be considered by dividing it into two stages: initial nucleation and crystal growth from the nuclei. Here, the initial nucleation rate is observed by measuring the time until a point-like fine crystal is generated at a constant temperature, and this time is any value in the thin film on which the impurity metal is formed. The case was shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. And, unexpectedly, the growth of crystal grains after nucleation was examined by changing the heating time, and it was found that after depositing a certain metal, the amorphous silicon thin film deposited on it was deposited. In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism is not clear at present, but it is speculated that some catalytic effect is working.

In any case, due to the above two effects, it has not been possible in the past to form a small amount of a certain kind of metal on a thin film of amorphous silicon and then heat crystallization. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or lower for about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and the material selected by us is nickel. In addition, as a metal element having a catalytic action for this crystallization, Fe,
Co, Pd, and Pt can be mentioned.

To give an example of the effect of nickel, there is no treatment, that is, on a substrate on which a very small amount of nickel thin film has not been formed (Corning 70).
59 glass) to be crystallized by heating a thin film of amorphous silicon formed by plasma CVD in a nitrogen atmosphere, when the heating temperature is 600 ° C.,
Although a heating time of 10 hours or more was required, when a thin film made of amorphous silicon on a substrate on which a small amount of nickel thin film was formed was used, similar crystallization was achieved by heating for about 4 hours. I was able to get the status. In addition, Raman spectroscopy spectrum was utilized for the judgment of crystallization at this time. From this alone, it can be seen that the effect of nickel is very large.

[0013]

[Means for Solving the Problems] As can be seen from the above description,
When a thin film of amorphous silicon is formed after a thin film of nickel is formed, the crystallization temperature can be lowered and the time required for crystallization can be shortened. Therefore, on the premise that this process is used for manufacturing a TFT, a more detailed description will be added. As will be described later in detail, since the nickel thin film has the same effect not only on the substrate but also on the amorphous silicon, and because it was the same in the ion implantation, the present specification Then, this series of treatments will be referred to as "addition of a small amount of nickel".

First, a method of adding a small amount of nickel will be described. To add a small amount of nickel, a method of forming a small amount of nickel thin film on a substrate and then forming amorphous silicon
The method of forming amorphous silicon first and then forming a small amount of nickel thin film on top of it also has the same effect of lowering the temperature. The film forming method is spin coating, vapor deposition, or spin coating. It has been proved that either a coating method or a coating method can be used, and the film forming method does not matter. However, when forming a small amount of nickel thin film on a substrate, rather than forming a small amount of nickel thin film directly on the 7059 glass substrate, a thin film of silicon oxide is formed on the same substrate The effect is more remarkable when a thin nickel thin film is formed. The possible reason for this is that direct contact between silicon and nickel is important for this low temperature crystallization, and in the case of 7059 glass, components other than silicon impede the contact or reaction between the two. It may be that it is.

Further, as a method of adding a trace amount, it was confirmed that substantially the same effect was obtained by adding nickel by ion implantation, in addition to forming a thin film on or below the amorphous silicon. The amount of nickel is 1 × 10 ¹⁵ ato
It has been confirmed that the addition of the amount of ms / cm ³ or more lowers the temperature. However, at the amount of addition of 10 ²¹ atoms / cm ³ atoms / cm ³ or more, the peak shape of the Raman spectrum is different from that of silicon alone. Since it is clearly different, 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 is actually usable.
It is considered to be in the range of × 10 ¹⁹ atoms / cm ³ .
When the concentration of nickel is 1 × 10 ¹⁵ atoms / cm ³ or less, nickel element is localized and the function as a catalyst deteriorates. The nickel concentration is 5 × 10 ¹⁹ atoms /
If it is ³ cm ³ or more, it becomes a NiSi compound and the semiconductor characteristics are lost. In the crystallized state, the lower the nickel concentration, the more usable as a semiconductor. From the above consideration, as a semiconductor,
Considering use in an active layer of a TFT or the like, this amount is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ¹⁹ atoms.
It is necessary to keep it to / cm ³ .

Next, the crystal morphology in the case of adding a small amount of nickel will be described. As described above, when nickel is not added, nuclei are randomly generated from the crystal nuclei at the substrate interface, etc., and the crystal growth from the nuclei is also random up to a certain film thickness. It is known that columnar crystal growth in which the (110) direction is perpendicular to the substrate is performed, and of course almost uniform crystal growth is observed over the entire thin film. On the other hand, the small amount of nickel added this time had a feature that the crystal growth was different between the nickel-added region and the vicinity thereof. That is, in the nickel-added region, the added nickel or its compound with silicon serves as crystal nuclei, and columnar crystals grow almost perpendicularly to the substrate similarly to the case where nickel is not added. It became clear from the micrograph. Then, crystallization at low temperature was confirmed even in a region in which a small amount of nickel was not added in the vicinity thereof, and in that part, needle-like or columnar crystals were arranged in the (111) direction perpendicular to the substrate and parallel to the substrate. An unusual crystal growth of growing was observed. It is observed that crystal growth in the lateral direction parallel to the substrate grows up to several hundreds of μm in a large region from the region where a small amount of nickel is added, and the growth amount increases in proportion to the increase in time and temperature. I knew that I would do it. As an example, a growth of about 40 μm was observed at 550 ° C. for 4 hours. Moreover, according to the transmission electron microscope photograph, it has been found that all the crystals in the large lateral direction are single crystal-like. The nickel concentration in the trace amount of nickel added portion, the lateral growth portion in the vicinity thereof, and the distant amorphous portion (the low temperature crystallization is not performed in the distant portion, the amorphous portion remains)
When examined by IMS (Secondary Ion Mass Spectroscopy), the lateral growth portion was detected to be about one digit smaller than the nickel trace addition portion, and diffusion in amorphous silicon was observed.
In addition, the amorphous portion was observed to be smaller by about one digit.
The relationship between this and crystal morphology is not clear at present, but in any case, it is possible to form a silicon thin film having crystallinity of a desired crystal morphology in a desired portion by controlling the amount of nickel added and its position control. is there.

Next, the electrical characteristics of the above-mentioned trace amount nickel addition portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the portion with a small amount of nickel added are about the same as those of the film with almost no nickel added, that is, the values obtained by crystallization at about 600 ° C. for several tens of hours. When the activation energy was calculated from the property, the addition amount of nickel was 10 ¹⁷ atoms / cm ³ to 10 ¹⁸ a.
When it was set to about toms / cm ^3, no behavior that could be attributed to the nickel level was observed. That is, if limited to this fact, when the concentration of nickel in the crystalline silicon semiconductor film is 10 ¹⁸ atoms / cm ³ or less, it is inconvenient to manufacture a semiconductor device such as a TFT using this film. You can see that there is no.

On the other hand, the lateral growth portion has a conductivity higher than that of the nickel trace addition portion by one digit or more, and has a considerably high value as a crystalline silicon semiconductor. This is considered to be due to the fact that there was little or no grain boundaries existing during the passage of electrons between the electrodes because the current path direction was aligned with the lateral growth direction of the crystal,
It is consistent with the result of the transmission electron micrograph.

However, when the laterally grown portion of the crystal is observed in detail by a transmission electron microscope photograph, even if the crystal direction of the needle-like or columnar crystal is parallel to the substrate surface, it is observed from above the substrate. As a result, a branching portion was observed. That is, on average, although needle-like or columnar crystals grew in the same direction, it was observed that some crystals were branched and grown in an oblique direction.

As a result of considering the above observation results, the present inventors have reached the following conclusions. The crystal component of the substrate material and the crystal component in the semiconductor film existing in the substrate and in the vicinity of the interface between the substrate and the semiconductor film can serve as nuclei for crystal growth. It hinders the crystal growth in such directions and promotes random crystal growth.

Therefore, in the present invention, the crystal at the interface between the substrate in the region where the crystal is grown and the amorphous silicon semiconductor film (the crystal component exists as a matter of degree even if it is amorphous) and the vicinity thereof. The components are removed as much as possible by ion implantation of an inactive element and thoroughly amorphized. Then, in the state where there is no component to be a crystal nucleus, crystal growth is performed in the lateral direction (direction parallel to the substrate surface),
The gist is to perform needle-like or columnar crystal growth in which the crystal growth directions are uniform. In particular, by implanting inert ions mainly inside the substrate, the substrate surface (in the case where a substrate film is formed on the substrate surface, the substrate film surface is regarded as the substrate surface), and the substrate It is characterized in that the interface with the semiconductor film, and further the semiconductor film itself is thoroughly amorphized to remove as much as possible a crystalline component that can serve as a nucleus during crystallization.

In this way, a crystalline silicon film can be obtained by selective crystallization, but if the characteristics of such a crystalline silicon film are further improved,
After the crystallization step, a laser or intense light equivalent thereto may be irradiated to crystallize the insufficiently crystallized component remaining in the grain boundary or the like. In this step, the remaining amorphous component grows with the crystal formed by the previous heating step as a nucleus and the grain boundary disappears, so that higher characteristics can be obtained.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below with reference to Examples.

[0024]

[Embodiment 1] In this embodiment, a circuit in which a P channel type TFT (referred to as PTFT) using crystalline silicon and an N channel type TFT (referred to as NTFT) are combined in a complementary type is formed on a glass substrate. This is an example. The configuration of this embodiment can be used for a peripheral driver circuit and an image sensor of an active liquid crystal display device.

FIG. 1 shows a sectional view of the manufacturing process of this embodiment. First, a base film 102 of silicon oxide having a thickness of 2000 Å is formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a silicon oxide film 103 to be a mask is provided. The silicon oxide film 103 exposes the base film 102 in a slit shape, and needs to have a thickness of 1000 Å or more. It is also useful to add a material having a gettering effect, such as phosphorus or chlorine, to the mask 103. When this state is viewed from above, the underlying film 102 is exposed in a slit shape and the other portions are masked.

After the silicon oxide film 103 is provided, the thickness is 5 to 200Å, for example, 20Å by the sputtering method.
Nickel silicide film (chemical formula NiSi _x , 0.4 ≦ x ≦
2.5, for example, x = 2.0) 98 is selectively formed in the region of 100. That is, the trace amount of nickel is selectively added to the region indicated by 100. (Fig. 1 (A))

Next, the silicon oxide film 103 as a mask is removed, and a thickness of 500 to 1 is formed by plasma CVD.
An intrinsic (I-type) amorphous silicon film 104 of 500 Å, for example, 1000 Å is formed. The amorphous silicon film 104 may be a film having crystallinity. That is, any non-single crystal silicon film may be used. Further, a silicon oxide film 99 serving as a protective film is formed by 10
The film is formed to a thickness of 0 to 1000Å. This silicon oxide film is
It is provided in order to prevent the surface of the silicon film 104 from being damaged during the subsequent ion implantation.

Then, the entire surface of the silicon film 104 is implanted with silicon ions, which are inactive elements. The implantation of silicon ions is performed in order to perform crystal growth in a uniform direction in a subsequent thermal annealing step, and therefore a substrate (which is considered to be the substrate including the base film 102 here) that exists in advance and an amorphous silicon semiconductor are used. This is for removing crystal components (silicon oxide crystal component in the substrate and crystal component in the amorphous semiconductor film) at the interface with the film.

The conditions for this silicon ion implantation are set so that the dose is as shown in FIG. In FIG. 5, a portion indicated by a dotted line is an interface portion between the base film 102 and the amorphous silicon film 104. The maximum dose amount was 5 × 10 ¹⁴ cm ^-2 on the substrate side.
During the implantation of silicon ions, the amorphous silicon film 1 is centered on the interface between the base film 102 (here, the base film 102 constitutes the substrate surface) and the amorphous silicon film 104.
04 itself, the interface between the amorphous silicon film 104 and the silicon oxide film 99, and the vicinity thereof are amorphized. The dose of silicon ions is preferably 1 × 10 ^{14 to} 9 × 10 ¹⁶ cm ^-2 .

In the step of implanting silicon ions, the surface of the amorphous silicon film is covered with the silicon oxide film 99.
The damage of accelerated ions can be reduced. It is also useful to form a mask on this region in order to prevent silicon ions from being implanted into the region of 100 where a small amount of nickel has been added. This is to prevent unnecessary diffusion of nickel element during ion implantation.

Then, the silicon oxide silicon film 99 is removed,
In a hydrogen reducing atmosphere (preferably, the partial pressure of hydrogen is 0.1 to
55 at 1 atmosphere) or nitrogen atmosphere (atmospheric pressure)
The amorphous silicon film 104 is crystallized by annealing at 0 ° C. for 4 hours. At this time, in the region 100 where the nickel silicide film is selectively formed, the crystallization of the silicon film 104 occurs in the direction perpendicular to the substrate 101. Then, the area 100
In areas other than the area 100, as shown by an arrow 105,
Crystal growth is performed in the lateral direction (direction parallel to the substrate). The crystallization temperature can be in the range of 450 ° C. to 700 ° C., but if it is high, the problem of heat resistance of the glass substrate arises as in the conventional case.

In the region where the crystal growth in the lateral direction is performed, the interface between the base film 102 and the silicon film 104 and its vicinity, and further the amorphous silicon film itself is thoroughly amorphized. In the crystallization shown by the arrow 105, there is no crystal component that disturbs the crystallization direction,
Uniform lateral growth can be achieved.

As a result of the above process, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. Thereafter, the elements are separated by patterning, and further the silicon oxide film 10 having a thickness of 1000 Å is formed by the sputtering method.
6 is formed as a gate insulating film. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example 0.1 or less. did. Subsequently, a thickness of 6000 to 800 is obtained by a sputtering method.
0Å, eg 6000Å aluminum (0.1-2%
Of silicon) is deposited. It is desirable that the steps of forming the silicon oxide film 106 and the aluminum film are continuously performed.

Then, by patterning the silicon film,
Gate electrodes 107 and 109 are formed. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodic oxidation was performed in an ethylene glycol solution containing 1-5% tartaric acid. The thickness of the obtained oxide layers 108 and 110 is 2000.
It is Å. Since the oxides 108 and 110 have a thickness to form the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined in the anodizing process.

Next, impurities (phosphorus and boron) are implanted into the region of the crystalline silicon film by ion doping using the gate electrode 107 and the oxide layer 108 around it and the gate electrode 109 and the oxide layer 110 around it as masks. To do. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas, and the acceleration voltage is 60 to 90 kV, for example, 80 kV in the former case, and 40 kV in the latter case.
˜80 kV, for example 65 kV. The dose is 1 × 1
0 ¹⁵ to 8 × 10 ¹⁵ cm ^-2 , for example, phosphorus 2 × 10 ¹⁵ cm
^-2 and boron was set to 5 × 10 ¹⁵ . When doping, cover one area with photoresist,
Each element was selectively doped. As a result,
N-type impurity regions 114 and 116, P-type impurity region 1
11 and 113 are formed, and P-channel type TFT (PTF
The region of T) and the region of the N-channel type TFT (NTFT) could be formed.

After that, annealing was performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Shot, for example, 2 shots were irradiated. It is useful to heat the substrate to about 200 to 450 ° C. during the irradiation with the laser light. In this laser annealing step, since nickel has diffused into the previously crystallized region, recrystallization easily proceeds by the irradiation of this laser light, and the impurities doped with the impurity imparting P-type are doped. Area 1
11 and 113, and the impurity regions 114 and 116 doped with the impurity imparting N could be easily activated.

Then, a silicon oxide film 11 having a thickness of 6000Å is formed.
8 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 120, and 119 were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. The semiconductor circuit is completed through the above steps. (Fig. 1 (D))

The circuit shown above has a CMOS structure in which PTFT and NTFT are provided in a complementary type. In the above process, two TFTs are formed at the same time and cut at the center, so that two independent TFTs are simultaneously formed. It is also possible to produce.

FIG. 2 shows an outline of FIG. 1 (D) as seen from above. The Ni-added region in FIG. 2 becomes a part of the region 100 shown in FIG. Crystallization in the lateral direction is performed in a state in which the Ni-added region is substantially aligned in the direction parallel to the substrate as shown by the arrow. Since the crystals grow like needles or columns in the moving direction of the carriers moving between the source / drain, the carriers rarely cross the grain boundaries, and a high mobility TFT can be obtained. it can.

For example, the mobility of the TFT when crystallized without implanting silicon ions in the step of FIG. 1B was 50-60 cm ² / Vs for PTFT. In the PTFT manufactured in the example, 90
A high mobility of 120 cm ² / Vs could be obtained.
Also, in the case of NTFT, the mobility was 80 to 100 cm ² / Vs when silicon ion implantation was not performed, but in the present embodiment, the mobility was 150 to 180 cm.
² / Vs could be obtained.

In this embodiment, as a method of introducing Ni, Ni is selectively thin film on the base film 102 under the amorphous silicon film 104 (it is extremely thin, so it is difficult to observe it as a film). The amorphous silicon film 1 was formed as
A method of selectively forming a nickel silicide film after forming 04 may be used. That is, crystal growth may be performed from the upper surface or the lower surface of the amorphous silicon film. Alternatively, a method of depositing amorphous silicon in advance and then selectively implanting nickel ions into the amorphous silicon film 104 by using an ion doping method may be adopted. In this case, there is a feature that the concentration of nickel element can be controlled. Further, it is possible to add a small amount of nickel by plasma treatment. When introducing nickel element by this plasma treatment,
A base (for example, the base silicon oxide film 10) of a semiconductor film (for example, the amorphous silicon film 104) to which a small amount of nickel is to be added.
2) It may be performed on the upper surface or the upper surface of the semiconductor film. Also, when Fe, Co, Pd, or Pt is used as a catalyst material for crystallization in addition to nickel, the same steps are performed.
A TFT can be manufactured.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active type liquid crystal display device. Although one pixel will be described below, a large number of pixels (generally several hundreds of thousands) are formed in the same structure.

An outline of the manufacturing process of this embodiment is shown in FIG.
In this embodiment, Corning 70 is used as the substrate 201.
A 59 glass substrate was used. First, a base film 202 (silicon oxide) is formed on a glass substrate 201 by a sputtering method. Then, a 1000 Å thick silicon oxide film 203 to be a mask is formed. This silicon oxide film is formed on the base film 20 in the region 204.
It functions as a mask that exposes 2. After this, a nickel silicide film is formed. This nickel silicide film is formed by sputtering to a thickness of 5 to 200Å, for example, 20Å. This nickel silicide film has the chemical formula NiS
i _x , 0.4 ≦ x ≦ 2.5, for example, x = 2.0.

After that, after removing the silicon oxide film 203 as a mask, an amorphous silicon film 205 (thickness 300 to 1500Å) is formed by LPCVD or plasma CVD, and a protective film 200 of silicon oxide is further formed. Form to a thickness of 500Å. (Fig. 3 (B))

Then, through the same step of implanting silicon ions as in Example 1, crystallization was performed by heating annealing.
This annealing step is performed under a hydrogen reducing atmosphere (preferably,
The partial pressure of hydrogen was 0.1 to 1 atm) and the treatment was carried out at 550 ° C. for 4 hours. At this time, in a part of the region under the amorphous silicon film 205,
Since the nickel silicide film is formed, crystal growth occurs in that portion in the direction vertical to the substrate and in the other portion in the direction parallel to the substrate, and a crystalline silicon film can be obtained.

Then, the semiconductor region made of crystalline silicon (portion indicated by 204) is patterned to form an island-shaped semiconductor region (active layer of TFT). Further, by using tetra-ethoxy-silane (TEOS) as a raw material, a silicon oxide gate insulating film (thickness 700 to 1200Å, here 1000) is formed by a plasma CVD method in an oxygen atmosphere.
Å) 206 is formed.

Next, a silicon gate electrode 207 is formed. After that, phosphorus is injected as an N-type impurity into the crystalline silicon film in a self-aligned manner by an ion doping method to form the source / drain 208, 209 of the TFT. further,
As indicated by an arrow in FIG. 3C, this is irradiated with a KrF laser beam to improve the crystallinity of the silicon film whose crystallinity is deteriorated due to this ion doping. At this time, the energy density of the laser light is 250 to 300 mJ
Set to / cm ² . By this laser irradiation, the sheet resistance of the source / drain of this TFT is 300-80.
It becomes 0 Ω / cm ² .

After that, the interlayer insulator 21 is made of silicon oxide.
1 is formed, and the pixel electrode 212 is further formed of ITO. Then, a contact hole is formed and TF
Electrodes 213 and 214 are formed in the source / drain region of T by a chromium / aluminum multilayer film, and one of these electrodes 214 is also connected to ITO. The chromium / aluminum multilayer film has a chromium film of 20 to 200 nm as a lower layer,
Typically 100 nm, with an aluminum film 100-
It is formed by depositing a film of 2000 nm, typically 500 nm. It is desired that these are continuously formed by a sputtering method. Finally, annealing in hydrogen at 200 to 300 ° C. for 2 hours completes the hydrogenation of silicon. In this way, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to form an active matrix liquid crystal display device.

FIG. 4 shows a schematic top view of the TFT of this embodiment. FIG. 4 shows a TFT portion and a region 204 in which a small amount of nickel is added. Figure 4
Are the source / drain regions 208 and 210, the channel formation region 209, and the gate electrode 2 above the channel formation region.
07 is shown. In crystallization by thermal annealing, crystal growth occurs in which the growth direction is aligned in the direction parallel to the substrate from the region 204 into which nickel is selectively introduced, as shown by the arrow. The source / drain regions 208 and 210 and the channel formation region 209 are formed by using the crystalline silicon film that has been crystal-grown in the direction parallel to this substrate. During the operation of the TFT, the carriers move between the channel forming regions, that is, the regions 208 and 210. Therefore, the carriers are hardly affected by the grain boundaries in the crystalline silicon film in which the crystal growth directions are aligned. You can move. That is, high mobility can be obtained. In addition, since the crystal growth in the lateral direction is about 40 μm,
The length of the active layer is preferably 40 μm or less. Further, the nickel trace addition region 204 may overlap the drain / source region 210. However, when the channel formation region 209 and the nickel trace amount addition region 204 overlap, the crystal growth direction in the channel formation region 209 becomes vertical to the substrate, so care must be taken.

In the above embodiments, the TFT is formed so that the carriers flow in the direction parallel to the crystal growth direction. However, by appropriately determining the carrier flow direction in this TFT and the crystal growth direction. , TFT characteristics can be controlled. That is, the direction of carrier flow in the TFT (the direction of the line connecting the source and drain),
Since the ratio of the carriers crossing the grain boundaries can be controlled by the angle formed by the crystal growth direction of the crystals, by controlling this angle, it is possible to control the resistance that the carriers receive during the movement to some extent.

[Embodiment 3] In this embodiment, by selectively implanting silicon ions, a region where silicon ions have not been implanted is selectively left as a silicon film having a crystal component, and silicon is implanted from this region. This is an example of laterally growing a crystal in a region which is made amorphous by being implanted with ions.

For example, in the manufacturing process shown in FIG. 1, a small amount of nickel is selectively added to the 100 region in the same manner as in Example 1. Further, in the process of (B), the 100 region is masked with a resist to remove silicon ions. Injection.
At this time, the silicon film 104 is preferably formed as a film having crystallinity. Then, at the time of crystallization by heating, 100
Crystal growth as indicated by arrow 105 can be caused from the silicon film 104 on the region (1) to the periphery thereof (region where silicon ions are not implanted).

The same effect can be obtained by adding a small amount of nickel to the entire silicon film 104. However, in this case, crystal growth in the direction perpendicular to the substrate 101 using nickel as a catalyst also occurs at the same time.

[Embodiment 4] This embodiment is shown in FIG. After forming a silicon oxide film 602 having a thickness of 1000 to 5000Å, for example, 2000Å on a glass substrate 601, an amorphous silicon film 603 having a thickness of 300 to 1500Å, for example, 500Å is formed by a plasma CVD method. further,
A silicon oxide film 604 having a thickness of 500 to 1500 Å, for example, 500 Å, was formed thereon. It is desirable that these film formations be performed continuously. Then, the silicon oxide film 604 was selectively etched to open a window 605 for introducing nickel. The window 605 was formed so as to avoid a portion which should be a channel of the TFT. Then, a nickel salt film 607 was formed by spin coating. Explaining this method, first, nickel acetate or nickel nitrate is diluted with water or ethanol, and
The concentration was set to 00 ppm, for example, 100 ppm.

On the other hand, the substrate was immersed in hydrogen peroxide solution or a mixed solution of hydrogen peroxide solution and ammonia to form an extremely thin silicon oxide film on the exposed portion of the amorphous silicon film (the area of the window 605). . This is to improve the interfacial affinity between the nickel solution prepared as described above and the amorphous silicon film. The substrate treated in this way is placed in a spinner and gently rotated to apply 1 nickel solution onto the substrate.
10 ml, for example, 2 ml was dropped to spread the solution on the entire surface of the substrate. This state was held for 1 to 10 minutes, for example, 5 minutes. After that, the rotation speed of the substrate was increased and spin drying was performed. This operation may be repeated a plurality of times. Thus, a thin film of nickel salt 607 was formed.
(Fig. 6 (A))

Then, silicon ions were implanted by the ion implantation method. At this time, in the region other than the window 605, that is, in the region covered with the silicon oxide film 604, the largest number of silicon ions are implanted into the interface between the underlying silicon oxide film 602 and the amorphous silicon film 603. I did so. At this time, since the silicon oxide film 604 does not exist in the region of the window 605, silicon ions are implanted deeper. Then, in a heating furnace,
The heat treatment was performed at 0 ° C. for 4 to 12 hours, for example, 550 ° C. for 8 hours. The atmosphere was nitrogen. As a result, first, nickel diffused into the region immediately below the window 605, and crystallization started from this region. The crystallization region is indicated by the arrow 6.
As shown in 08, it spread around it. (Fig. 6
(B))

Thereafter, in the air or oxygen atmosphere, KrF excimer laser light (wavelength 248 nm) or XeCl excimer laser light (wavelength 308 nm) was irradiated for 1 to 20 shots, for example, 5 shots to further improve the crystallinity. Energy density is 200 to 3
The substrate temperature was 50 mJ / cm ² and the temperature was 200 to 400 ° C. (Fig. 6 (C))

Then, the silicon film 603 is etched,
The area of the TFT was formed. And the thickness is 1000 on the whole surface.
~ 1500 Å, for example 1200 Å silicon oxide film 609
And the gate electrode 610 of the PTFT, the gate electrode 613 of the NTFT, and the respective anodic oxide films 61 are formed of aluminum as in the first embodiment.
A gate electrode portion was formed of 2,614.

Then, using these gate electrode portions as masks, N-type and P-type impurities were implanted into the silicon film by the ion doping method as in the first embodiment. As a result,
PTFT source 615, channel 616, drain 6
17, peripheral circuit NTFT source 620, channel 6
19, a drain 618 was formed. Then, Example 1
Similarly to the above, the entire surface was irradiated with laser to activate the doped impurities. (Figure 6 (D))

Thereafter, as an interlayer insulator, a thickness of 3000 to
A silicon oxide film 621 of 8000 Å, for example 5000 Å, was formed. After that, contact holes are formed in the source / drain of the TFT, and further, a two-layer film of titanium nitride (thickness 1000Å) and aluminum (thickness 5000Å) is deposited by the sputtering method, and this is patterned and etched. Thus, electrodes / wirings 622 to 624 were formed. In this way, an inverter circuit composed of PTFT and NTFT could be formed by the laterally grown crystalline silicon. (Fig. 6 (E))

In this embodiment, laser irradiation is performed as shown in FIG. 6 (C). In this step, the amorphous component remaining between the silicon crystals grown like needles is also crystallized, and this crystallization is performed by using the needle-like crystals as nuclei to thicken the needle-like crystals. This expands the region in which the current flows and allows a larger drain current to flow. This state is shown in FIG. FIG. 7 shows a thinned crystallized silicon film observed by a transmission electron microscope (TEM). FIG. 7A is a view of the vicinity of the tip of the crystallization region of the silicon film crystallized by lateral growth, and needle-like crystals are observed. Further, it can be seen that many non-crystallized amorphous regions exist between the crystals. (Figure 7 (A))

When this is irradiated with laser under the conditions of this embodiment, it becomes as shown in FIG. 7 (B). By this process, FIG.
The amorphous region, which occupies most of the area of (A), crystallizes, but this crystallization occurs randomly, and the electrical characteristics are not so good. What should be noted is the crystalline state of the region that was originally amorphous between the needle-like crystals observed near the center. Here, a thick crystal region is formed so as to grow by crystallization from a needle crystal. (Fig. 7
(B))

In FIG. 7, for the sake of clarity,
Although the tip region of crystal growth with many amorphous regions was observed, the same is true near the root and center of crystal growth. As described above, by laser irradiation, the amorphous portion can be reduced and the needle crystal can be thickened, and the characteristics of the TFT can be further improved.

[0064]

[Effect] A metal element that promotes crystallization is selectively introduced into a specific region, and a lateral direction (direction parallel to the substrate) is introduced from this region.
By performing crystal growth on the substrate, a crystalline silicon film having a uniform crystal growth direction can be obtained. Then, at this time, in order to prevent the crystal component from existing in the region where the crystal is grown in the lateral direction in advance, the ionization is performed thoroughly by the inert ion implantation, and the thermal annealing is performed. Thus, a crystalline semiconductor film having a uniform crystal growth direction can be obtained. Then, a TFT having high mobility can be obtained by manufacturing a TFT using this film.

[Brief description of drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows an outline of an example.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows an outline of an example.

FIG. 5 shows a dose amount of silicon ions.

FIG. 6 shows a manufacturing process of an example.

FIG. 7 shows a crystal structure of an example.

[Explanation of symbols]

101 glass substrate 102 Base film (silicon oxide film) 103 mask 100 Area where nickel is introduced 99 Protective film (silicon oxide film) 105 Crystal growth direction 107 Gate electrode 108 anodized layer 109 Gate electrode 110 Anodized layer 111 source / drain region 112 channel formation region 113 drain / source region 114 source / drain region 115 channel formation region 116 drain / source region 117 electrodes 118 Interlayer insulation 119 electrodes 120 electrodes 201 glass substrate 202 Base film (silicon oxide film) 203 mask 204 Area where nickel is introduced 206 Gate insulation film 207 Gate electrode 208 source / drain region 209 channel formation region 210 drain / source region 211 Interlayer insulator 212 ITO (pixel electrode) 213 electrode 214 electrodes

Continuation of front page (56) Reference JP-A-5-67635 (JP, A) US Pat. No. 5147826 (US, A) JAPANESE JOURNAL OF APPLIED PHYSIC S, VOL. 29, NO. 12, pp. 2698-2704 Appl. Phys. Lett. , 60 (2), pp. 225-227 (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/20 H01L 29/786

Claims (10)

(57) [Claims] 1. A crystalline semiconductor film having a base film formed on a substrate, a source region, a drain region, and a channel formation region formed on the base film; and a crystalline semiconductor film formed on the crystalline semiconductor film. In the semiconductor device having a gate insulating film and a gate electrode formed on the gate insulating film, the crystalline semiconductor film is 1 × 10 ¹⁹ atoms / cm 2.
Containing ³ or less nickel element, having a needle-like or columnar crystal grown in a direction parallel to the substrate surface and connecting the source region and the drain region, in the crystalline semiconductor film Grain boundaries exist in the direction of the line connecting the source region and the drain region, and ions of an inert element are implanted into the crystalline semiconductor film.
Wherein a being. 2. A semiconductor device in which a P-channel type thin film transistor and an N-channel type thin film transistor are provided in a complementary manner, wherein the P-channel type thin film transistor and the N-channel type thin film transistor have a base film formed on a substrate and the lower layer. A crystalline semiconductor film having a source region, a drain region and a channel forming region formed on the ground film;
A gate insulating film formed on the crystalline semiconductor film,
A gate electrode formed on the gate insulating film, and the crystalline semiconductor film is 1 × 10 ¹⁹ atoms / cm 2.
Containing ³ or less nickel element, having a needle-like or columnar crystal grown in a direction parallel to the substrate surface and connecting the source region and the drain region, in the crystalline semiconductor film Grain boundaries exist in the direction of the line connecting the source region and the drain region, and ions of an inert element are implanted into the crystalline semiconductor film.
Wherein a being. 3. A crystalline semiconductor film having a base film formed on a substrate, a source region, a drain region, and a channel formation region formed on the base film; and a crystalline semiconductor film formed on the crystalline semiconductor film. In the semiconductor device having a gate insulating film and a gate electrode formed on the gate insulating film, the crystalline semiconductor film is 1 × 10 ¹⁹ atoms / cm 2.
Containing ³ or less nickel element, having a needle-like or columnar crystal grown parallel to the substrate surface and in the moving direction of the carrier moving between the source / drain, in the crystalline semiconductor film, Grain boundaries exist in the direction of the line connecting the source region and the drain region, and ions of an inert element are implanted into the crystalline semiconductor film.
Wherein a being. 4. A semiconductor device in which a P-channel type thin film transistor and an N-channel type thin film transistor are provided in a complementary type, wherein the P-channel type thin film transistor and the N-channel type thin film transistor have a base film formed on a substrate and the lower layer. A crystalline semiconductor film having a source region, a drain region and a channel forming region formed on the ground film;
A gate insulating film formed on the crystalline semiconductor film,
A gate electrode formed on the gate insulating film, and the crystalline semiconductor film is 1 × 10 ¹⁹ atoms / cm 2.
^In the crystalline semiconductor film, the source is included in the crystalline semiconductor film, which contains a nickel element of ³ or less and has needle-like or columnar crystals grown parallel to the substrate surface and in the moving direction of carriers moving between the source / drain. A grain boundary exists in the direction of a line connecting the region and the drain region, and an ion of an inert element is implanted into the crystalline semiconductor film.
Wherein a being. 5. The semiconductor device according to claim 1, wherein a length of the crystalline semiconductor film in a direction connecting the source region and the drain region is 40 μm or less. 6. The semiconductor according to claim 1, wherein the crystalline semiconductor film has no crystal grain boundary in a direction perpendicular to a direction connecting the source region and the drain region. apparatus. 7. The crystalline semiconductor film according to claim 1, wherein there is no grain boundary in a direction perpendicular to a moving direction of carriers moving between the source / drain. Semiconductor device. 8. The nickel element contained in the crystalline semiconductor film is 1 × 10 ¹⁴ atoms / cm ³ to 1 × 10 ^18.
8. The semiconductor device according to claim 1, which has a concentration of atoms / cm ³ . 9. The semiconductor device according to any one of claims 1 to 8, characterized by using the semiconductor device to the image sensor. 10. The semiconductor device according to any one of claims 1 to 9, characterized by using the semiconductor device in the peripheral driver circuit of an active liquid crystal display device.