JP2002043331A - Method for fabricating semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a TFT having required characteristics in a device having a plurality of TFTs arranged on a substrate. SOLUTION: In an active matrix type liquid crystal display, the circumferential circuit part employs a crystalline silicon film grown epitaxially in a direction parallel with the surface of a substrate and the pixel part employs a crystalline silicon film grown epitaxially in a direction perpendicular to the surface of the substrate. A TFT having a high mobility is formed in the circumferential circuit part and a TFT having a low OFF current is formed in the pixel part in order to enhance the charge holding rate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a semiconductor device using a TFT (thin film transistor) provided on an insulating substrate such as glass. In particular, the present invention relates to a semiconductor device that can be used for an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art As a semiconductor device having TFTs on an insulating substrate such as glass, active type liquid crystal display devices and image sensors using these TFTs for driving pixels are known.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. Note that, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

As a method for obtaining a silicon semiconductor in the form of a thin film having crystallinity, (1) a film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy. Is known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or higher, so that the method is inexpensive. There was a cost problem that a glass substrate could not be used. Also, (2)
Taking the excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low, and the entire surface of the large-area substrate is uniformly processed. The stability of the laser is not enough, and it seems to be a next-generation technology. (3)
The method (1) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more, and uses an inexpensive glass substrate. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen size is increasing, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, in the case of 7059 glass, which is currently most commonly used, the strain point is 593 ° C., and the conventional heating crystallization method causes large deformation. In addition to the problem of the temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.

[0005]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Of course, a crystalline silicon semiconductor manufactured using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technology, and can be used for the active layer region of the TFT. It goes without saying that there is something. It is another object of the present invention to selectively provide a TFT having required characteristics on a substrate by utilizing this technique.

Background of the Invention The present inventors form an amorphous silicon semiconductor film by a CVD method or a sputtering method and crystallize the film by heating as described in the section of the prior art. Regarding the method, the following experiments and considerations were made.

First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallizing the film by heating is examined. The crystal growth starts from the interface between the glass substrate and the amorphous silicon. When the film thickness exceeded a certain level, it was recognized that the film proceeded in a columnar shape perpendicular to the substrate surface.

In the above phenomenon, a crystal nucleus serving as a base for crystal growth (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be due to going. Such a crystal nucleus
Considered to be trace amounts of impurity metal elements present on the substrate surface and crystalline components on the glass surface (like glass crystallized glass, it is considered that there is a crystalline component of silicon oxide on the glass substrate surface) Can be

Therefore, it is thought that the crystallization temperature can be lowered by more actively introducing crystal nuclei, and in order to confirm the effect, a small amount of another metal is deposited on a glass substrate. An experiment was performed in which a thin film made of amorphous silicon was formed thereon and then heated and crystallized. as a result,
When some metals were formed on the substrate, a decrease in crystallization temperature was confirmed, and it was expected that crystal growth with foreign matter as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals whose temperature could be reduced was investigated in more detail. The plurality of impurity elements are nickel (Ni), iron (Fe), cobalt (Co), palladium (Pd), and platinum (Pt).

[0010] Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of fine crystals in the form of dots at a certain temperature. In the case of the porous silicon thin film, the effect was reduced in each case, and the effect of the introduction of crystal nuclei on lowering the crystallization temperature was confirmed.
In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism is not clear at present, but is presumed to have some catalytic effect.

In any case, due to the above two effects, when a thin film made of amorphous silicon is formed on a glass substrate after a certain kind of metal is formed in a minute amount and then heated and crystallized, It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less and for a time of about 4 hours, which was not considered. Among the impurity metals having such an effect, the effect is most remarkable, and a material selected by us is nickel.

One example of the effect of nickel is as follows. On a substrate on which no treatment is performed, that is, on a substrate on which a very small amount of nickel thin film is not formed (Corning 70
When a thin film made of amorphous silicon formed on a (59 glass) by plasma CVD is crystallized by heating in a nitrogen atmosphere, when the heating temperature is set to 600 ° C.,
Although a heating time of 10 hours or more was required, when a thin film made of amorphous silicon was used on a substrate on which a very small amount of nickel film was formed, similar crystallization was performed by heating for about 4 hours. I was able to get the state. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.

[0013]

As can be seen from the above description,
When a thin film made of amorphous silicon is formed after forming a thin film of nickel, a lower crystallization temperature and a shorter time required for crystallization can be achieved. Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT. As will be described in detail later, the nickel thin film is formed on the substrate (that is, under the amorphous silicon film).
In addition, since the same effect is obtained even when the film is formed on an amorphous silicon film, and the same effect is obtained by ion implantation and plasma processing, a series of these processings will be referred to as “nickel We will call it "small amount addition." Technically, it is also possible to add a small amount of nickel during the formation of the amorphous silicon film.

First, a method for adding a trace amount of nickel will be described. The addition of a small amount of nickel is also possible by forming a small amount of nickel thin film on a substrate and then forming amorphous silicon.
The method of first forming an amorphous silicon film and then forming a minute amount of a nickel thin film thereon has the same effect of lowering the temperature, and the film forming method can be either a sputtering method, a vapor deposition method, or a spin coating method. It has been found that any method can be used, including a coating method and a method using plasma, and a film forming method is not limited. However, when a very small amount of nickel thin film is formed on the substrate, a thin film of silicon oxide (underlying film) is formed on the substrate rather than directly on a 7059 glass substrate. The effect is more remarkable when a small amount of nickel thin film is formed thereon. One possible reason for this is that direct contact between silicon and nickel is important for the low-temperature crystallization in this case, and in the case of 7059 glass, components other than silicon inhibit the contact or reaction between the two. It may be that.

Further, as a method of adding a trace amount of nickel,
Almost the same effect was confirmed by adding nickel by ion implantation in addition to forming a thin film on or under amorphous silicon. For the amount of nickel, 1 × 1
0 Although low temperature in the addition of ¹⁵ atoms / cm ³ or more amounts have been identified, 5 in the × 10 ¹⁹ atoms / cm ³ or more amount, and those peak shape of Raman spectrum of silicon alone Because they are clearly different, preferably 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ¹⁹
The range of atoms / cm ³ is good. If the concentration of nickel is
If it exceeds 5 × 10 ¹⁹ atoms / cm ³ , NiSi is locally generated, and the characteristics as a semiconductor deteriorate. Also, the concentration of nickel is 1 × 10 ¹⁵ atoms / cm.
^If it is less than ³ , the effect of nickel as a catalyst will decrease. In the crystallized state, the lower the nickel concentration, the better.

Next, a description will be given of a crystal form in the case where a trace amount of nickel is added. As described above, when nickel is not added, nuclei are randomly generated from crystal nuclei at a substrate interface or the like, and crystal growth from the nuclei is also random up to a certain film thickness, and is generally performed for thicker thin films. It is known that columnar crystal growth in which the (110) direction is arranged in the direction perpendicular to the substrate is performed. Naturally, almost uniform crystal growth is observed over the entire thin film. On the other hand, in the case of the addition of a very small amount of nickel, the crystal growth was different between the region where nickel was added and the vicinity thereof. That is, in the region where nickel is added, the added nickel or its compound with silicon becomes a crystal nucleus, and the columnar crystal grows almost perpendicular to the substrate similarly to the case where nickel is not added. It became clear from the micrograph. Crystallization at low temperature was confirmed even in the vicinity of the region where a small amount of nickel was not added. In that portion, the direction perpendicular to the substrate was arranged at (111), and needle-like or columnar crystals were parallel to the substrate. An unusual crystal growth of growth was observed. It is observed that the crystal growth in the horizontal direction parallel to this substrate grows as large as several hundred μm from the region where a small amount of nickel is added, and the growth amount increases in proportion to the increase of time and temperature. I knew I was going to do it. As an example, a growth of about 40 μm was observed at 550 ° C. for 4 hours. Moreover, according to the transmission electron beam micrograph, it has been found that all of the large lateral crystals are single crystal-like. The nickel concentration of the nickel-added portion, the laterally grown portion in the vicinity thereof, and the amorphous portion further away (the low-temperature crystallization is not performed in the portion far away and the amorphous portion remains) are set to S.
When examined by IMS (secondary ion mass spectrometry),
In the laterally grown portion, an amount smaller by about one order of magnitude is detected from the portion with a small amount of nickel added, and diffusion in the amorphous silicon is observed. Further, the amount of the amorphous portion was further reduced by about one digit. The relationship between this and the crystal morphology is not clear at present, but in any case, it is possible to form a silicon thin film having crystallinity of a desired crystal morphology in a desired portion by controlling the amount of nickel added and its position. is there.

Next, the electrical characteristics of the nickel-added portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the nickel-added portion are substantially the same as those of a film to which nickel is not substantially added, that is, a film which has been crystallized at about 600 ° C. for several tens of hours. When the activation energy was determined from the properties, the amount of nickel added was 10 ¹⁷ atoms / cm ³ to 10 ¹⁸ a
In the case of about toms / cm ^3, no behavior that could be attributed to the nickel level was observed.
(If limited to this fact, the nickel concentration in the film when used for an active layer of a TFT is 10 ¹⁸ atoms / cm ³
It can be said that it is desirable to be less than

On the other hand, the laterally grown portion has an electric conductivity one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is presumably because the current path direction coincided with the lateral growth direction of the crystal, so that few or almost no grain boundaries existed during the passage of electrons (carriers) between the electrodes. Consistently consistent with micrograph results. That is, this is consistent with the observation that needle-like or columnar crystals grow in a direction parallel to the substrate.

Finally, a method of applying the present invention to a TFT based on the various characteristics described above will be described. Where TF
As an application field of T, an active type liquid crystal display device using a TFT for driving a pixel is assumed.

As described above, in recent large-screen active liquid crystal display devices, it is important to suppress shrinkage of the glass substrate. However, by using the nickel small addition process of the present invention, the strain point of the glass is reduced. Crystallization is possible at a temperature sufficiently lower than that of the above, which is particularly preferable. According to the present invention, a portion where amorphous silicon is conventionally used can be easily replaced with a crystalline silicon film by adding a trace amount of nickel and thermally annealing at approximately 450 to 550 ° C. for approximately 4 hours. It is possible. Of course, it is necessary to change the design rules and the like accordingly. However, it is considered that the conventional apparatus and process can sufficiently cope with this, and the merits thereof are considered to be great.

Further, according to the present invention, it is possible to separately form a TFT used for a pixel and a TFT forming a driver of a peripheral circuit by using a crystal form corresponding to characteristics. There are many advantages particularly for application to liquid crystal display devices. TFT used for pixel in active matrix type liquid crystal display device
Does not require such a high mobility, and a smaller off-state current has a greater advantage. Therefore, when the present invention is used, a trace amount of nickel is directly added to a region to be a TFT used for a pixel,
The crystal is grown in the vertical direction (with respect to the substrate surface), and as a result, a large number of grain boundaries are formed in the channel direction (the direction connecting the source region and the drain region), whereby the off current can be reduced. On the other hand, a TFT forming a driver of a peripheral circuit needs to have a very high mobility in consideration of application to a workstation in the future. Therefore, when the present invention is applied, a small amount of nickel is added in the vicinity of the TFT forming the driver of the peripheral circuit, and a crystal is grown in one direction (a lateral direction, ie, a direction parallel to the substrate surface) from there. By aligning the crystal growth direction with the channel current path direction (the direction in which carriers move, that is, the direction connecting the source region and the drain region), a TFT having extremely high mobility can be manufactured.

That is, according to the present invention, in a semiconductor device in which a large number of thin film transistors (generally called TFTs) are formed on a substrate such as a glass substrate, the crystal growth direction of a crystalline silicon semiconductor film constituting a specific TFT is selectively changed. It is an idea of the invention to selectively form TFTs satisfying required characteristics on a substrate by controlling and providing the TFTs. This concludes the basic description of the present invention. Hereinafter, a specific configuration of the present invention will be described.

The present invention relates to a TFT provided in a pixel portion in an active matrix type liquid crystal display device having a peripheral circuit portion and a pixel portion as shown in FIG. 1, for example.
(Thin film transistor) is composed of a crystalline silicon film grown in a direction perpendicular to the substrate surface, and the TFT formed in the peripheral circuit portion is composed of a crystalline silicon film grown in a direction parallel to the substrate. It is a feature. And
In the pixel portion, by using a crystalline silicon film grown in a direction perpendicular to the substrate, carriers moving between the source and the drain can cross the grain boundary, and a TFT with a small off-current can be obtained. be able to. On the other hand, in the peripheral circuit portion, by forming the source / drain in a direction parallel to the crystal growth direction, a TFT having a large mobility, that is, a large on-current is obtained. During the operation of the TFT, the carriers flow between the source and the drain. Therefore, by forming the source / drain in the crystal growth direction, the possibility that the carriers cross the grain boundaries is reduced, and the resistance received by the carriers is reduced. be able to.

As described above, a crystalline silicon film can be obtained by selectively performing crystallization in a direction perpendicular or parallel to the substrate surface, and the characteristics of such a crystalline silicon film can be improved. In order to further improve the crystallization, after the crystallization step, a laser or a strong light equivalent thereto may be irradiated to crystallize the insufficiently crystallized components remaining at the grain boundaries and the like. In this step,
The characteristics can be similarly improved with a silicon film grown in a direction perpendicular to the substrate surface or a silicon film grown in a direction parallel to the substrate surface.

According to the present invention, there is provided a semiconductor device in which a large number of thin film transistors using a crystalline silicon film are provided on a substrate, and a part of the large number of thin film transistors is formed by crystal growth in a direction parallel to the substrate surface. One feature is that the other part of the large number of thin film transistors is made of a crystalline silicon film which is crystal-grown in a direction perpendicular to the substrate surface. Further, the invention of the present application is a semiconductor device in which a large number of thin film transistors using a crystalline silicon film are provided on a substrate, and a part of the large number of thin film transistors is provided in a peripheral circuit portion of an active matrix liquid crystal display device. Another part of the large number of thin film transistors is provided in a pixel portion of an active matrix type liquid crystal display device, and the thin film transistor provided in the peripheral circuit portion is made of crystalline silicon crystal grown in a direction parallel to a substrate surface. One feature is that the thin film transistor provided in the pixel portion is formed of a crystalline silicon film formed by crystal growth in a direction perpendicular to the substrate surface. Further, the present invention provides a step of forming a substantially amorphous silicon film on a substrate, a step of selectively introducing a metal element which promotes crystallization before or after the step, and a step of heating the non-crystalline silicon film by heating. Crystallizing a crystalline silicon film, and in a region where the metal element is selectively introduced, crystal growth is performed in a direction substantially perpendicular to a substrate surface, and the metal element is selected. One feature is that crystal growth is performed in a direction substantially parallel to the substrate surface in a region around the region where the region is introduced. Further, the present invention provides a step of forming a substantially amorphous silicon film on a substrate, a step of selectively introducing a metal element which promotes crystallization before or after the step, Crystallizing a crystalline silicon film. In the crystallizing step, in a region where the metal element is selectively introduced, crystal growth is performed in a direction substantially perpendicular to a substrate surface. In the crystallization step, in the peripheral region of the region where the metal element is selectively introduced, crystal growth is performed in a direction substantially parallel to the substrate surface, and in a direction substantially perpendicular to the substrate surface. By forming a thin film transistor with the crystalline silicon film in the region where crystal growth has been performed, the moving direction of carriers in the thin film transistor is substantially perpendicular to the crystal growth direction of the crystalline silicon film, and By forming a thin film transistor with a crystalline silicon film in a region where crystal growth is performed in a direction substantially parallel to the direction, the carrier movement direction in the thin film transistor is substantially parallel to the crystal growth direction of the crystalline silicon film. This is one feature. The invention of the present application is characterized in that at least one material selected from Ni, Co, Pd, and Pt is used as a metal element. Further, the invention of the present application is characterized in that after the step of crystallizing the silicon film by heating, the region to which the metal element is added and the periphery thereof are selectively irradiated with laser or strong light equivalent thereto. Further, the invention of the present application is characterized in that the addition of a metal element that promotes crystallization is performed by applying or spin-coating a substance containing the metal element. [Operation] By selecting the crystal growth direction of the crystalline silicon film, a TFT having required characteristics can be selectively formed.

[0026]

[Embodiment 1] FIG. 1 shows an outline of an embodiment.
FIG. 1 is a top view of the liquid crystal display device, and illustrates a pixel portion provided in a matrix and a peripheral circuit portion. In this embodiment, a TFT for driving a pixel and a TFT for forming a peripheral circuit are formed on an insulating substrate (for example, a glass substrate).
This is an example of forming an FT. In this embodiment, a CMOS circuit is provided in which a PTFT and an NTFT using a silicon film having crystallinity (referred to as a crystalline silicon film) in which peripheral circuits are grown in a lateral direction are provided in a complementary manner. An example will be described in which an N-channel TFT (NTFT) using crystalline silicon grown in the vertical direction is used as the TFT formed in the first embodiment.

FIG. 2 shows a process of manufacturing a circuit in which NTFTs and PTFTs constituting a peripheral circuit are formed in a complementary manner. FIG. 4 shows a process of manufacturing an NTFT formed in a pixel. It is about a process. Further, both steps are performed on the same substrate, and common steps are performed simultaneously. That is, FIG.
(D) and (A) to (D) of FIG. 4 correspond to each other, and the step of FIG. 2 (A) and the step of FIG. The step and the step of FIG. 4B proceed simultaneously, and so on.

FIG. 2 shows NTFT and PT constituting the peripheral circuit.
FIG. 4 shows a process of fabricating a circuit in which FT and FT are configured in a complementary type.
Shows a process for manufacturing an NTFT provided in a pixel. First,
A silicon oxide base film 1 having a thickness of 2000 ° on a glass substrate (Corning 7059) 101 by a sputtering method.
02 was formed. Next, only in the peripheral circuit portion, that is, in FIG. 2, a mask 103 formed of a metal mask, a silicon oxide film, or the like is provided. This mask 10
3, the base film 102 is exposed in a slit shape (indicated by 100). When this state is viewed from above, the base film 102 is exposed in a slit shape, and the other portions are in a masked state.

After the mask 103 is provided, a nickel silicide film (NiSi _x , 0.4 ≦ x ≦ 2.
5, for example, x = 2.0). As a result, a portion of the region 100 and a region 204 (FIG.
, Which indicates the entire surface of the base film 102). Thereafter, by removing the mask 103, the nickel silicide film is selectively formed in the region 100 in FIG. In other words, this means that the nickel trace addition was selectively performed in the region 100.

Next, an intrinsic (I-type) film having a thickness of 500 to 1500 °, for example, 1000 ° is formed by a plasma CVD method.
An amorphous silicon film (amorphous silicon film) 104 was formed. Then, this was annealed at 550 ° C. for 4 hours in a hydrogen reducing atmosphere (preferably, a hydrogen partial pressure of 0.1 to 1 atm) or in an inert atmosphere (atmospheric pressure) to be crystallized. This annealing temperature can be set at a temperature of 450 ° C. or higher, but if it is high, it becomes the same as the conventional method. Therefore, it can be said that 450 ° C. to 550 ° C. is a preferable annealing temperature.

At this time, in the region 100 where the nickel silicide film is selectively formed, crystallization of the silicon film 104 occurs in a direction perpendicular to the substrate 101. And area 1
In the area around 00, as indicated by arrow 105, area 1
From 00, crystal growth is performed in the lateral direction (the direction parallel to the substrate). Then, in the pixel portion (shown in FIG. 4) in which the nickel silicide film is formed on the entire surface, crystal growth is performed in the direction perpendicular to the substrate 101 as indicated by 215 in the entire silicon film 104. In the above crystal growth, arrow 1
The distance of crystal growth in the direction parallel to the substrate indicated by 05 is
It is about 40 μm.

As a result of the above process, the crystalline silicon film 104 was obtained by crystallizing the amorphous silicon film. Here, in the peripheral circuit portion, crystal growth is performed in the horizontal direction (the direction parallel to the substrate 101) as shown in FIG. 2, and in the pixel portion, the crystal is grown in the vertical direction (the substrate 101) as shown in FIG. Crystal growth in the direction perpendicular to the direction).

Then, isolation between elements was performed, and an unnecessary portion of the crystalline silicon film 104 was removed to form an element region. In this step, the length of the active layer (the portion where the source / drain region and the channel formation region are formed) of the TFT is set to 40.
When the thickness is within μm, the source / drain and the channel region in the peripheral circuit portion can be formed of a crystalline silicon film crystal-grown in a direction parallel to the substrate. If at least the channel formation region is formed of a crystalline silicon film, the length of the active layer can be further increased.

After that, a thickness of 1
A silicon oxide film 106 having a thickness of 2,000 mm was formed as a gate insulating film. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 200 to 400.
° C, for example, 350 ° C, the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1
It was as follows. Subsequently, by the sputtering method,
Aluminum (containing 0.1 to 2% of silicon) having a thickness of 6000 to 8000 °, for example, 6000 ° was deposited.
Note that it is preferable that the step of forming the silicon oxide film 106 and the aluminum film be performed continuously.

Then, the aluminum film was patterned to form gate electrodes 107 and 109. Needless to say, these steps are performed simultaneously in FIG. 2C and FIG. 4C.

Further, the surface of the aluminum electrode was anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. Obtained oxide layer 10
8,110 had a thickness of 2000 mm. The oxides 108 and 110 are used in a later ion doping step (an ion implantation step of a doping material for imparting a conductivity type).
In the above, since the thickness is such that the offset gate region is formed, the length of the offset gate region can be determined in the anodic oxidation step.

Next, impurities (phosphorus and boron) were implanted into the active region using the gate electrode 107 and the surrounding oxide layer 108 and the gate electrode 109 and the surrounding oxide layer 110 as masks by ion doping. Phosphine (PH ₃ ) and diborane (B
₂ H ₆ ), and in the former case, the accelerating voltage is 60 to 90
kV, for example 80 kV, in the latter case 40-80 k
V, for example, 65 kV. Dose amount is 1 × 10 ¹⁵ -8
× 10 ¹⁵ cm ^-2 , for example, phosphorus was set to 2 × 10 ¹⁵ cm ^-2 and boron was set to 5 × 10 ¹⁵ . At the time of doping, each element was selectively doped by covering a region not requiring doping with a photoresist. As a result, N-type impurity regions 114 and 116 and P-type impurity regions 111 and 113 are formed. As shown in FIG. 2, a P-channel TFT (PTFT) and an N-channel TFT (NTT) are formed.
FT). At the same time, an N-channel TFT could be formed as shown in FIG.

Thereafter, annealing was performed by irradiation with laser light to activate the ion-implanted impurities. As the laser light, a KrF excimer laser (wavelength 24
Although 8 nm and a pulse width of 20 nsec were used, other lasers may be used. The irradiation condition of the laser light is such that the energy density is 200 to 400 mJ / cm ² , for example, 250.
mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one location. It is useful to heat the substrate to about 200 to 450 ° C. at the time of this laser light irradiation. In this laser annealing step, nickel is diffused in the previously crystallized region, so that the laser light irradiation facilitates recrystallization, and the impurity doped with an impurity imparting a P-type. Regions 111 and 11
Third, the impurity regions 114 and 116 doped with an impurity imparting N-type could be easily activated.

Subsequently, in the peripheral circuit portion, as shown in FIG. 2, a silicon oxide film 118 having a thickness of 6000 ° is formed as an interlayer insulator by a plasma CVD method, and a contact hole is formed in the silicon oxide film 118 to form a metal material. For example, by using a multilayer film of titanium nitride and aluminum, the
Wirings 117, 120, and 119 were formed. Further, in the pixel portion, as shown in FIG. 4, an interlayer insulator 211 is formed of silicon oxide, and after forming a contact hole, an ITO electrode 212 serving as a pixel electrode, metal wirings 213 and 214,
Was formed. Finally, at 350 ° C. in a hydrogen atmosphere of 1 atm.
30 minutes annealing, TFT circuit or TFT
Was completed. (FIG. 2 (D), FIG. 4 (D))

The circuit shown in FIG. 2 has a CMOS structure in which a PTFT and an NTFT are provided in a complementary manner. In the above-described process, two TFTs are simultaneously formed and cut at the center to form two independent TFTs. It is also possible to manufacture them at the same time.

FIG. 3 shows a schematic top view of FIG. 2D in order to show the positional relationship between the region where nickel is selectively introduced and the TFT in the structure shown in FIG. In FIG. 3, a small amount of nickel is selectively added to a region indicated by 100, and crystal growth is performed in a lateral direction (horizontal direction on the paper) by thermal annealing. Then, in the region where the lateral crystal growth has been performed, the source /
Drain regions 111 and 113, channel formation region 112
Are formed as PTFTs. Similarly, the source / drain regions 114 and 116 and the channel formation region 115 are NT
Formed as FT.

In the above-mentioned structure, since the direction in which carriers flow and the direction of crystal growth are aligned, the movement of the carriers does not cross the grain boundaries and the operation of the TFT can be improved. For example, the mobility of the PTFT manufactured in the process shown in FIG.
² / Vs, which is 50 to 6 which is the mobility of the conventional PTFT.
It has been confirmed that it can be improved to more than 0 cm ² / Vs. Also, regarding NTFT, 150 to 180 cm ²
/ Vs, which is 80 to 100 c
A high value is obtained as compared with m ² / Vs.

In FIG. 3, the gate electrodes (107 and 1)
09) Below, a gate insulating film and a channel formation region are provided. As can be seen from FIG. 3, a plurality of TFTs can be formed at the same time by further lengthening the nickel-added region (extending vertically in FIG. 2).

On the other hand, the NTFT formed in the pixel portion shown in FIG.
16, the direction of the carrier flowing (moving) between
Since the direction of crystal growth indicated by 15 is perpendicular to
When carriers move, they have to cross grain boundaries,
The mobility was 30 to 80 cm ² / Vs, which was similar to or lower than that of the conventional NTFT. However,
When the characteristics of the NTFT shown in FIG. 4 were examined, it was confirmed that the off-state current was smaller than that of the NTFT shown in FIG. This is an important characteristic when used for driving a pixel electrode, and is a significant TFT as a TFT for driving a pixel electrode. Note that the conventional TFT referred to here is a TFT using a crystalline silicon film obtained by crystallizing an amorphous silicon film formed on a glass substrate by thermal annealing at 600 degrees for 24 hours. .

In the present embodiment, as a method for introducing Ni, it is difficult to selectively observe Ni as a thin film (because it is extremely thin) on the surface of the underlying film 102 under the amorphous silicon film 104. ), And a method of growing crystals from this portion was adopted. However, the amorphous silicon film 1
After the formation of 04, a method of selectively adding a small amount of nickel to the upper surface thereof may be used. That is, crystal growth may be performed from the upper surface side or the lower surface side of the amorphous silicon film.
In addition, an amorphous silicon film is formed in advance, and nickel ions are added to the amorphous silicon film 104 by ion doping.
May be employed. This case has a feature that the concentration of the nickel element can be controlled. Instead of forming a nickel thin film, a small amount of nickel may be added by plasma processing.

In producing a TFT, the crystal growth direction is not simply set to be perpendicular or parallel to the carrier flow, but by setting the angle between the carrier flow direction and the crystal growth direction at an arbitrary angle. Also, the characteristics of the TFT can be controlled.

Embodiment 2 FIGS. 5 and 6 show this embodiment. On a glass substrate 501, a thickness of 1000 to 500
After forming a silicon oxide film 502 of 0 °, for example, 2000 °, an amorphous silicon film of 300 to 1500 °, for example, 500 ° in thickness was formed by a plasma CVD method. Further, 500-1500 °, for example, 500 °
Of silicon oxide film 504 was formed. It is desirable that these films are formed continuously. Then, the silicon oxide film 504
Window for selectively etching and introducing nickel
6 was opened in the area where the TFT of the peripheral drive circuit was formed. At the same time, the silicon oxide film 504 was removed in the pixel region.

Then, a nickel salt film 505 was formed by spin coating. The method will be described. First, nickel acetate or nickel nitrate is diluted with water or ethanol, and then diluted with 25 to 200.
ppm, for example 100 ppm.

On the other hand, the substrate is immersed in a hydrogen peroxide solution or a mixed solution of hydrogen peroxide solution and ammonia to form an extremely thin silicon oxide film on the exposed portions of the amorphous silicon film (the window 506 region and the pixel region). Formed. This is for improving the interface affinity between the nickel solution prepared as described above and the amorphous silicon film.

The substrate thus treated was placed on a spinner, gently rotated, and 1 to 10 ml, for example, 2 ml, of a nickel solution was dropped on the substrate to spread the solution over the entire surface of the substrate. This state was maintained for 1 to 10 minutes, for example, 5 minutes. Thereafter, spin drying was performed by increasing the rotation speed of the substrate. This operation may be repeated more than once.
Thus, a thin film 505 of nickel salt was formed. (FIG. 5 (A))

Thereafter, in a heating furnace, 520 to 580
C. for 4 to 12 hours, for example, 550.degree. C. for 8 hours. The atmosphere was nitrogen. As a result, first, nickel was diffused immediately below the window 506 and in the pixel region, and crystallization started from this region. The direction of crystallization was perpendicular to the substrate. Then, the crystallization region spread around the periphery. At this time, the direction of crystallization was parallel to the substrate. As a result, regions having three different properties were formed. The first is the area 507 immediately below the window 506
Alternatively, in the pixel region 510, crystallization progresses perpendicularly to the substrate. Second is the regions 507, 510
Is a region where crystallization has progressed horizontally with respect to the substrate. On the other hand, the region 509 far away from the window 506 remained amorphous silicon. (FIG. 5 (B))

Thereafter, in the air or oxygen atmosphere, KrF excimer laser light (wavelength: 248 nm) or XeCl excimer laser light (wavelength: 308 nm) was irradiated for 1 to 20 shots, for example, 5 shots to further improve the crystallinity. Energy density is 200-3
The substrate temperature was 50 mJ / cm ² and the substrate temperature was 200 to 400 ° C. (FIG. 5 (C))

After that, the silicon film 503 is etched,
The TFT region of the peripheral circuit and the TFT region of the pixel portion were formed. In this case, the design was made such that the region 508 came to the channel region of the TFT of the peripheral circuit. And the thickness 1
A silicon oxide film 511 of 000 to 1500 °, for example, 1200 ° is formed, and gate electrodes 512 and 5 are formed of aluminum and its anodic oxide film in the same manner as in the first embodiment.
13, 514 were formed. The gate electrode portion 512 is a PTFT of a peripheral circuit, 513 is an NTFT of the same, and 514 is a gate electrode of a TFT of a pixel portion.

Then, using these gate electrode portions as masks, N-type and P-type impurities were implanted into the silicon film by ion doping as in Example 1. As a result,
The source 515 of the PTFT of the peripheral circuit, the channel 516,
A drain 517, a source 520 of the NTFT of the peripheral circuit,
Channel 519, drain 518, NTFT of pixel part
521, a channel 522, and a drain 523 were formed. After that, laser irradiation was performed on the entire surface in the same manner as in Example 1 to activate the doped impurities. (FIG. 6 (A))

After that, as an interlayer insulating material,
A silicon oxide film 524 of 8000 °, for example, 5000 ° was formed. Further, a thickness of 5
An ITO film having a thickness of 100 to 1000 Å, for example, 800 Å was formed, and this was patterned and etched to form a pixel electrode 525. Thereafter, contact holes are formed in the source / drain of the TFT, and titanium nitride (thickness of 100
0Å) and aluminum (5000Å) are deposited and patterned and etched to form electrodes and
Wirings 526 to 530 were formed. In this manner, the peripheral circuit was formed of crystalline silicon, and the pixel portion was formed of amorphous silicon. (FIG. 6 (B))

In this embodiment, as shown in FIG. 5C, laser irradiation is performed. In this step, the amorphous component remaining between the silicon crystals grown in the shape of needles is crystallized, and the crystallization is performed with the needle-like crystals as nuclei so that the needle-like crystals become thicker. This expands the region through which the current flows, and allows a larger drain current to flow.

FIG. 7 shows this state. FIG. 7 shows a thinned crystallized silicon film observed by a transmission electron microscope (TEM). FIG. 7A shows the vicinity of the tip of the crystallized region of the silicon film crystallized by the lateral growth, and needle-like crystals are observed. Further, it can be seen that there are many non-crystallized amorphous regions between the crystals. (FIG. 7 (A))

When this is irradiated with a laser under the conditions of this embodiment, the result is as shown in FIG. By this step, FIG.
The amorphous region which occupies most of the area of (A) is crystallized, but since this crystallization occurs randomly, the electrical characteristics are not so good. Noteworthy is the crystalline state of the region between the needle-like crystals observed near the center, which seems to be originally amorphous. Here, a thick crystal region is formed so as to grow from a needle crystal. (FIG. 7
(B))

FIG. 7 is, for simplicity, relatively
Although the top region of crystal growth with many amorphous regions was observed, the same is true near the root or center of crystal growth. As described above, by laser irradiation, the amorphous portion can be reduced and the needle-like crystal can be made thick, and the characteristics of the TFT can be further improved.

[0060]

In the active matrix type liquid crystal display device, the TFT in the peripheral circuit portion is formed of a crystalline silicon film crystal-grown in a direction parallel to the flow of the carrier, and the TFT in the pixel portion is formed by the flow of the carrier. , The peripheral circuit portion can be operated at a high speed, and the pixel portion has an off-current value required for charge retention. A structure in which a small TFT is provided can be obtained.

[Brief description of the drawings]

FIG. 1 shows an outline of an embodiment.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows an outline of an embodiment.

FIG. 4 shows a manufacturing process of an example.

FIG. 5 shows a manufacturing process of an example.

FIG. 6 shows a manufacturing process of the example.

FIG. 7 shows a crystal structure of an example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Glass substrate 102 Base film (silicon oxide film) 103 Mask 100 Nickel trace addition region 105 Crystal growth direction 107 Gate electrode 108 Anodized layer 109 Gate electrode 110 Anodized layer 111 Source / drain region 112 Channel formation region 113 Drain / source region 114 Source / drain region 115 Channel formation region 116 Drain / source region 117 electrode 118 interlayer insulator 119 electrode 120 electrode 211 interlayer insulator 213 electrode 214 electrode 212 ITO (pixel electrode) 215 Crystal growth direction

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[Procedure amendment]

[Submission date] June 13, 2001 (2001.6.1
3)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 27/08 331 G02F 1/1368 5G435 29/786 H01L 29/78 627G // G02F 1/1368 618F 618Z 612B F-term (reference) 2H092 GA59 JA25 JA29 JA39 JA46 JB13 JB23 JB32 JB38 MA05 MA08 MA13 MA17 MA27 MA29 MA35 MA37 NA22 NA25 5C094 AA22 BA03 BA43 CA19 EA04 EA07 FB15 5F048 AB10 AC03 BA16 BD06 BG07 5F052 AA02 AA02 AA02A17 5F110 AA01 AA06 BB02 BB04 CC02 DD02 DD13 EE03 EE06 EE34 EE44 FF02 FF28 GG02 GG13 GG23 GG25 GG35 GG45 HJ01 HJ04 HJ12 HJ23 HL01 HL03 HL11 HM14 NN02 NN04 NN23 Q13 NP13 Q11 NN35 NN23

Claims (10)

[Claims] 1. A semiconductor film is formed over a substrate having an insulating surface, an element which promotes crystallization is selectively added to the semiconductor film, and the region where the element is selectively added by heating is applied to the insulating surface. A method for manufacturing a semiconductor device, comprising: crystal growing the semiconductor film in a parallel direction; etching the semiconductor film to form an island-shaped semiconductor film; and forming a source region and a drain region in the island-shaped semiconductor film. Wherein the direction in which the source region and the drain region are connected is aligned with the direction of crystal growth of the semiconductor film. 2. A semiconductor film is formed over a substrate having an insulating surface, an element which promotes crystallization is selectively added to the semiconductor film, and the region where the element is selectively added by heating is applied to the insulating surface. A semiconductor for forming a thin film transistor by growing the semiconductor film in a parallel direction, etching the semiconductor film to form an island-shaped semiconductor film, and forming a source region and a drain region in the island-shaped semiconductor film; A method for manufacturing a device, comprising: arranging a thin film transistor such that a moving direction of carriers in the thin film transistor coincides with a crystal growth direction of the semiconductor film. 3. A semiconductor film is formed over a substrate having an insulating surface, an element which promotes crystallization is selectively added to the semiconductor film, and the region where the element is selectively added by heating is applied to the insulating surface. Manufacturing a semiconductor device in which the semiconductor film is crystal-grown in parallel directions, the semiconductor film is etched to form a plurality of island-shaped semiconductor films, and a source region and a drain region are formed in each of the island-shaped semiconductor films. A method for manufacturing a semiconductor device, comprising: arranging, in each island-shaped semiconductor film, a direction connecting a source region and a drain region to coincide with a crystal growth direction of the semiconductor film. 4. A semiconductor film is formed over a substrate having an insulating surface, an element which promotes crystallization is selectively added to the semiconductor film, and the region where the element is selectively added by heating is applied to the insulating surface. Crystal growing the semiconductor film in a parallel direction, etching the semiconductor film to form a plurality of island-shaped semiconductor films, forming a source region and a drain region in each of the island-shaped semiconductor films, A method for manufacturing a semiconductor device for forming a thin film transistor, wherein each thin film transistor is arranged such that a moving direction of a carrier coincides with a crystal growth direction of a semiconductor film. 5. A method for manufacturing a semiconductor device having a pixel portion and a driving circuit portion, comprising forming a semiconductor film over a substrate having an insulating surface, and promoting crystallization of the semiconductor film in the driving circuit portion. Is selectively added, an element that promotes crystallization is added to the semiconductor film in the pixel portion, and by heating,
In the drive circuit portion, the semiconductor film is crystal-grown in a direction parallel to an insulating surface from a region where the element is selectively added, and the semiconductor film is crystal-grown in a direction perpendicular to the insulating surface in the pixel portion, After crystal growth, the semiconductor film is etched in the pixel portion and the drive circuit portion to form a plurality of island-shaped semiconductor films, and a source region and a drain region are formed in each of the island-shaped semiconductor films. A method for manufacturing a semiconductor device, wherein a direction connecting a source region and a drain region in an island-shaped semiconductor film in the drive circuit portion is arranged so as to coincide with a crystal growth direction of the semiconductor film. 6. A method for manufacturing a semiconductor device having a pixel portion and a driver circuit portion, wherein a semiconductor film is formed over a substrate having an insulating surface, and the semiconductor film in the driver circuit portion promotes crystallization. Is selectively added, an element that promotes crystallization is added to the semiconductor film in the pixel portion, and by heating,
In the drive circuit portion, the semiconductor film is crystal-grown in a direction parallel to an insulating surface from a region where the element is selectively added, and the semiconductor film is crystal-grown in a direction perpendicular to the insulating surface in the pixel portion, After crystal growth, the semiconductor film is etched in the pixel portion and the drive circuit portion to form a plurality of island-shaped semiconductor films, and a source region and a drain region are formed in each of the island-shaped semiconductor films. Forming a plurality of thin film transistors, and arranging the plurality of thin film transistors in the island-shaped semiconductor film in the drive circuit portion so that a carrier movement direction coincides with a crystal growth direction of the semiconductor film. 7. The method according to claim 1, wherein
A method for manufacturing a semiconductor device, wherein the semiconductor film formed over the substrate having an insulating surface is an amorphous silicon film. 8. The method according to claim 1, wherein
The method for manufacturing a semiconductor device, wherein a temperature of the heating is 450 ° C. to 550 ° C. 9. The method according to claim 1, wherein
The method for manufacturing a semiconductor device, wherein the element that promotes crystallization is Ni, Fe, Co, Pd, or Pt. 10. The method for manufacturing a semiconductor device according to claim 1, wherein a region to which the element is selectively added has a slit shape.