JP2004031951A - Thin film transistor on glass substrate and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin film transistor which utilizes a crystalline silicon film crystal grown in the direction parallel to a glass substrate. <P>SOLUTION: An element which promote crystallization of a silicon film is added to one region of the silicon film on the glass substrate where a base material film is formed. The crystalline silicon film is formed by crystal growing by a prescribed length from the region in one direction parallel to the glass substrate by heating. An amorphous part remaining in the crystalline silicon film is crystallized by irradiating with laser, and then the crystalline silicon film is patterned to form an island region whose length is 40 μm or less, over which a gate insulating film and a gate electrode are formed. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate such as glass and a method for manufacturing the same.
[0002]
[Prior art]
As a semiconductor device having TFTs on an insulating substrate such as glass, an active type liquid crystal display device and an image sensor using these TFTs for driving pixels are known.
[0003]
In general, a thin film silicon semiconductor is used for a TFT used in these devices. Thin-film silicon semiconductors are broadly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having the same, a method for manufacturing a TFT made of a silicon semiconductor having crystallinity has been strongly demanded in order to obtain higher speed characteristics in the future. Note that, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .
[0004]
As a method of obtaining a silicon semiconductor in the form of a thin film having such crystallinity,
(1) A film having crystallinity is directly formed at the time of film formation.
(2) An amorphous semiconductor film is formed and crystallinity is imparted by the energy of laser light.
(3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy.
Is known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or higher, so that the method is inexpensive. There was also a cost problem that a glass substrate could not be used. In the method (2), taking an excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low. The stability of the laser is not enough to uniformly process, and it seems to be a next-generation technology. The method (3) has an advantage of being able to cope with a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more, and is inexpensive. Considering the use of a substrate, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen is becoming larger, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, in the case of 7059 glass, which is currently most commonly used, the strain point is 593 ° C., and the conventional heating crystallization method causes large deformation. In addition to the problem of temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.
[0005]
[Problems to be solved by the invention]
The present invention provides a means for solving the above problems. More specifically, in a method of manufacturing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Of course, a crystalline silicon semiconductor manufactured using the process provided by the present invention has physical properties equivalent to or higher than those manufactured by the conventional technology, and can be used for the active layer region of the TFT. It goes without saying that there is something.
[0006]
[Background of the Invention]
The present inventors have conducted the following experiments on the method of forming an amorphous silicon semiconductor film by a CVD method or a sputtering method and crystallizing the film by heating as described in the section of the related art. And discussions.
[0007]
First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallization of the film by heating is examined. The crystal growth starts from the interface between the glass substrate and amorphous silicon. Above the film thickness, it was recognized that the film proceeded in a columnar shape perpendicular to the substrate surface.
[0008]
The above phenomenon is caused by the fact that a crystal nucleus (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be due to Such crystal nuclei are formed by the presence of a crystalline component of silicon oxide on the surface of a glass substrate such as an impurity metal element or a crystal component on a glass surface (as called crystallized glass). Is considered).
[0009]
Therefore, we thought that it would be possible to lower the crystallization temperature by introducing crystal nuclei more aggressively, and in order to confirm the effect, deposited a small amount of other metal on the substrate, An experiment was conducted in which a thin film made of crystalline silicon was formed and then heated and crystallized. As a result, when some metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was expected that crystal growth using foreign substances as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals that could be reduced in temperature was investigated in more detail.
[0010]
Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of point-like fine crystals at a constant temperature. The case was also shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. Although this mechanism is not clear at present, it is speculated that some catalytic effect is acting.
[0011]
In any case, due to the above two effects, when a thin film made of amorphous silicon is formed on a small amount of a certain kind of metal, and then heated and crystallized, it is difficult to think in the past. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less for about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and a material selected by us is nickel. In addition, examples of the metal element having a catalytic action on the crystallization include Fe, Co, Pd, and Pt.
[0012]
An example of the effect of nickel is as follows. An amorphous silicon film formed by a plasma CVD method on a substrate (Corning 7059 glass) on which no treatment is performed, that is, a thin film of nickel is not formed. When a thin film made of silicon is crystallized by heating in a nitrogen atmosphere, when the heating temperature is set to 600 ° C., a heating time of 10 hours or more is required. In the case where a thin film made of amorphous silicon on a substrate was used, a similar crystallization state could be obtained by heating for about 4 hours. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.
[0013]
[Means for Solving the Problems]
As can be seen from the above description, when a thin film of amorphous silicon is formed on a thin film of nickel, a lower crystallization temperature and a shorter time for crystallization can be achieved. . Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT. As will be described in detail later, the nickel thin film is formed not only on the substrate but also on amorphous silicon, and has the same effect. In the following, such a series of treatments will be referred to as “addition of trace amount of nickel”.
[0014]
First, a method of adding a trace amount of nickel will be described. In the method of adding a small amount of nickel, a method of forming a small amount of nickel thin film on a substrate and then forming an amorphous silicon film also forms an amorphous silicon film first and then forms a small amount of nickel thin film thereon. The method of forming a film also has the effect of lowering the temperature similarly, and it has been found that the film forming method can be a sputtering method, a vapor deposition method, a spin coating method, a coating method, and the film forming method does not matter. I have. However, when a very small amount of nickel thin film is formed on a substrate, rather than forming a very small amount of nickel thin film directly on a 7059 glass substrate, a thin film of silicon oxide is formed on the same substrate and a very small amount of silicon oxide is formed thereon. The effect is more remarkable when a thin nickel thin film is formed. One possible reason for this is that direct contact between silicon and nickel is important for low-temperature crystallization, and in the case of 7059 glass, components other than silicon inhibit contact or reaction between the two. It may be that.
[0015]
As a method of adding a trace amount, almost the same effect was confirmed by adding nickel by ion implantation in addition to forming a thin film in contact with above or below amorphous silicon. For the amount of nickel, 1 × 10 ^Fifteen atoms / cm ³ It has been confirmed that the addition of the above amount lowers the temperature. ²¹ atoms / cm ³ atoms / cm ³ At the above addition amount, since the shape of the peak of the Raman spectrum is clearly different from that of the simple substance of silicon, only 1 × 10 ^Fifteen atoms / cm ³ ~ 5 × 10 ¹⁹ atoms / cm ³ Seems to be in the range. Nickel concentration is 1 × 10 ^Fifteen atoms / cm ³ If the content is below, the nickel element is localized and the function as a catalyst is reduced. Further, when the concentration of nickel is 5 × 10 ¹⁹ atoms / cm ³ If it is above, it becomes a compound of NiSi and semiconductor characteristics are lost. In the crystallized state, the lower the concentration of nickel, the more it can be used as a semiconductor. From the above considerations, considering the use as a semiconductor in an active layer of a TFT or the like, this amount is 1 × 10 ^Fifteen atoms / cm ³ ~ 1 × 10 ¹⁹ atoms / cm ³ It is necessary to keep it low.
[0016]
Next, a description will be given of a crystal form in the case where a trace amount of nickel is added. As described above, when nickel is not added, nuclei are randomly generated from crystal nuclei at the substrate interface or the like, and crystal growth from the nuclei is also random up to a certain film thickness, and is generally performed for thicker thin films. It is known that columnar crystal growth in which the (110) direction is arranged perpendicular to the substrate is performed. Naturally, almost uniform crystal growth is observed over the entire thin film. On the other hand, the one added with a small amount of nickel at this time had a feature that the crystal growth was different between the region where nickel was added and the vicinity thereof. That is, in the region where nickel is added, the added nickel or its compound with silicon becomes a crystal nucleus, and the columnar crystal grows almost perpendicular to the substrate similarly to the case where nickel is not added. It became clear from the micrograph. Crystallization at a low temperature was confirmed even in a region where a small amount of nickel was not added in the vicinity thereof, and in that portion, a direction perpendicular to the substrate was arranged at (111), and needle-like or columnar crystals were parallel to the substrate. An unusual crystal growth of growth was observed. In this lateral crystal growth parallel to the substrate, it was observed that, in the region where a small amount of nickel was added, the growth was as large as several hundred μm, and the growth amount increased in proportion to the increase in time and temperature. I knew I was going to do it. As an example, a growth of about 40 μm was observed at 550 ° C. for 4 hours. Moreover, according to the transmission electron beam micrograph, it has been found that each of the large lateral crystals is a single crystal like. The nickel concentration of the nickel-added portion, the laterally grown portion in the vicinity thereof, and the amorphous portion further away (the low-temperature crystallization is not performed in a portion far away and the amorphous portion remains) is determined by SIMS ( Inspection by secondary ion mass spectrometry) revealed that the laterally grown portion was detected by about one order of magnitude less than the nickel added portion, and diffusion in amorphous silicon was observed. The amount of the amorphous portion was further reduced by about one digit. The relationship between this and the crystal morphology is not clear at present, but in any case, it is possible to form a silicon thin film having crystallinity of a desired crystal morphology in a desired portion by controlling the amount of nickel added and its position. is there.
[0017]
Next, the electric characteristics of the nickel-added portion and the lateral growth portion in the vicinity thereof will be described. Regarding the electrical characteristics of the nickel-added portion, the electrical conductivity is almost the same as that of a film to which almost no nickel is added, that is, a film that has been crystallized at about 600 ° C. for several tens of hours. When the activation energy was determined from the properties, the amount of nickel added was 10 ¹⁷ atoms / cm ³ -10 ¹⁸ atoms / cm ³ When the degree was set to about the degree, no behavior that might be caused by the nickel level was observed. That is, if it is limited to this fact, the concentration of nickel in the crystalline silicon semiconductor film becomes 10%. ¹⁸ atoms / cm ³ In the following cases, it is understood that there is no inconvenience even when a semiconductor device, for example, a TFT is manufactured using this film.
[0018]
On the other hand, the laterally-grown portion has a conductivity that is at least one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is thought to be due to the fact that the current path direction coincided with the lateral growth direction of the crystal, so that few or almost no grain boundaries existed during the passage of electrons between the electrodes. Consistent with the results.
[0019]
However, when the laterally grown portion of the crystal is observed in detail by a transmission electron micrograph, even if the crystal direction of the needle-like or columnar crystal is parallel to the substrate surface, when viewed from above the substrate, Branch-growing portions were observed. That is, on average, it was observed that needle-like or columnar crystals grew in the same direction, but some crystals grew branching obliquely.
[0020]
As a result of considering the above observation results, the present inventors have reached the following conclusions.
The crystal component of the substrate material and the crystal component in the semiconductor film existing in the substrate and in the vicinity of the interface between the substrate and the semiconductor film can serve as nuclei for crystal growth. It hinders crystal growth in various directions and promotes random crystal growth.
[0021]
Therefore, in the present invention, the crystal component in the vicinity of the interface between the substrate in the region where crystal growth is performed and the amorphous silicon semiconductor film (a crystal component exists as a matter of a degree even if amorphous) is not considered. By the ion implantation of the active element, it is removed as much as possible and becomes completely amorphous. Then, in a state where there is no component to be a crystal nucleus, by performing crystal growth in a lateral direction (a direction parallel to the substrate surface), a needle-like or column-like crystal growth in which the crystal growth directions are generally aligned is obtained. The point is to do it. In particular, by implanting inert ions mainly in the substrate, the surface of the substrate can be positioned near the surface of the substrate (if a base film is formed on the surface of the substrate, the surface of the base film is regarded as the surface of the substrate). It is characterized in that the interface with the semiconductor film, and further, the semiconductor film itself is thoroughly amorphized, and components having crystallinity that can be nuclei during crystallization are removed as much as possible.
[0022]
In this way, a crystalline silicon film can be obtained by selectively performing crystallization, but if the characteristics of such a crystalline silicon film are to be further improved, a laser Alternatively, by irradiating an intense light equivalent thereto, an insufficiently crystallized component remaining at a grain boundary or the like may be crystallized. In this step, the remaining amorphous component grows with the crystal formed in the previous heating step as a nucleus, and the grain boundaries disappear, so that higher characteristics can be obtained.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described in more detail with reference to Examples.
[0024]
【Example】
[Example 1]
This embodiment is an example of forming a circuit in which a P-channel TFT (referred to as PTFT) using crystalline silicon and an N-channel TFT (referred to as NTFT) using crystalline silicon are combined in a complementary manner on a glass substrate. The configuration of this embodiment can be used for a peripheral driver circuit or an image sensor of an active type liquid crystal display device.
[0025]
FIG. 1 shows a cross-sectional view of a manufacturing process of this embodiment. First, a 2000-nm-thick silicon oxide base film 102 is formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a silicon oxide film 103 serving as a mask is provided. The silicon oxide film 103 exposes the base film 102 in a slit shape and needs to have a thickness of 1000 ° or more. It is also useful to add a material having a gettering effect to the mask 103, for example, phosphorus or chlorine. When this state is viewed from above, the base film 102 is exposed in a slit shape, and the other portions are masked.
[0026]
After providing the silicon oxide film 103, a nickel silicide film (chemical formula NiSi) having a thickness of 5 to 200 °, for example, 20 °, is formed by a sputtering method. _x , 0.4 ≦ x ≦ 2.5, for example, x = 2.0) 98 is selectively formed in the 100 region. That is, a trace amount of nickel is selectively added to a region indicated by 100. (Fig. 1 (A))
[0027]
Next, the silicon oxide film 103 serving as a mask is removed, and an intrinsic (I-type) amorphous silicon film 104 having a thickness of 500 to 1500 Å, for example, 1000 例 え ば is formed by a plasma CVD method. This amorphous silicon film 104 may be a film having crystallinity. That is, any non-single-crystal silicon film may be used. Further, a silicon oxide film 99 serving as a protective film is formed to a thickness of 100 to 1000 °. This silicon oxide film is provided to prevent the surface of the silicon film 104 from being damaged at the time of subsequent ion implantation.
[0028]
Then, implantation of silicon ions, which are inert elements, is performed on the entire surface of the silicon film 104. This implantation of silicon ions is performed in order to perform crystal growth in a uniform direction in a later thermal annealing step. Therefore, a pre-existing substrate (here, the substrate including the base film 102 is considered) and an amorphous silicon semiconductor are implanted. This is for removing a crystal component (a silicon oxide crystal component in the substrate or a crystal component in the amorphous semiconductor film) at the interface with the film.
[0029]
Conditions for this implantation of silicon ions are set so that the implantation is performed at a dose amount as shown in FIG. In FIG. 5, a portion indicated by a dotted line is an interface portion between the base film 102 and the amorphous silicon film 104. And the maximum value of the dose amount is 5 × 10 ¹⁴ cm ^-2 And At the time of the implantation of the silicon ions, the amorphous silicon film 104 itself and the amorphous silicon The interface between the porous silicon film 104 and the silicon oxide film 99 and the vicinity thereof are made amorphous. The dose of silicon ions is 1 × 10 ¹⁴ ~ 9 × 10 ¹⁶ cm ^-2 It is preferable that
[0030]
In this step of implanting silicon ions, the surface of the amorphous silicon film is covered with the silicon oxide film 99, so that damage to the accelerating ions can be reduced. In order to prevent silicon ions from being implanted into the 100 regions where a trace amount of nickel has been added, it is also useful to form a mask on this region. This is to prevent unnecessary diffusion of the nickel element during ion implantation.
[0031]
Then, the silicon oxide silicon film 99 is removed, and is annealed at 550 ° C. for 4 hours in a hydrogen reducing atmosphere (preferably, a partial pressure of hydrogen is 0.1 to 1 atm) or in a nitrogen atmosphere (atmospheric pressure). The crystalline silicon film 104 is crystallized. At this time, in the region 100 where the nickel silicide film is selectively formed, crystallization of the silicon film 104 occurs in a direction perpendicular to the substrate 101. Then, in a region other than the region 100, as indicated by an arrow 105, crystal growth is performed in a lateral direction (a direction parallel to the substrate) from the region 100. The crystallization temperature can be in the range of 450 ° C. to 700 ° C., but if it is high, the problem of heat resistance of the glass substrate occurs as in the conventional case.
[0032]
In the region where the lateral crystal growth is performed, the interface between the base film 102 and the silicon film 104 and the vicinity thereof, and the amorphous silicon film itself are completely amorphized. At the time of crystallization shown by, there is no crystal component that causes the crystallization direction to be disturbed, and uniform lateral growth can be performed.
[0033]
As a result of the above steps, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. Thereafter, isolation between elements is performed by patterning, and a silicon oxide film 106 having a thickness of 1000 ° is formed as a gate insulating film by a sputtering method. For sputtering, silicon oxide is used as a target, the substrate temperature during sputtering is 200 to 400 ° C., for example, 350 ° C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less. did. Subsequently, aluminum (including 0.1 to 2% of silicon) having a thickness of 6000 to 8000, for example, 6000, is formed by a sputtering method. Note that it is preferable that the step of forming the silicon oxide film 106 and the aluminum film be performed continuously.
[0034]
Then, the silicon film is patterned to form gate electrodes 107 and 109. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layers 108 and 110 is 2000 °. Since the oxides 108 and 110 have a thickness for forming an offset gate region in a later ion doping step, the length of the offset gate region can be determined in the anodic oxidation step.
[0035]
Next, impurities (phosphorus and boron) are implanted into the region of the crystalline silicon film by ion doping using the gate electrode 107 and the surrounding oxide layer 108 and the gate electrode 109 and the surrounding oxide layer 110 as masks. Phosphine (PH) as doping gas ₃ ) And diborane (B ₂ H ₆ ), The acceleration voltage was set to 60 to 90 kV, for example, 80 kV in the former case, and 40 to 80 kV, for example, 65 kV in the latter case. Dose amount is 1 × 10 ^Fifteen ~ 8 × 10 ^Fifteen cm ^-2 , For example, 2 × 10 ^Fifteen cm ^-2 , Boron 5 × 10 ^Fifteen And At the time of doping, each element was selectively doped by covering one region with a photoresist. As a result, N-type impurity regions 114 and 116 and P-type impurity regions 111 and 113 are formed, and a P-channel TFT (PTFT) region and an N-channel TFT (NTFT) region can be formed. Was.
[0036]
Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser light is such that the energy density is 200 to 400 mJ / cm. ² , For example, 250 mJ / cm ² Then, 2 to 10 shots, for example, 2 shots were irradiated per one place. It is useful to heat the substrate to about 200 to 450 ° C. during the irradiation with the laser light. In this laser annealing step, since nickel is diffused in the previously crystallized region, re-crystallization easily proceeds by this laser light irradiation, and impurities doped with an impurity imparting a P-type are doped. The regions 111 and 113, and the impurity regions 114 and 116 doped with an impurity for imparting N were easily activated.
[0037]
Subsequently, a silicon oxide film 118 having a thickness of 6000 ° is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed in the silicon oxide film 118, and a metal material, for example, a multilayer film of titanium nitride and aluminum is used to form a TFT electrode / wiring. 117, 120 and 119 were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm. The semiconductor circuit was completed by the above steps. (Fig. 1 (D))
[0038]
The circuit shown above has a CMOS structure in which a PTFT and an NTFT are provided in a complementary manner. However, in the above process, two independent TFTs are formed at the same time, and two independent TFTs are simultaneously formed by cutting at the center. Is also possible.
[0039]
FIG. 2 shows an outline of FIG. 1D viewed from above. The Ni-added region in FIG. 2 corresponds to the region 100 shown in FIG. The lateral crystallization is performed in a state where the crystallization is substantially uniform from the Ni-added region in a direction parallel to the substrate as indicated by an arrow. Since the crystal grows in the shape of needles or columns in the moving direction of the carrier moving between the source and the drain, it is less likely to cross the grain boundary when the carrier moves, and a TFT with high mobility can be obtained. it can.
[0040]
For example, when crystallization is performed without implanting silicon ions in the step of FIG. 1B, the mobility of the TFT is 50 to 60 cm in PTFT. ² / Vs is 90 to 120 cm for the PTFT fabricated in this example. ² / Vs and a high mobility could be obtained. Also, in the case of NTFT, when silicon ion implantation is not performed, the mobility is 80 to 100 cm. ² / Vs, in this embodiment, 150 to 180 cm ² / Vs.
[0041]
In this embodiment, as a method for introducing Ni, Ni is selectively formed on the base film 102 under the amorphous silicon film 104 as a thin film (it is difficult to observe the film because it is extremely thin). Although a method of performing crystal growth from this portion is adopted, a method of selectively forming a nickel silicide film after forming the amorphous silicon film 104 may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. Alternatively, a method in which amorphous silicon is formed in advance and nickel ions are selectively implanted into the amorphous silicon film 104 by using an ion doping method may be employed. This case has a feature that the concentration of the nickel element can be controlled. Further, it is also possible to add a trace amount of nickel by plasma treatment. In the case where a nickel element is introduced by this plasma treatment, the upper surface of the semiconductor film (for example, the amorphous silicon film 104) or the upper surface of the semiconductor film (for example, the base silicon oxide film 102) or the upper surface of the semiconductor film to be added is added. Just do it. Even when Fe, Co, Pd, and Pt are used as a catalyst material for crystallization in addition to nickel, a TFT can be manufactured by the same process.
[0042]
[Example 2]
This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. In the following, one pixel will be described, but a large number (generally several hundred thousand) of other pixels are formed in a similar structure.
[0043]
FIG. 3 schematically shows a manufacturing process of this embodiment. In this example, a Corning 7059 glass substrate was used as the substrate 201. First, a base film 202 (silicon oxide) is formed over a glass substrate 201 by a sputtering method. Then, a silicon oxide film 203 having a thickness of 1000 と serving as a mask is formed. This silicon oxide film functions as a mask for exposing the base film 202 in the region 204. Thereafter, a nickel silicide film is formed. The nickel silicide film is formed to a thickness of 5 to 200 °, for example, 20 ° by a sputtering method. This nickel silicide film has the chemical formula NiSi _x , 0.4 ≦ x ≦ 2.5, for example, x = 2.0.
[0044]
Thereafter, after removing the silicon oxide film 203 as a mask, an amorphous silicon film 205 (thickness: 300 to 1500 Å) is formed by LPCVD or plasma CVD, and a silicon oxide protective film 200 is formed to a thickness of 500 Å. Formed. (FIG. 3 (B))
[0045]
Then, through the same silicon ion implantation process as in Example 1, crystallization was performed by heat annealing. This annealing step was performed at 550 ° C. for 4 hours in a hydrogen reducing atmosphere (preferably, the partial pressure of hydrogen was 0.1 to 1 atm). At this time, since a nickel silicide film is formed in a part of the region under the amorphous silicon film 205, the part is in a direction perpendicular to the substrate, and the other part is in a direction parallel to the substrate. Crystal growth occurs, and a crystalline silicon film can be obtained.
[0046]
Then, the semiconductor region (portion indicated by 204) made of crystalline silicon is patterned to form an island-shaped semiconductor region (TFT active layer). Further, a gate insulating film (thickness 700 to 1200 Å, here 1000 Å) 206 of silicon oxide is formed by plasma CVD in an oxygen atmosphere using tetraethoxysilane (TEOS) as a raw material.
[0047]
Next, a silicon gate electrode 207 is formed. After that, phosphorus as an N-type impurity is implanted into the crystalline silicon film in a self-aligning manner by an ion doping method to form source / drain 208 and 209 of the TFT. Further, as shown by an arrow in FIG. 3C, this is irradiated with a KrF laser beam to improve the crystallinity of the silicon film having deteriorated crystallinity due to the ion doping. At this time, the energy density of the laser beam is 250 to 300 mJ / cm. ² And set. By this laser irradiation, the sheet resistance of the source / drain of this TFT is 300 to 800 Ω / cm. ² It becomes.
[0048]
After that, an interlayer insulator 211 is formed using silicon oxide, and a pixel electrode 212 is formed using ITO. Then, a contact hole is formed, and electrodes 213 and 214 are formed of a chromium / aluminum multilayer film in the source / drain region of the TFT, and one of the electrodes 214 is also connected to ITO. The chromium / aluminum multilayer film is formed by forming a chromium film having a thickness of 20 to 200 nm, typically 100 nm as a lower layer, and an aluminum film of 100 to 2000 nm, typically 500 nm as an upper layer. It is desired that these are continuously formed by a sputtering method. Finally, annealing in hydrogen at 200 to 300 ° C. for 2 hours completes the hydrogenation of silicon. Thus, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to obtain an active matrix type liquid crystal display device.
[0049]
FIG. 4 is a top view schematically showing the TFT of this embodiment. FIG. 4 shows a TFT portion and a region 204 to which a small amount of nickel has been added. FIG. 4 shows the source / drain regions 208 and 210, the channel formation region 209, and the gate electrode 207 above the channel formation region. In crystallization by thermal annealing, crystal growth occurs in a direction parallel to the substrate, as indicated by an arrow, from a region 204 into which nickel is selectively introduced. The source / drain regions 208 and 210 and the channel formation region 209 are formed using a crystalline silicon film grown in a direction parallel to the substrate. During the operation of the TFT, the carriers move between the channel forming region, that is, between the regions 208 and 210. Therefore, in the crystalline silicon film in which the crystal growth directions are aligned, the carriers are hardly affected by the grain boundaries. You can move. That is, high mobility can be obtained. Further, since the crystal growth in the lateral direction is performed at about 40 μm, the length of the active layer is preferably set to a length of 40 μm or less. Further, the nickel-doped region 204 may overlap the drain / source region 210. However, care must be taken because, when the channel formation region 209 and the nickel-doped region 204 overlap, the crystal growth direction in the channel formation region 209 is perpendicular to the substrate.
[0050]
In the above embodiment, the TFT is formed so that the carrier flows in a direction parallel to the crystal growth direction. However, by appropriately determining the direction in which the carrier flows in the TFT and the crystal growth direction, the TFT is formed. Characteristics can be controlled. That is, the rate at which carriers cross the grain boundary can be controlled by the angle between the direction in which carriers flow in the TFT (the direction of the line connecting the source and the drain) and the direction of crystal growth. By controlling, it is possible to control to some extent the resistance that the carrier experiences when moving.
[0051]
[Example 3]
In this embodiment, by selectively implanting silicon ions, a region where silicon ions are not implanted is selectively left as a silicon film having a crystalline component, and silicon ions are implanted from this region to become amorphous. This is an example in which a lateral crystal growth is performed on a region where the crystal growth is performed.
[0052]
For example, in the manufacturing process shown in FIG. 1, a small amount of nickel is selectively added to the region 100 similarly to the first embodiment, and in the process (B), the region 100 is masked with a resist to implant silicon ions. Do. At this time, the silicon film 104 is preferably formed as a film having crystallinity. Then, at the time of crystallization by heating, crystal growth as indicated by an arrow 105 can be caused from the silicon film 104 on the region 100 to the periphery thereof (the region where silicon ions have not been implanted).
[0053]
The same effect can be obtained by adding a small amount of nickel to the entire silicon film 104. However, in this case, crystal growth in the direction perpendicular to the substrate 101 using nickel as a catalyst also occurs at the same time.
[0054]
Embodiment 4 FIG. 6 shows this embodiment. After a silicon oxide film 602 having a thickness of 1000 to 5000 Å, for example, 2000 Å was formed over a glass substrate 601, an amorphous silicon film 603 having a thickness of 300 to 1500 Å, for example, 500 に よ っ て was formed by a plasma CVD method. Further, a silicon oxide film 604 of 500 to 1500 °, for example, 500 ° was formed thereon. It is desirable that these films be formed continuously. Then, the silicon oxide film 604 was selectively etched to open a window 605 for introducing nickel. The window 605 was formed so as to avoid a portion to be a TFT channel. Then, a nickel salt film 607 was formed by a spin coating method. Describing this method, first, nickel acetate or nickel nitrate was diluted with water or ethanol to a concentration of 25 to 200 ppm, for example, 100 ppm.
[0055]
On the other hand, the substrate was immersed in a hydrogen peroxide solution or a mixed solution of hydrogen peroxide solution and ammonia to form an extremely thin silicon oxide film on the exposed portion of the amorphous silicon film (the area of the window 605). This is for improving the interface affinity between the nickel solution prepared as described above and the amorphous silicon film.
The substrate thus treated was placed on a spinner, gently rotated, and 1 to 10 ml, for example, 2 ml of a nickel solution was dropped on the substrate to spread the solution over the entire surface of the substrate. This state was maintained for 1 to 10 minutes, for example, 5 minutes. Thereafter, spin drying was performed by increasing the rotation speed of the substrate. This operation may be repeated a plurality of times. Thus, a thin film 607 of nickel salt was formed. (FIG. 6 (A))
[0056]
Then, silicon ions were implanted by an ion implantation method. At this time, except for the window 605, that is, in a region covered with the silicon oxide film 604, the largest amount of silicon ions is implanted into the interface between the underlying silicon oxide film 602 and the amorphous silicon film 603. It was done as follows. At this time, in the region of the window 605, since the silicon oxide film 604 does not exist, silicon ions are implanted deeper.
Thereafter, in a heating furnace, heat treatment was performed at 520 to 580 ° C. for 4 to 12 hours, for example, at 550 ° C. for 8 hours. The atmosphere was nitrogen. As a result, first, nickel diffused into a region immediately below the window 605, and crystallization started from this region. Then, the crystallization region extended around the periphery as shown by an arrow 608. (FIG. 6 (B))
[0057]
Thereafter, in the air or oxygen atmosphere, KrF excimer laser light (wavelength 248 nm) or XeCl excimer laser light (wavelength 308 nm) was irradiated with 1 to 20 shots, for example, 5 shots to further improve the crystallinity. Energy density is 200-350mJ / cm ² The substrate temperature was 200 to 400 ° C. (FIG. 6 (C))
[0058]
After that, the silicon film 603 was etched to form a TFT region. Then, a silicon oxide film 609 having a thickness of 1000 to 1500 Å, for example, 1200 に is formed on the entire surface, and the gate electrode 610 of the PTFT, the gate electrode 613 of the NTFT, and the respective A gate electrode portion was formed by the oxide films 612 and 614.
[0059]
Then, using these gate electrode portions as masks, N-type and P-type impurities were implanted into the silicon film by an ion doping method as in Example 1. As a result, a source 615, a channel 616, and a drain 617 of the PTFT and a source 620, a channel 619, and a drain 618 of the NTFT of the peripheral circuit were formed. After that, laser irradiation was performed on the entire surface in the same manner as in Example 1 to activate the doped impurities. (FIG. 6 (D))
[0060]
After that, a silicon oxide film 621 having a thickness of 3000 to 8000 Å, for example, 5000 と し て was formed as an interlayer insulator. Thereafter, contact holes are formed in the source / drain of the TFT, and a two-layer film of titanium nitride (thickness 1000) and aluminum (thickness 5000) is deposited by a sputtering method, and is patterned and etched. Thus, electrodes / wirings 622 to 624 were formed. In this way, an inverter circuit composed of PTFT and NTFT could be formed from crystalline silicon grown in the lateral direction. (FIG. 6E)
[0061]
In this embodiment, laser irradiation is performed as shown in FIG. In this step, the amorphous component remaining between the silicon crystals grown in a needle shape is crystallized, and the crystallization is performed with the needle crystal as a nucleus so as to make the needle crystal thicker. This expands the region through which current flows, and allows a larger drain current to flow.
This is shown in FIG. FIG. 7 shows a thin film of the crystallized silicon film observed by a transmission electron microscope (TEM). FIG. 7A shows the vicinity of the tip of the crystallized region of the silicon film crystallized by the lateral growth, and needle-like crystals are observed. Further, it can be seen that there are many non-crystallized amorphous regions between the crystals. (FIG. 7A)
[0062]
When this is irradiated with a laser under the conditions of this embodiment, the result is as shown in FIG. By this step, the amorphous region which occupies most of the area in FIG. 7A is crystallized. However, since this crystallization occurs randomly, electric characteristics are not so good. Noteworthy is the crystalline state of the region between the needle-like crystals observed near the center, which seems to be originally amorphous. Here, a thick crystal region is formed so as to grow from a needle crystal. (FIG. 7 (B))
[0063]
FIG. 7 shows a crystal growth front end region having a relatively large number of amorphous regions for the sake of simplicity, but the same applies to the vicinity of the root or center of the crystal growth. As described above, by laser irradiation, the amorphous portion can be reduced and the needle crystal can be made thicker, and the characteristics of the TFT can be further improved.
[0064]
【effect】
A crystalline silicon film having a uniform crystal growth direction is obtained by selectively introducing a metal element that promotes crystallization into a specific region and growing the crystal laterally (in a direction parallel to the substrate) from this region. be able to. Then, in order to prevent the crystal component from being present in the region where the crystal growth in the lateral direction is performed in advance at this time, the amorphous material is thoroughly amorphized by implanting inert ions, and further thermally annealed. Thus, a crystalline semiconductor film having a uniform crystal growth direction can be obtained. Then, by manufacturing a TFT using this film, a TFT with high mobility can be obtained.
[Brief description of the drawings]
FIG. 1 shows a manufacturing process of an example.
FIG. 2 shows an outline of an embodiment.
FIG. 3 shows a manufacturing process of the example.
FIG. 4 shows an outline of an embodiment.
FIG. 5 shows the dose of silicon ions.
FIG. 6 shows a manufacturing process of the example.
FIG. 7 shows a crystal structure of an example.
[Explanation of symbols]
101 glass substrate
102 Underlayer (silicon oxide film)
103 mask
100 Area where nickel is introduced
99 Protective film (silicon oxide film)
105 Crystal growth direction
107 Gate electrode
108 Anodized layer
109 Gate electrode
110 Anodized layer
111 source / drain region
112 Channel formation area
113 Drain / source region
114 Source / drain region
115 Channel formation area
116 Drain / source region
117 electrodes
118 Interlayer insulator
119 electrodes
120 electrodes
201 glass substrate
202 Base film (silicon oxide film)
203 mask
204 Area where nickel is introduced
206 Gate insulating film
207 Gate electrode
208 Source / drain regions
209 Channel formation area
210 Drain / source region
211 Interlayer insulator
212 ITO (pixel electrode)
213 electrode
214 electrodes

Claims (7)

Form a base film on the glass substrate surface,
Forming an amorphous silicon film on the surface of the base film,
Forming a region to which nickel is added and a region to which nickel is not added to the amorphous silicon film;
Heating the amorphous silicon film to form a crystalline silicon film by growing crystals in a direction parallel to the glass substrate from the region to which the nickel is added;
After irradiating the crystalline silicon film with a laser to crystallize the amorphous portion remaining in the crystalline silicon film,
Patterning the crystalline silicon film to form an active layer having a length of 40 μm or less;
Forming a gate insulating film and a gate electrode on the active layer,
A method for manufacturing a thin film transistor, comprising forming a source region, a drain region, and a channel formation region in the active layer. 2. The method according to claim 1, wherein a silicon oxide film is formed as the base film. 3. The method according to claim 1, wherein a silicon oxide film is formed as the gate insulating film. 4. The method according to claim 1, wherein the crystal growth in a direction parallel to the glass substrate has a length of 40 [mu] m. A base film formed on the surface of the glass substrate,
An active layer comprising a crystalline silicon film having crystals grown in a direction parallel to the glass substrate and formed on the surface of the base film;
Having a gate insulating film and a gate electrode on the active layer,
The thin film transistor, wherein the active layer has a length of 40 μm or less and has a source region, a drain region, and a channel forming region. 6. The thin film transistor according to claim 5, wherein the base film is a silicon oxide film. 7. The thin film transistor according to claim 5, wherein the gate insulating film is a silicon oxide film.

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