JP2002124469A - Method for fabricating semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To deposit a crystalline silicon film at a temperature of 600 deg.C or below. SOLUTION: An amorphous silicon film is deposited, and a metallic element for accelerating crystallization is added to a part of the amorphous silicon film which is then heated and crystallized to form a crystalline silicon film. Subsequently, the crystalline silicon film is irradiated with a laser beam and a film containing silicon is formed on the crystalline silicon film irradiated with the laser beam. Finally, the crystalline silicon film and the film containing silicon are heated to fabricate a semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate such as glass, and a method for manufacturing the same.

[0002]

2. Description of the Related Art As a semiconductor device having TFTs on an insulating substrate such as glass, active type liquid crystal display devices and image sensors using these TFTs for driving pixels are known.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. Examples of the crystalline silicon semiconductor include non-single-crystal silicon such as polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, and semi-amorphous silicon having an intermediate state between crystalline and amorphous. Films are known. In the following,
A crystalline silicon semiconductor is referred to as a crystalline silicon semiconductor, and a crystalline silicon semiconductor film is referred to as a crystalline silicon film.

A method for obtaining a silicon semiconductor in the form of a thin film having crystallinity is as follows: (1) A film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed, and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy. Is known. However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or higher, so that the method is inexpensive. There was also a cost problem that a glass substrate could not be used. Also, (2)
Taking the excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low, and the entire surface of the large-area substrate is uniformly processed. The stability of the laser is not enough, and it seems to be a next-generation technology. (3)
The method (1) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more, and uses an inexpensive glass substrate. Considering this, it is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen size is increasing, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, in the case of 7059 glass, which is currently most commonly used, the strain point is 593 ° C., and the conventional heating crystallization method causes large deformation. In addition to the problem of the temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.

[0005]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Of course, a crystalline silicon semiconductor manufactured using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technology, and can be used for the active layer region of the TFT. It goes without saying that there is something.

Background of the Invention The present inventors form an amorphous silicon semiconductor film by a CVD method or a sputtering method and crystallize the film by heating as described in the section of the prior art. Regarding the method, the following experiments and considerations were made.

First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallizing the film by heating is examined. The crystal growth starts from the interface between the glass substrate and the amorphous silicon. When the film thickness exceeded a certain level, it was recognized that the film proceeded in a columnar shape perpendicular to the substrate surface.

In the above phenomenon, a crystal nucleus serving as a base for crystal growth (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and the crystal grows from the nucleus. It is considered to be due to going. Such a crystal nucleus
Considered to be trace amounts of impurity metal elements present on the substrate surface and crystalline components on the glass surface (like glass crystallized glass, it is considered that there is a crystalline component of silicon oxide on the glass substrate surface) Can be

Therefore, it was considered that the crystallization temperature could be lowered by more actively introducing crystal nuclei, and in order to confirm the effect, a small amount of another metal was deposited on the substrate. An experiment was conducted in which a thin film made of amorphous silicon was formed thereon and then heated and crystallized. As a result, when some metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was expected that crystal growth using foreign matter as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals whose temperature could be reduced was investigated in more detail.

[0010] Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of point-like fine crystals at a constant temperature. The case was also shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism will be described in detail later.

In any case, due to the above two effects, it has not been possible to consider a case where a thin film made of amorphous silicon is formed after a certain kind of metal is formed in a very small amount and then heated and crystallized. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less for about 4 hours. Examples of impurity metals having such an effect include iron, cobalt,
Nickel, copper, palladium, silver and platinum are mentioned. Since these are all metals that are often used as catalyst materials, they will be abbreviated as “catalyst metals for low-temperature crystallization” in the present specification. Among these, nickel is cited as a material that has the most remarkable effect and is easy to handle. In the present specification, discussion will be made focusing on nickel.

One example of the effect of nickel is as follows. On a substrate on which no treatment is performed, that is, on a substrate on which a very small amount of nickel thin film is not formed (Corning 70
59) In the case where a thin film made of amorphous silicon formed by a plasma CVD method is crystallized by heating in a nitrogen atmosphere, when the heating temperature is 600 ° C., the heating time is 10 hours or more. Although it was necessary, when a thin film made of amorphous silicon was used on a substrate on which a thin film of nickel was formed, a similar crystallization state could be obtained by heating for about 4 hours. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.

[Means for Solving the Problems] As can be seen from the above description, when a thin film of a catalytic metal for low-temperature crystallization is formed and then a thin film of amorphous silicon is formed,
The crystallization temperature can be lowered and the time required for crystallization can be reduced. Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT. As will be described in detail later, since the thin film of the catalyst metal for low-temperature crystallization has the same effect even when formed on amorphous silicon as well as on the substrate, and the same is true for ion implantation. In the present specification, these series of processes will be referred to as "addition of a small amount of catalytic metal for low-temperature crystallization". In addition,
As the low-temperature crystallization catalyst metal, it is useful to use at least one element selected from iron, cobalt, nickel, copper, palladium, silver, and platinum. Elements having the same effect as the material include Group 8 elements Ru, Rh, Os, and Ir.

First, a method of adding a catalytic metal for low-temperature crystallization will be described. A small amount of low-temperature crystallization catalytic metal can be added by forming a small amount of low-temperature crystallization catalytic metal thin film on a substrate and then forming amorphous silicon. However, the method of forming a small amount of a catalytic metal thin film for low-temperature crystallization from above also has the effect of lowering the temperature similarly, and the film formation method can be either a sputtering method or a vapor deposition method. It turns out not. However, when a very small amount of a catalytic metal thin film for low-temperature crystallization is formed on a substrate, 705
9 Rather than forming a very small amount of catalytic metal thin film for low-temperature crystallization on a glass substrate, a thin film of silicon oxide is formed on the substrate and a small amount of catalytic metal thin film for low-temperature crystallization is formed thereon. The effect is more remarkable when the film is formed. One possible reason for this is that direct contact between silicon and the catalyst metal for low-temperature crystallization is important for low-temperature crystallization in this case. In the case of 7059 glass, components other than silicon are in contact with both. Alternatively, the reaction may be inhibited.

As a method of adding a trace amount, almost the same effect is confirmed by adding a catalytic metal for low-temperature crystallization by ion implantation in addition to forming a thin film in contact with above or below amorphous silicon. Was done. Further, it may be added as an impurity when the amorphous silicon film or the non-single-crystal silicon film to be crystallized is formed.

The amount of the low-temperature crystallization catalyst metal is, for example, 1 × 10 ¹⁵ atoms / cm ³ for nickel.
It has been confirmed that the addition of the above amount lowers the temperature.
At an addition amount of × 10 ²¹ atoms / cm ³ or more,
Since the shape of the peak of the Raman spectroscopy spectrum is clearly different from that of silicon alone, it can be actually used at 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 × 10 ¹⁹ atoms.
/ Cm ³ seems to be in the range. Further, considering that the semiconductor material is used for an active layer of a TFT, the amount is set to 1 × 10 ¹⁵ atoms / cm ³ to 2 × 10 ¹⁹ atom.
ms / cm ³ .

Next, the crystallization mechanism assumed when nickel is used as the low-temperature crystallization catalyst metal will be described.

As described above, when the low-temperature crystallization catalyst metal is not added, nuclei are randomly generated from crystal nuclei at the substrate interface and the like, and crystal growth from the nuclei is also random.
It has been reported that a crystal having a relatively oriented (110) or (111) orientation can be obtained depending on the production method. Naturally, almost uniform crystal growth is observed over the entire thin film.

First, in order to confirm this mechanism, an analysis was performed with a DSC (differential scanning calorimeter). An amorphous silicon thin film formed on a substrate by plasma CVD was filled in a sample container while remaining on the substrate, and the temperature was raised at a constant rate. Then
A clear exothermic peak was observed at about 700 ° C., and crystallization was observed. This temperature naturally shifts when the rate of temperature rise is changed. For example, when the temperature is increased at a rate of 10 ° C./min, crystallization starts at 700.9 ° C. Next, three kinds of heating rates were measured, and the activation energy of crystal growth after initial nucleation was determined by the Ozawa method. Then, a value of about 3.04 eV was obtained. In addition, when the reaction rate equation was obtained from fitting with a theoretical curve, it was found that the reaction was best explained by disorder nucleation and its growth model, and nuclei were generated randomly from crystal nuclei at the substrate interface and the like. The validity of the model of crystal growth from the nucleus was confirmed.

The same measurement as described above was performed on a sample to which a catalytic metal for low-temperature crystallization was added, for example, a sample to which a small amount of nickel was added. Then 10 ° C
When the temperature was raised at a rate of / min, crystallization started at 619.9 ° C., and the activation energy of crystal growth determined from a series of these measurements was approximately 1.87 eV,
It has been clarified numerically that the crystal growth is easy. Moreover, the reaction rate equation obtained from the fitting with the theoretical curve was close to a one-dimensional interface rate-determining model, suggesting that the crystal growth has a certain directionality.

Here, as described above, the fact that the crystallization start temperature is lowered can be considered relatively easily as an effect of foreign matter. What is the cause of the decrease in the activation energy for crystal growth? . In order to investigate the reason, the activation energy for recrystallization of an amorphous silicon film manufactured by injecting silicon ions into a polycrystalline silicon film to make it amorphous was measured by the above-described method. As a result, although the crystallization start temperature was shifted to a higher temperature, the activation energy for crystal growth was about 2.3 eV.
It turned out to be lower. Here, considering that an amorphous silicon film formed by ion implantation hardly contains hydrogen in the film, the easiness of crystal growth depends on hydrogen at the interface between the crystal part and the amorphous part. It is expected that the ease of desorption may be rate-limiting. As an experimental result supporting this hypothesis, from the result of TG-DTA (simultaneous differential thermal analysis / thermogravimetric analysis) of the amorphous silicon film, the start of crystallization always occurs immediately after the desorption of hydrogen has subsided. Is expected to be very likely to be inhibiting crystallization. A study of the reaction between the newly added low-temperature crystallization catalyst metal and hydrogen shows that all of these are substances that cause an exothermic reaction when they react with hydrogen to form hydrides (palladium alone is a literature). Has been shown to be an endothermic reaction). This indicates that the catalyst metal for low-temperature crystallization is stabilized by bonding with hydrogen, and it is considered that the low temperature has been achieved by the following mechanism. The catalytic metal for low-temperature crystallization incorporated in amorphous silicon forms a direct bond with silicon. When temperature is applied, diffusion of the low-temperature crystallization catalyst metal proceeds prior to crystallization in order to homogenize the concentration gradient, but at that time, the catalyst metal diffuses while bonding with hydrogen, and as a result, reacts with silicon. The bond is weakened, the bond is easily broken, and dangling bonds and vacancies in the film increase. Crystallization must involve the migration of silicon atoms, but the increase in dangling bonds and vacancies is expected to facilitate them, which means that crystallization preparations are formed at lower temperatures . After that, nucleation occurs, but the activation energy at this time is reduced by adding a small amount of the catalytic metal for low-temperature crystallization. This is obvious from the fact that crystallization occurs from a lower temperature by adding the catalyst metal for low-temperature crystallization. The reason for this is that the effect of the low-temperature crystallization catalyst metal alone as a foreign substance or We believe that there is also the possibility of the effect of an intermetallic compound consisting of silicon and a catalytic metal for low-temperature crystallization. In addition, since this nucleation occurs almost simultaneously on the entire surface of the region where the low-temperature crystallization catalyst metal is added, the crystal growth has a mechanism of growing as a plane,
In this case, the reaction rate equation is a one-dimensional interface-controlled process,
Consistent with DSC results. After that, crystal growth from the crystal nucleus proceeds, but at that time, the rate-limiting process changes because hydrogen does not exist at the interface between the crystal part and the amorphous part, and the activation energy required for crystal growth is accordingly It greatly decreases. In order to explain the above mechanism, diffusion of the catalytic metal for low-temperature crystallization prior to crystallization is indispensable. For this, for the sample that has been annealed before the start of crystallization, Of the concentration of catalyst metal for SIM
When measured by S (secondary ion mass spectrometry),
It is evident from the fact that the presence of the low-temperature crystallization catalyst metal above the measurement limit was confirmed from the region where the low-temperature crystallization catalyst metal was directly added to the region where the low-temperature crystallization catalyst metal was not added.

Next, the crystal morphology of the crystalline silicon film obtained by adding a trace amount of the catalyst metal for low-temperature crystallization will be described. As mentioned in the explanation of the crystallization mechanism, the added metal diffuses into a considerably wide area below the crystallization temperature. As a result, a lower crystallization temperature is achieved also in these diffusion regions. It has been clarified that the crystal morphology is different between the direct addition region and the diffusion region. In other words, it was confirmed that the direct addition region grows crystal in the direction perpendicular to the substrate, while the peripheral diffusion region grows crystal in the direction horizontal to the substrate. It is speculated that all of these may be due to differences in the initial nucleation of crystals. That is, in the directly added portion, the foreign matter becomes a crystal nucleus, and crystal growth occurs in a columnar shape from the foreign nucleus. This is because, in order for growth to start from there, it is inevitably interpreted that growth is occurring in the horizontal direction. Hereinafter, in the present specification, the crystal growth region extending in the lateral direction parallel to the substrate and extending from the direct addition region of the low-temperature crystallization catalyst metal to the periphery is referred to as a “lateral growth” region.

Next, the electrical characteristics of the nickel-added portion and the laterally grown portion in the vicinity thereof when nickel is used as the low-temperature crystallization catalyst metal will be described. The electrical characteristics of the nickel-added portion are substantially the same as those of a film to which nickel is not substantially added, that is, a film which has been crystallized at about 600 ° C. for several tens of hours. When we asked for activation energy from the property,
The amount of nickel added was 10 ¹⁷ atoms / cm as described above.
^{When the} concentration was set to about ³ to 10 ¹⁸ atoms / cm ^3, no behavior that might be caused by the nickel level was observed. That is, it is considered from this experimental fact that the above-described concentration can be used as an active layer of a TFT or the like.

On the other hand, the laterally grown portion has a conductivity one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is considered to be due to the fact that the current path direction coincided with the lateral growth direction of the crystal, so that few or no grain boundaries existed during the passage of electrons between the electrodes.
It is consistent with the result of the transmission electron micrograph. That is, it can be considered that the carrier moves along the grain boundary of the crystal grown in the shape of a needle or a column, so that the carrier can easily move.

As shown in FIG. 1, nickel is selectively introduced into a region 100 as a nickel silicide film, and thereafter, an amorphous silicon film 104 is formed by a known plasma CVD method. When crystallization is performed by heating for a long time, crystal growth occurs in a direction perpendicular to the substrate 101 in the region 100 into which nickel has been introduced.
In the other region, the substrate 1
Lateral growth occurs in a direction parallel to 01. As a result, a crystalline silicon film is obtained. When the concentration of nickel in the crystalline silicon film was measured by SIMS, the following knowledge was obtained.

1. The concentration distribution of nickel is not so large in the thickness direction of the film. 2. The nickel concentration in the region where nickel is directly introduced (for example, the region 100 in FIG. 1) is greatly affected by the conditions for forming the nickel film. In other words,
The reproducibility of nickel concentration in that region is not so high. 3. In the region where the crystal was grown in the direction parallel to the substrate (the region where nickel was not directly introduced), the concentration was lower by about one digit or more than that in the region where nickel was directly introduced. You can get high. 4. The background nickel concentration is 1 × 10 ¹⁷ c
m ^−3, which is almost the same as the measurement limit of SIMS.
That is, it can be said that the background nickel concentration is about 1 × 10 ¹⁷ cm ⁻³ which is the measurement limit level of SIMS or less.

For example, in a region where nickel is directly introduced and a crystal is grown in a direction perpendicular to the substrate, about 2 × 10
^{In the} case where nickel is present at a concentration of ¹⁸ cm ^-3 , measurement was performed in a region where crystal growth was performed in a direction parallel to the substrate at a distance of about 40 μm from the region where nickel was introduced, that is, in a region where lateral growth was performed. The nickel concentration is about 2 × 10 ^{17, which} is about an order of magnitude lower. The above example will be described with reference to FIG. FIG.
The Ni concentration in the region (Plasma treated) to which Ni was added by the plasma treatment, the Ni concentration in the region grown in the direction parallel to the substrate (Lateral growth), and the ground level of a-Si This is the Ni concentration. As can be seen from FIG. 4, the region where the crystal was grown in the direction parallel to the substrate (Lat
The Ni concentration of eral growth is lower than that of the region where Ni is directly introduced. Therefore, in order to use the device as a device, it is useful to use a region where crystals have grown in a direction parallel to the substrate.

It is very difficult to control the nickel concentration in the silicon film in the region where nickel is directly introduced.
The nickel concentration in this case greatly changes depending on the conditions for forming the nickel film (actually, the nickel silicide film). This is because the nickel concentration in this region (for example, the region 100 in FIG. 1) is an extremely severe film thickness of about 20 ° (which is difficult to actually measure and is a value estimated from the film formation rate). It is considered that this is because it depends directly on the required film forming conditions. As is well known, it is impossible to form a film of about 20 ° on a large area with uniformity by a film forming method such as a sputtering method. Therefore, it is considered that the poor reproducibility of the film formation directly reflects the nickel concentration in the silicon film. The variation in nickel concentration is caused by the fact that a region in which nickel is directly introduced is formed as an active layer.
Directly affects the properties of That is, when a TFT is manufactured using a region (for example, 100 in FIG. 1) into which nickel is directly introduced, a large variation in its characteristics appears. This is also considered to be due to poor reproducibility of forming an extremely thin nickel film.

On the other hand, the nickel concentration in the region away from the region where nickel was introduced, that is, the region where the crystal grew laterally in a direction parallel to the substrate from the region where nickel was directly introduced, was generally such that nickel was directly introduced. The density was smaller than that of the region (about one digit smaller at a position separated by 40 μm as described above), and the variation tended to be smaller. Further, according to experiments, the concentration of nickel in the active layer at which satisfactory characteristics as a TFT is obtained is lower than the SIMS measurement limit (1 × 10 ¹⁷ cm ⁻³ or less) to 2 × 10 ¹⁹ c.
Although it is known to be about m ⁻³ , in the region where the crystal is grown in parallel with the substrate, the direct amount of nickel introduced (the region where nickel is introduced, for example, the nickel concentration in the silicon film 104 in the region 100). Regardless, it has been found that the above-mentioned predetermined nickel concentration can be obtained relatively stably. That is, when a TFT is formed using a region where crystal growth is performed in parallel with the substrate from a region where nickel is introduced, the TFT can be obtained with extremely high reproducibility.

Furthermore, it is easy to select a region within the above-mentioned range of nickel concentration, or to make the nickel concentration of a predetermined region (but not the region indicated by 100 into which nickel is directly introduced) within the above-mentioned range. Has been confirmed. For example, in order to select a region having a predetermined nickel concentration, nickel can be set to a predetermined concentration by setting a distance from a region where nickel is introduced. However, in this case, the condition is that the required crystallinity of the silicon film is obtained.

The nickel concentration in the region where the crystal has grown in parallel with the substrate can also be controlled by controlling the crystallization conditions (mainly, the heating time and the heating temperature). It is much easier to control the nickel concentration in the directly introduced region.

As described above, the use of a region in which a crystal element is grown in parallel with a substrate from a region to which a catalytic element for crystallization is added, that is, a laterally grown region, in a semiconductor device is as follows. And the carrier having high mobility can be used. (2) A region where the concentration of the catalyst material for crystallization is low can be used. (3) The region of (2) can be obtained with good reproducibility. (4) The concentration of the catalyst material for crystallization can be easily controlled. This is useful in that respect.

Finally, a method of applying the present invention to a TFT based on the above various characteristics will be described. Where TF
As an application field of T, an active matrix type liquid crystal display device using TFTs for driving pixels is assumed.

As described above, in a recent large-screen active matrix type liquid crystal display device, it is important to suppress the shrinkage of the glass substrate. Thereby, crystallization can be performed at a temperature sufficiently lower than the strain point of glass, which is particularly preferable. According to the present invention, a portion where amorphous silicon is conventionally used is converted into silicon having crystallinity by adding a trace amount of a catalyst metal for low-temperature crystallization and crystallizing it at about 500 to 550 ° C. for about 4 hours. It is easily possible to replace it. Of course, it is necessary to change the design rules and the like accordingly. However, it is considered that the conventional apparatus and process can sufficiently cope with this, and the merits thereof are considered to be great.

Further, according to the present invention, a TFT used for a pixel and a TFT forming a driver of a peripheral circuit are used.
Can be separately formed by using crystal forms according to the characteristics, which is particularly advantageous in application to an active liquid crystal display device. A TFT used for a pixel does not require much mobility, and a smaller off-state current has a greater advantage. Therefore, when the present invention is used, a small amount of catalyst metal for low-temperature crystallization is directly added to a region to be a TFT to be used for a pixel, whereby the crystal is grown in a vertical direction, and as a result, many grain boundaries are formed in a channel direction. As a result, the off-state current can be reduced. On the other hand, the TFT forming the driver of the peripheral circuit needs very high mobility in consideration of application to a workstation in the future.
Therefore, when applying the present invention, a small amount of a low-temperature crystallization catalyst metal is added near a TFT forming a driver of a peripheral circuit, and a crystal is grown in one direction (a direction parallel to the substrate) from there. By aligning the crystal growth direction with the path direction of the channel current, a TFT having extremely high mobility can be manufactured.

There is also known an apparatus in which sensors for handling image information and optical signals are integrated on a glass substrate. For example, an integrated image sensor and the like are known. In such an apparatus, if visible light is to be detected, amorphous silicon (a-Si) should be used in terms of spectral sensitivity.
It is preferable to use However, since a switching element that requires high-speed operation is required in the drive circuit portion, it is not preferable to form an element in the drive circuit portion, for example, a TFT with an amorphous silicon film. In such a case, it is useful to use the high mobility TFT described above. For example, a photodiode or a phototransistor using an amorphous silicon film is formed in the sensor portion, and a transistor is formed in the peripheral circuit portion using the crystalline silicon film of the present invention. Then, these circuits can be integrated on the same substrate (for example, a glass substrate) and separately formed.

That is, if the present invention is used, a crystalline silicon film region and an amorphous silicon film region can be separately formed in a predetermined region, and the crystalline silicon film grown in the lateral direction can be formed separately. By using the region, a device in which carriers can move at high speed can be formed. The above-described usefulness can be used not only for a liquid crystal display device and a sensor, but also for a semiconductor device widely integrated on a substrate.
That is, the present invention can be used for a transistor or a diode using a thin film semiconductor on a substrate, or for a device in which a resistor or a capacitor is integrated.

[0038]

The crystal growth is carried out in the direction parallel to the substrate in the form of needles or columns from a region into which a trace element, mainly a group 8 element having a catalytic action introduced to crystallize silicon, is introduced. However, by forming an active layer such as a TFT using the crystal growth region, a region having a lower concentration than the region into which the trace element is introduced can be used as the active layer, and the influence of the trace element can be reduced. You can get a device that does not receive it.

In forming the device, the characteristics of the device can be improved by setting the carriers to flow in accordance with the crystal growth direction of the crystalline silicon film grown in a needle or column shape. In addition, this area
Since the concentration of the trace element is low and the concentration can be easily controlled, a device having required characteristics can be obtained with good reproducibility.

[0040]

EXAMPLES In the following examples, examples are shown in which nickel is used as a catalyst for crystallization. However, when other Group VIII elements are used, Cu and Ag which can be expected to have the same effect as nickel can be obtained. Can be basically used instead of nickel in the following embodiments.
In addition, a method of introducing these elements or a thin film containing the elements is formed on the upper surface of the non-single-crystal silicon film, and an element of Group 8 is added to the non-single-crystal silicon film by ion doping or ion implantation. Or a method of mixing the amorphous silicon film at the time of film formation. At this time, the concentration may be set to 2 × 10 ¹⁹ cm ⁻³ or less in the silicon film.

[Embodiment 1] In this embodiment, a circuit in which a P-channel TFT (referred to as PTFT) using a crystalline silicon film on a glass substrate and an N-channel TFT (referred to as NTFT) are combined in a complementary manner. It is an example of forming. The configuration of this embodiment can be used for a switching element of a pixel electrode and a peripheral driver circuit of an active type liquid crystal display device, as well as an image sensor and other integrated circuits.

FIG. 1 is a sectional view showing a manufacturing process of this embodiment. First, a 2000-nm-thick silicon oxide base film 102 is formed on a substrate (Corning 7059) 101 by a sputtering method. Next, a mask 103 formed of a metal mask, a silicon oxide film, or the like is provided. The mask 103 exposes the base film 102 in a slit shape in a region indicated by 100. That is, when the state of FIG. 1A is viewed from above, the base film 102 is exposed in a slit shape, and the other portions are masked.

[0043] After providing the mask 103, by sputtering, the thickness 5～200A, e.g. 20Å of nickel silicide film (chemical formula _{NiSi x, 0.4 ≦ x ≦ 2} .
5, for example, x = 2.0) is selectively formed in 100 regions. The nickel silicide film is formed because nickel, which is a group VIII (group 8) element, is used as a catalyst element for crystallization.

Next, an intrinsic (I type) film having a thickness of 500 to 1500 °, for example, 1000 ° is formed by a plasma CVD method.
Is formed. Then, the mixture is placed in a hydrogen reducing atmosphere (preferably, a partial pressure of hydrogen is 0.1 to 1 atm) at 550 ° C. or in an inert atmosphere (atmospheric pressure).
Anneal at 50 ° C. for 4 hours to crystallize. On this occasion,
In a region of 100 where the nickel silicide film is selectively formed, the crystalline silicon film 1 is perpendicular to the substrate 101.
Crystallization of 04 occurs. Then, in a region other than the region 100, as shown by an arrow 105, crystal growth is performed in a lateral direction (a direction parallel to the substrate) from the region 100.

Then, in order to promote the crystallization and obtain a more dense crystalline silicon film, annealing by lamp heating is performed after the above-mentioned heating annealing. This annealing
This is performed using infrared light of 1.2 μm. The annealing time is set to 5 minutes or less. Infrared light is efficiently absorbed by silicon, and a great effect can be obtained in improving the film quality of silicon. On the other hand, since it is difficult to be absorbed by the glass substrate, there is obtained a significance that energy is selectively given to silicon and the glass substrate is not heated much. Light used for annealing by lamp heating includes:
Tungsten halogen lamp light (wavelength: 0.5 μm to 3.
5 μm) can be used. By this annealing by lamp heating, a dense crystalline silicon film can be obtained. Further, annealing using laser light can be performed instead of the lamp heating.

Further, an N-channel TFT was formed of the crystalline silicon film annealed by the lamp heating and the crystalline silicon film without the lamp heating, and the mobility was measured. An average improvement of about 20% was observed. This is considered to be because the crystallinity was improved by the above-described lamp heating, and in particular, defects in the film could be greatly reduced.

As a result of the above steps, the crystalline silicon film 104 can be obtained by crystallizing the amorphous silicon film. After that, isolation between elements is performed, and a region of the active layer where a source / drain region of the TFT and a channel formation region are formed is determined. In the present embodiment, crystal growth (lateral growth) in a direction parallel to the substrate was observed over about 40 μm, so the length of each active layer (length in the source / drain direction) was set to 40 μm. . In this case, the distance between the center of the channel and the position where nickel is introduced is about 20 μm. By setting this distance, the concentration of nickel in the active layer (particularly, the channel formation region) can be selected. it can.

Next, a thickness of 1
A silicon oxide film 106 having a thickness of Å is formed as a gate insulating film. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 200 to 400.
° C, for example, 350 ° C, the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1
The following is assumed.

After this step, the annealing by the lamp heating is performed again. This is to improve the interface characteristics between the gate insulating film 106 made of a silicon oxide film and the crystalline silicon film 104. Needless to say, the crystallinity of the crystalline silicon film 104 is further improved by the lamp heating annealing. As is well known, a gate insulating film and a channel formation region of an insulated gate field effect transistor (in FIG. 1,
It is important to improve the interface characteristics with the crystalline silicon film portions 112 and 115 serving as channel formation regions), specifically, to reduce defects and levels in those regions as much as possible. Therefore, annealing by lamp heating performed after the formation of the gate insulating film 106 can provide a great effect. Further, annealing by laser light irradiation may be performed instead of lamp heating.

Next, aluminum (containing 0.1 to 2% of silicon) having a thickness of 6000 to 8000, for example, 6000, is formed by a sputtering method. Then, patterning is performed to form gate electrodes 107 and 109. Further, the surface of the aluminum electrode is anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. Obtained oxide layer 10
8,110 had a thickness of 2000 mm. Since the oxides 108 and 110 have a thickness for forming an offset gate region in a later ion doping process, the length of the offset gate region can be determined in the anodic oxidation process. Of course, the gate electrode may have a structure containing silicon as a main component, a material having a silicide of silicon and a metal, a material having a metal as a main component, or a structure having a stack of silicon and a metal.

Next, the ion doping method (ion implantation)
Method), the active layer regions (source / drain, channel
The impurity that gives one conductivity type to
You. In this doping step, the gate electrode 107 and
Oxide layer 108, gate electrode 109 and its surroundings
Impurities (phosphorus and boron) using oxide layer 110 of
Element). Phosphine as doping gas
(PH_Three) And diborane (B_TwoH₆) Using the former
In this case, the acceleration voltage is set to 60 to 90 kV, for example, 80 kV,
In the latter case, it is 40 to 80 kV, for example, 65 kV.
You. Dose amount is 1 × 10 ^Fifteen~ 8 × 10^Fifteencm^-2,example
If phosphorus is 2 × 10^Fifteencm^-2, Boron 5 × 10^FifteenToss
You. During doping, one region is photoresist
Covering each element selectively
Ping. As a result, N-type impurity regions 114 and 11
6, P-type impurity regions 111 and 113 are formed,
Channel type TFT (PTFT) region and N-channel type TF
A region with T (NTFT) can be formed.

After that, annealing is performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots is irradiated. It is useful to heat the substrate to about 200 to 450 ° C. at the time of this laser light irradiation. In this laser annealing step, nickel is diffused in the previously crystallized region, so that the laser light irradiation facilitates recrystallization, and the impurity doped with an impurity imparting a P-type. Area 1
The impurity regions 11 and 113 and the impurity regions 114 and 116 doped with an impurity for imparting N can be easily activated.

As an annealing method for the source / drain regions, the above-described annealing method using lamp heating is also effective. Since the lamp heating (for example, using infrared light of 1.2 μm) selectively heats silicon as described above, it is useful for a process like this embodiment in which heating of the glass substrate is to be avoided as much as possible. .

Subsequently, a silicon oxide film 11 having a thickness of 6000.degree.
8 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a metal material, for example, TF is formed by a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 120 and 119 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete a semiconductor circuit in which the TFTs are configured to be complementary. (Fig. 1 (D))

The circuit shown above has a CMOS structure in which a PTFT and an NTFT are provided in a complementary manner. In the above-described process, two TFTs are formed at the same time and cut at the center so that two independent TFTs are formed at the same time. It is also possible to produce.

FIG. 2 shows an outline of FIG. 1D viewed from above. The reference numerals in FIG. 2 correspond to those in FIG. FIG.
As shown in (1), the direction of crystallization is the direction shown by the arrow 105, and the crystal is grown in the direction of the source / drain region (the line direction connecting the source region and the drain region). At the time of operation of the TFT having this configuration, the carrier is the source /
It moves along the crystal grown in a needle or column shape between the drains. That is, the carriers move along the crystal grain boundaries of needle-like or columnar crystals. Therefore, the resistance received when carriers move can be reduced, and a TFT having high mobility can be obtained.

In the present embodiment, as a method for introducing nickel, nickel is selectively deposited on the underlying film 102 under the amorphous silicon film 104 by nickel thin film of nickel silicide (it is extremely thin, so it is difficult to observe nickel as a film. There is a method that forms a crystal growth from this part,
After forming the amorphous silicon film 104, a method of selectively forming a nickel silicide film may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. As a method for introducing nickel, a method in which plasma treatment is performed using an electrode containing nickel to attach a small amount of nickel may be used. In addition, a method is employed in which an amorphous silicon film is formed in advance, and nickel ions are selectively implanted into the amorphous silicon film 104 by ion doping or ion implantation (ion implantation). May be. This case has a feature that the concentration of the nickel element can be controlled.

[Embodiment 2] This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure. Also, N
It goes without saying that a P-channel type may be used instead of a channel type. Further, it can be used not only for the pixel portion of the liquid crystal display device but also for the peripheral circuit portion. Further, it can be used for an image sensor and other integrated circuits. That is, as long as it is used as a thin film transistor, its use is not particularly limited.

FIG. 3 shows an outline of the manufacturing process of this embodiment.
In this embodiment, the substrate 201 is Corning 70
59 glass substrate (1.1 mm thick, 300 × 400 m
m) was used. First, a base film 203 (silicon oxide) is formed to a thickness of 2000 ° by a sputtering method. Thereafter, in order to selectively introduce nickel, a mask 20 is formed using a metal mask, a silicon oxide film, a photoresist, or the like.
Form 3 Then, a nickel silicide film is formed by a sputtering method. This nickel silicide film is formed to a thickness of 5 to 200 °, for example, 20 ° by a sputtering method. This nickel silicide film has the chemical formula NiS
_{i x, 0.4 ≦ x ≦ 2.5} , for example, represented by x = 2.0. Thus, a nickel silicide film is selectively formed in the region 204.

Thereafter, LPCVD or plasma C
An amorphous silicon film 205 is formed to a thickness of 1000 ° by a VD method, dehydrogenated at 400 ° C. for 1 hour, and then crystallized by heat annealing. This annealing step was performed at 550 ° C. for 4 hours under a hydrogen reducing atmosphere (preferably, a partial pressure of hydrogen was 0.1 to 1 atm). This heat annealing step may be performed in an inert atmosphere such as nitrogen.

In this annealing step, since a nickel silicide film is formed in a part of the region (region 204) under the amorphous silicon film 205, crystallization occurs from this part. During this crystallization, silicon crystal growth proceeds in a direction perpendicular to the substrate 201 in the portion 204 where the nickel silicide is formed, as indicated by arrows in FIG. Similarly, as indicated by arrows, in regions where nickel silicide is not formed (regions other than region 205), crystal growth is performed in a direction parallel to the substrate. Thereafter, annealing is performed by the same lamp heating as in the first embodiment to improve the crystallinity (densification) of the silicon film.

Thus, the semiconductor film 2 made of crystalline silicon
05 can be obtained. Next, the semiconductor film 205 is patterned to form an island-shaped semiconductor region (TFT active layer).
To form At this time, the concentration of nickel in the channel formation region 209 can be determined by setting the distance between the portion where the channel formation region 209 is formed and the 204 into which nickel is introduced. That is, if the distance is increased, the nickel concentration in the channel formation region 209 can be reduced, and if the distance is reduced, the nickel concentration in the channel formation region can be increased. Of course, in this case, it must be a region where the silicon film 205 is crystallized.

Further, tetraethoxysilane (TEO)
S) as a raw material, a gate insulating film of silicon oxide (thickness 700 to 120) is formed by a plasma CVD method in an oxygen atmosphere.
0 °, typically 1000 °) 206. The substrate temperature is set to 400 ° C. or less, preferably 200 to 350 ° C. in order to prevent shrinkage and warpage of the glass. Thereafter, similarly to the first embodiment, lamp heating by irradiation with infrared light is performed for 1 minute to 5 minutes.
Then, the interface characteristics between the semiconductor film 205 and the gate insulating film 206 are improved.

Next, a known film containing silicon as a main component is
By forming by D method and performing patterning,
The contact electrode 207 is formed. Then, as an N-type impurity,
Phosphorus by ion implantation and self-aligned
Source region 208, channel formation region 209, drain region
An area 210 is formed. And irradiate KrF laser light
Degrades the crystallinity due to ion implantation.
To improve the crystallinity of the silicon film. At this time the laser
Light energy density is 250-300mJ / cm ^TwoToss
You. By this laser irradiation, the source of this TFT /
The sheet resistance of the drain is 300-800Ω / cm^TwoTona
You. This process also uses infrared light instead of laser light.
Lamp heating.

Thereafter, the interlayer insulator 21 is formed by silicon oxide.
1 is formed, and the pixel electrode 212 is formed of ITO. Then, a contact hole is formed and TF
The electrodes 213 and 214 are formed of a chromium / aluminum multilayer film in the source / drain region of T, and one of the electrodes 213 is also connected to the ITO 212. Finally, annealing in hydrogen at 200 to 300 ° C. for 2 hours,
Complete silicon hydrogenation. In this way, the TFT
To complete. This process is performed simultaneously in many other pixel regions.

In the TFT manufactured in this embodiment, a crystalline silicon film grown in the direction in which carriers flow is used as an active layer constituting a source region, a channel forming region, and a drain region. , Ie, the carriers move along the crystal grain boundaries of needle-like or columnar crystals, so that a TFT having high carrier mobility can be obtained. The TFT manufactured in this example is an N-channel type, and has a mobility of 9
0 to 130 (cm ² / Vs). Conventional 600
The movement of an N-channel TFT using a crystalline silicon film obtained by crystallization by thermal annealing at 48 ° C. for 48 hours
This is a great improvement in characteristics as compared with 80 to 100 (cm ² / Vs).

Further, a P-channel TFT was manufactured by the same manufacturing method as in the above steps, and its mobility was measured to be 80 to 120 (cm ² / Vs). This is also a P-channel type TF using a crystalline silicon film obtained by crystallization by conventional thermal annealing at 600 ° C. for 48 hours.
This is a great improvement in characteristics as compared with the case where the movement of T is 30 to 60 (cm ² / Vs).

[Embodiment 3] This embodiment is an example in which the source / drain is provided in a direction perpendicular to the crystal growth direction in the TFT shown in Embodiment 2. That is, in this example, the direction in which the carrier moves is perpendicular to the crystal growth direction, and the carrier moves so as to cross the crystal grain boundaries of needle-like or columnar crystals. With such a configuration, the resistance between the source and the drain can be increased. This is because the carriers must move across the crystal grain boundaries of the crystal grown in a needle or column shape. In order to realize the configuration of the present embodiment, in the configuration of the second embodiment, it is sufficient to simply set the direction in which the TFT is provided.

[Embodiment 4] In this embodiment, in the configuration shown in Embodiment 2, the direction of providing the TFT (here, the source / source) is used.
It is defined by a line connecting the drain regions. That is, the characteristic of the TFT is selected by setting the direction of the TFT according to the direction in which carriers flow) at an arbitrary angle with respect to the crystal growth direction of the crystalline silicon film with respect to the substrate surface.

As described above, when the carriers are moved in the crystal growth direction, the carriers move along the crystal grain boundaries, so that the mobility can be improved. on the other hand,
When moving carriers in a direction perpendicular to the crystal growth direction, the carriers have to cross many grain boundaries, so that the carrier mobility decreases.

The carrier mobility is controlled by selecting between these two states, that is, by setting the angle between the crystal growth direction and the carrier moving direction in the range of 0 to 90 °. be able to. From another viewpoint, by setting the angle between the crystal growth direction and the direction in which carriers move, the source /
The resistance between the drain regions can be controlled. Of course, this configuration can also be used for the configuration shown in the first embodiment. In this case, the slit-shaped nickel trace addition region 100 shown in FIG.
The angle between the growth direction of the crystal and the line connecting the source / drain regions is selected in the range of 0 to 90 °.
When the angle is close to 0 °, the mobility is large and the electrical resistance between the source and the drain can be small. When the angle is close to 90 °, the mobility can be low and the resistance between the source and the drain, that is, the resistance of the channel formation region can be high.

[Embodiment 5] In this embodiment, in the step of crystallizing a non-single-crystal silicon semiconductor film of the embodiment 1 or 2, after forming a silicon oxide film to which chlorine is added, the crystal is formed by lamp heating. This is an example of performing the conversion. In the first or second embodiment, after forming a non-single-crystal silicon film,
This silicon film is crystallized by heating for 4 hours, and the crystallinity is promoted and improved by lamp heating. This embodiment is a further development of this step, in which a catalyst element for crystallization is gettered during lamp heating.

In this embodiment, first, a crystalline silicon film is formed by heating as described in the first and second embodiments. This step is performed by heating annealing at about 550 ° C. for about 4 hours by the action of a catalytic element (eg, nickel). Thereafter, the silicon oxide film to which chlorine is added is
It is formed to a thickness of 00 °. Thereafter, lamp heating is performed through the silicon oxide film. Lamp heating conditions are the same as in the first embodiment. At this time, the crystallinity of the crystalline silicon film crystallized by the previous heating is improved (densification of the film progresses), and the action of chlorine in the silicon oxide film causes a catalytic element for crystallization. Gettering is performed. Thus, a crystalline silicon film in which the catalyst element is fixed and the influence of the catalyst element on the operation of the device is reduced can be obtained.

Thereafter, the silicon oxide film to which chlorine has been added is removed, and a silicon oxide film for a gate insulating film is formed. Subsequent steps are the same as those described in the first and second embodiments.

[Embodiment 6] In this embodiment, a nickel silicide film is formed on the base film 20 in the manufacturing process of the embodiment 2 shown in FIG.
2 is an example in which crystal growth is performed on the entire surface of the silicon film in the direction perpendicular to the substrate by forming the entire surface of the silicon film. In manufacturing the TFT, a nickel silicide film is formed over the entire surface of the base film 202 without providing the mask 203, and thereafter, an amorphous silicon film 205 is formed as described in the second embodiment, and further a crystallization process is performed. Then, a TFT is manufactured.

A schematic cross section of the TFT of this embodiment is shown in FIG.
Although not different from that shown in (D), in the active layer in which the source / drain regions 208 and 210 and the channel formation region 209 are formed, the growth direction of the needle-like or columnar crystal is It is made vertically. Therefore, carriers that move between the source region (208 or 210) and the drain region (210 or 208) move in such a manner as to cross the grain boundaries of needle-like or columnar crystals. Therefore, a TFT having a slightly higher resistance between the source and the drain is obtained. Such a TFT has a mobility of 100 cm ² / Vs or less, but has a small off-state current, so that it is an optimal type for a pixel TFT of a liquid crystal display device for the purpose of retaining charges.

However, the TFT according to the present embodiment is
However, it is difficult to control the nickel concentration in the active layer as described above, and thus there is a problem in yield and reliability. This problem can be improved by using a method that can control the amount of nickel introduced (for example, an ion implantation method).

[Embodiment 7] In this embodiment, crystallization is further promoted by ion implantation of a Group 4 element in addition to a Group 8 element which is a catalyst element for crystallization by heating. . A manufacturing process of this embodiment will be described with reference to FIGS. Unless otherwise specified, manufacturing conditions and film thickness in each manufacturing process are the same as those described in Embodiment 1.

First, a base film (silicon oxide film) is formed on a glass substrate 101, a mask 103 is formed, and a group VIII element (nickel here), which is a catalyst element for crystallization, is selectively thinned. Formed in 100 regions exposed as Next, the mask 103 is removed, and a non-single-crystal silicon film, here, an amorphous silicon film 104 is formed by a plasma CVD method. Next, silicon as a Group 4 element is implanted over the entire surface by ion implantation. At this time, the projection range is
And the base film 102 on the substrate side near the interface. The acceleration voltage for ion implantation is 60 kV and the dose is 2
× 10 ¹⁵ cm ^-2 . As a result, thorough amorphization is performed centering on the vicinity of the interface between the substrate (including the base film) and the amorphous silicon film 104, and the existence of crystallization nuclei can be minimized.

The reason why the Group 4 element is used is that it is an impurity which is electrically neutral with respect to silicon. As the Group 4 element, C, Si, Ge, Sn, and Pb can be used, and particularly, Si, Ge, and Sn are preferably used. The dose is 5 × 10 ^{14 to} 5 × 10 ¹⁶
The ion cm ⁻² may be used.

Thereafter, the amorphous silicon film 104 is set at 550 degrees,
Crystallize by heating for 4 hours. At this time, crystal growth occurs in a direction parallel to the substrate as indicated by an arrow 105 from the region 100. This crystal growth is performed in a needle shape or a column shape. At the time of this crystal growth, a crystal component serving as a nucleus for crystal growth centering on the interface between the substrate and the amorphous silicon film (even though the amorphous silicon film has a crystal component, the degree of which is a problem).
Has been eliminated by the previous implantation of silicon ions,
Crystal growth performed in the direction parallel to the substrate from the region 100 is not hindered by crystal growth generated from the interface between the silicon film 104 and the base film 102, and the orientation is good.
In other words, crystal growth with a uniform crystal growth direction can be performed.

Thereafter, as described in the first embodiment, the PTFT
And NTFT, the complementary T
Complete the FT circuit. As in the present embodiment, when a TFT is formed such that a crystal growth direction and a carrier moving direction are aligned in a crystalline silicon film having good orientation,
Since the carriers move along the crystal grain boundaries, it is possible to adopt a configuration in which the movement is hardly affected by the crystal grain boundaries. That is, high-speed operation can be obtained. For example, the mobility of the NTFT formed by the process shown in Embodiment 1 was 90 to 130 cm ² / Vs on average, but silicon ions were implanted prior to crystallization by heating as in this embodiment. 150-170cm ² / Vs
I was able to get things.

In the present embodiment, the crystallinity was further improved, and a TFT having high mobility was obtained because of the crystal growth in the direction parallel to the substrate from the region where nickel, which is a Group 8 element, was introduced. This is because the crystal components that promote crystal growth in the direction perpendicular to the substrate that hindered the crystal growth had been thoroughly removed in advance, so that crystal growth in the direction parallel to the substrate was preferentially performed. Conceivable. In particular, it is considered effective to completely amorphize the vicinity of the interface between the silicon film and the substrate where the crystal nuclei exist when the crystal grows in a columnar shape in the direction perpendicular to the substrate.

[Embodiment 8] This embodiment relates to a manufacturing process of the active type liquid crystal display device in which the peripheral driver circuit is crystallized by the catalytic action of nickel which is a Group 8 element. This is an example in which a TFT provided in a pixel portion is formed of a TFT using known amorphous silicon (amorphous silicon).

As is well known, in an active type liquid crystal display device, a TFT in a peripheral driver circuit portion has a high mobility (100 cm ² / Vs or more) and a TFT capable of flowing a large amount of on-current is required. However, the TFT provided in the pixel portion has a small off-state current for retaining electric charge and a relatively small mobility (1 for preventing malfunction due to light irradiation).
0 cm ² / Vs).

This requirement is met by forming the peripheral circuit portion with the TFT described in the first and second embodiments and forming the pixel portion with a TFT (a-Si TFT) using a known amorphous silicon film. Somewhat satisfied. However, a TFT using an amorphous silicon film has a mobility of 1 cm ² / Vs or less, so that a problem remains in that point.

[Embodiment 9] This embodiment is a further development of Embodiment 8, and the TFT of the peripheral circuit portion has a high mobility of 100 cm ² / Vs or more shown in Embodiments 1 and 2. This is an example in which the pixel portion TFT is constituted by the TFT shown in the sixth embodiment.

In the TFT shown in the sixth embodiment, crystal growth is performed in a direction perpendicular to the substrate so that the crystal grain boundaries are perpendicular to the flow of carriers, and the carriers have a large number of crystal grain boundaries. This is a TFT configured to cross.
In such a TFT, mobility is reduced because carrier movement is hindered by crystal grain boundaries. However, since the off-state current is small, the charge retention can be increased,
It is suitable as a TFT for a pixel. However, when nickel is introduced as a thin film as shown in Example 1 and Example 2, the reproducibility is poor and the obtained mobility is also 10%.
Since a pixel near 0 cm ² / Vs is obtained, the pixel TFT is over-specified.

Therefore, in the present embodiment, the above-mentioned problem is not solved by using an ion implantation method capable of controlling and introducing the concentration of nickel. First, the problem of reproducibility of the nickel concentration in the film is solved by using the ion implantation method. Further, by lowering the nickel concentration in the film, the crystallinity can be made slightly worse, and the mobility can be lowered. Of course, in order to lower the mobility, a method of artificially introducing oxygen or nitrogen into the channel region or the source / drain region, a method of reducing the doping amount of an impurity imparting a conductivity type doped into the source / drain region, or the activity A method of increasing the resistance of the source / drain region by simplifying the step of forming a channel, a method of making the channel a reverse conductivity type weaker than the source / drain,
Means for increasing the resistance between the source and the drain, such as a method of separating the positions of the source / drain contact holes (that is, utilizing the sheet resistance of the source / drain regions), may be used.

As described above, this embodiment employs a method in which nickel, which is a catalyst element for crystallization of a silicon film, is implanted into an amorphous silicon film by an ion implantation method. Inject nickel into the whole area with low concentration, and further inject higher concentration into the peripheral circuit part,
Further, in the pixel portion, a TFT was formed using a crystalline silicon film grown in a direction perpendicular to the substrate, and in the peripheral circuit portion, a TFT was formed using a crystalline silicon film grown in a direction parallel to the substrate. Things. By adopting such a configuration, the mobility in the pixel portion is 10 to 50.
It is possible to obtain a TFT having a small off current at about cm ² / Vs and a TFT having a mobility of 100 cm ² / Vs or more and a large on current at a peripheral circuit portion.

To further increase the mobility only in the peripheral circuit portion, ion implantation of a neutral element as described in Embodiment 7 may be used in that region.

[0092]

When a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate and grown in a direction parallel to the surface of the substrate and having crystallinity is used for the TFT, the direction of flow of carriers moving in the TFT is controlled by the crystal growth. The carrier movement along the grain boundaries of the crystals grown in a needle-like or columnar shape (parallel) to obtain a TFT having high mobility. be able to. Further, since these TFTs can be formed at a low temperature of 600 degrees or less, an inexpensive glass substrate can be used as the substrate.

Further, a TFT having a required mobility can be selectively formed. Specifically, 1. A TFT is manufactured using a crystalline silicon film grown in a direction parallel to the substrate so that carriers move in a direction along a crystal grain boundary. 2. Using a crystalline silicon film grown crystallographically in a direction parallel to the substrate, T is applied so that carriers move across the crystal grain boundaries.
Fabricate FT. 3. A TFT is manufactured in a region where crystals have grown in a direction perpendicular to the substrate. 4. A crystalline silicon film is selectively formed by partially introducing a catalytic element for crystallization, and by using the crystalline silicon film, a TFT in a specific portion can be made to have a high mobility TF.
Let it be T. In particular, since the crystalline silicon film in a region apart from the region into which the catalytic element for crystallization is introduced has one-dimensional orientation, the one-dimensional direction and the direction in which carriers move are determined. By roughly matching, a semiconductor device in which carriers have high mobility can be obtained. In particular, a TFT having a high-speed response can be obtained by using this structure in a channel formation region of an insulating hate field effect transistor.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows an outline of an embodiment.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows the concentration of a metal element.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Glass substrate 102 Base film (silicon oxide film) 103 Mask 104 Silicon film 105 Crystallization direction 106 Gate insulating film 107 Gate electrode 108 Anodized layer 109 Gate electrode 110 Anodized layer 111 Source / drain region 112 Channel formation region 113 Drain / Source region 114 source / drain region 115 channel formation region 116 drain / source region 117 electrode 118 interlayer insulator 120 electrode 119 electrode 201 glass substrate 202 base film (silicon oxide film) 203 mask 204 nickel trace addition region 205 silicon film 206 gate Insulating film 207 Gate electrode 208 Source / drain region 209 Channel formation region 210 Drain / source region 211 Interlayer insulator 213 Electrode 214 Electrode 212 ITO (pixel electrode)

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[Procedure amendment]

[Submission date] August 10, 2001 (2001.8.1)
0)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 29/786 H01L 27/14 CF term (Reference) 2H092 JA25 KA04 KA10 MA05 MA08 MA12 MA27 MA29 MA30 MA37 NA21 NA27 PA01 4M118 AA10 AB01 BA05 CA11 CB07 FB03 FB09 FB13 5C094 AA13 AA44 BA03 BA43 CA19 DA14 DA15 DB04 EA04 EA07 EB02 FB12 FB14 FB15 5F052 AA02 AA12 AA17 AA24 CA00 CA10 DA02 DB02 DB03 EA11 A13 FA01 A13 EA01 EA01 EA01 BB10 CC02 DD02 DD13 EE03 EE05 EE34 EE44 FF02 FF28 FF36 GG02 GG13 GG25 GG28 GG45 HJ01 HJ04 HJ12 HJ23 HL01 HL03 HL04 HL11 HM14 NN02 NN23 NN35 PP01 PP02 PP03 PP10 PP13 Q29 Q34 Q

Claims (17)

[Claims] An amorphous silicon film is formed, a metal element for promoting crystallization of the amorphous silicon film is added to a part of the amorphous silicon film, and the amorphous silicon film is heated. Crystallizing the amorphous silicon film, forming a crystalline silicon film, irradiating the crystalline silicon film with laser light, and containing a silicon-containing film on the crystalline silicon film irradiated with the laser light. And manufacturing the semiconductor device by heating the crystalline silicon film and the film containing silicon. 2. An amorphous silicon film is formed, a metal element for promoting crystallization of the amorphous silicon film is added to a part of the amorphous silicon film, and the amorphous silicon film is heated. Crystallizing the amorphous silicon film to form a crystalline silicon film, irradiating the crystalline silicon film with infrared light, and including silicon on the crystalline silicon film irradiated with the infrared light. A method for manufacturing a semiconductor device, comprising forming a film and heating the crystalline silicon film and the film containing silicon. 3. An amorphous silicon film is formed, a metal element for promoting crystallization of the amorphous silicon film is added to a part of the amorphous silicon film, and the amorphous silicon film is heated. Crystallizing the amorphous silicon film to form a crystalline silicon film, irradiating the crystalline silicon film with laser light, and forming a film containing silicon on the crystalline silicon film irradiated with the laser light. A method for manufacturing a semiconductor device, comprising: forming and heating a crystalline silicon film and a film containing silicon to getter a metal element that promotes the crystallization. 4. An amorphous silicon film is formed, a metal element for promoting crystallization of the amorphous silicon film is added to a part of the amorphous silicon film, and the amorphous silicon film is heated. Crystallizing the amorphous silicon film to form a crystalline silicon film, irradiating the crystalline silicon film with infrared light, and including silicon on the crystalline silicon film irradiated with the infrared light. A method for manufacturing a semiconductor device, comprising: forming a film; and heating the crystalline silicon film and the film containing silicon to getter a metal element that promotes the crystallization. 5. The amorphous silicon film according to claim 1, wherein said amorphous silicon film is formed by adding G to said amorphous silicon film before heating said amorphous silicon film.
A method for manufacturing a semiconductor device, which comprises implanting e-ions. 6. An amorphous silicon film according to claim 1, wherein said amorphous silicon film has an S content before heating said amorphous silicon film.
A method for manufacturing a semiconductor device, comprising implanting any ion selected from i, Sn, C, and Pb. 7. The method for manufacturing a semiconductor device according to claim 5, wherein the method of implanting ions is an ion implantation method. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the metal that promotes crystallization is a Ni element. 9. The method according to claim 1, wherein the metal that promotes crystallization is Fe, Co, Cu, Pd, or A.
A method for manufacturing a semiconductor device, which is any element selected from g and Pt. 10. The method according to claim 1, wherein
A method for manufacturing a semiconductor device, wherein heating of the crystalline silicon film and the film containing silicon is performed using infrared light. 11. The method according to claim 10, wherein the wavelength of the infrared light is 0.5 to 3.5 μm. 12. The method for manufacturing a semiconductor device according to claim 1, wherein the heating of the crystalline silicon film and the film containing silicon is performed in an inert atmosphere. 13. The method for manufacturing a semiconductor device according to claim 1, wherein the heating of the crystalline silicon film and the film containing silicon is performed in a nitrogen atmosphere. 14. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon-containing film formed on the crystalline silicon film contains chlorine. 15. A semiconductor device manufactured by the method according to claim 1. 16. The semiconductor device according to claim 15, wherein said semiconductor device is an active matrix display device. 17. The semiconductor device according to claim 15, wherein said semiconductor device is an image sensor.